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Implementation and Applications of Tri-State Self-Organizing Maps on FPGA

Kofi Appiah, Andrew Hunter, Patrick Dickinson, Hongying Meng
2012 IEEE transactions on circuits and systems for video technology (Print)  
This paper introduces a tri-state logic Self Organising Map (bSOM) designed and implemented on a Field Programmable Gate Array (FPGA) chip.  ...  The appearance-based object identification forms part of an end-to-end surveillance system implemented wholly on FPGA.  ...  This paper presents a tri-state Self Organising Map (the bSOM), which takes a binary input vector and maintains tristate weights.  ... 
doi:10.1109/tcsvt.2012.2197077 fatcat:5rh3tj5m5vcvjgqoizudv62bpm

A binary Self-Organizing Map and its FPGA implementation

Kofi Appiah, Andrew Hunter, Hongying Meng, Shigang Yue, Mervyn Hobden, Nigel Priestley, Peter Hobden, Cy Pettit
2009 2009 International Joint Conference on Neural Networks  
Software simulations are very useful for investigating the capabilities of neural network models [6] , and are suitable 978-1-4244-3553-1/09/$25.00 ©2009 IEEE  ...  for typical applications of self-organizing maps.  ...  We also present the FPGA implementation of this binary Self Organizing Map (bSOM).  ... 
doi:10.1109/ijcnn.2009.5179001 dblp:conf/ijcnn/AppiahHMYHPHP09 fatcat:rfcb4pdpr5bzra6yhki4xglnrq

Self-Awareness as a Model for Designing and Operating Heterogeneous Multicores

Andreas Agne, Markus Happe, Achim Lösch, Christian Plessl, Marco Platzner
2014 ACM Transactions on Reconfigurable Technology and Systems  
the workload and system state.  ...  In our work we focus on heterogeneous multicores implemented with fieldprogrammable gate arrays (FPGAs) and aim at developing models, architectures and programming environments that allow for creating  ...  The authors used an encryption algorithm as application and implemented their system on a Xilinx Virtex-II Pro FPGA.  ... 
doi:10.1145/2617596 fatcat:ep5qzii7xzfofp5yc74m7vkk7u

A novel platform for complex bio-inspired architectures

Gianluca Tempesti, Fabien Vannel, P.-A. Mudry, Daniel Mange
2007 2007 IEEE Workshop on Evolvable and Adaptive Hardware (WEAH2007)  
The realization of this kind of systems, however, requires resources that are both quantitatively and qualitatively different from conventional, off-the-shelf platforms.  ...  Consisting of four different kinds of interconnected boards (computational, routing, power supply, and display), these stacks can then be joined together to form an arbitrarily large parallel network of  ...  ACKNOWLEDGEMENTS This project was funded by the Swiss National Science Foundation Grant number PP002-68674 and by the Leenaards Foundation, Lausanne, Switzerland.  ... 
doi:10.1109/weah.2007.361706 dblp:conf/weah/TempestiVMM07 fatcat:jnlmg53bkzflxg3l6rqbztlxtu

Toward robust integrated circuits: The embryonics approach

D. Mange, M. Sipper, A. Stauffer, G. Tempesti
2000 Proceedings of the IEEE  
We describe the implementation of such a molecule, with built-in self-test, and illustrate its use in realizing two applications: a modulo-4 reversible counter (a unicellular organism) and a timer (a complex  ...  of self-replication and self-repair.  ...  its elements and our MUXTREE molecules (which could theoretically allow us a one-to-one mapping of our molecules to the elements).  ... 
doi:10.1109/5.842998 fatcat:fbgfmejqh5brlav7zv6zu4d5u4

Binary object recognition system on FPGA with bSOM

Kofi Appiah, Andrew Hunter, Patrick Dickinson, Hongying Meng
2010 23rd IEEE International SOC Conference  
This paper introduces the implementation of an FPGA-based tri-state rule binary Self Organizing Map (bSOM), which takes binary inputs and maintains tri-state weights, with a node labelling algorithm which  ...  It is designed to provide part of an end-to-end surveillance system implemented wholly on FPGA.  ...  We use a tri-state rule binary Self Organising Map (bSOM) based on the system described in [5] , modified to perform identification.  ... 
doi:10.1109/socc.2010.5784755 dblp:conf/socc/AppiahHDM10 fatcat:4fncoc7bmbenbopvhysr3wxjd4

Configurable Multiprocessor Platform with RTOS for Distributed Execution of UML 2.0 Designed Applications

T. Arpinen, P. Kukkala, E. Salminen, M. Hannikainen, T.D. Hamalainen
2006 Proceedings of the Design Automation & Test in Europe Conference  
This paper presents the design and full prototype implementation of a configurable multiprocessor platform that supports distributed execution of applications described in UML 2.0.  ...  The experiments performed on FPGA show that our approach raises system design to a new level.  ...  The critical path is originated from the Avalon arbitrator module of the shared tri-state bus.  ... 
doi:10.1109/date.2006.244125 dblp:conf/date/ArpinenKSHH06 fatcat:nzotwsgq5rh53lnz6ujqlr4qwe

Placing, Routing, and Editing Virtual FPGAs [chapter]

Löic Lagadec, Dominique Lavenier, Erwan Fabiani, Bernard Pottier
2001 Lecture Notes in Computer Science  
This paper presents the benefits of using a generic FPGA tool set developed at the university of Brest for programming virtual FPGA structures.  ...  The FPGA description is not constrained by any model, so that abstract FPGA structures, such as virtual FPGAs, can directly exploit the tool set as their basic programming tools.  ...  Routing includes wires and their interconnection mechanism (transistors, tri-states, multiplexers). An FPGA structure is specified using a grammar style.  ... 
doi:10.1007/3-540-44687-7_37 fatcat:3wjvpi4f2jbfhnophjgrfeqzea

POEtic: an electronic tissue for bio-inspired cellular applications

Yann Thoma, Gianluca Tempesti, Eduardo Sanchez, Juan-Manuel Moreno Arostegui
2004 Biosystems (Amsterdam. Print)  
This reconfigurable circuit is designed to ease the implementation of bio-inspired systems that bring cellular applications into play.  ...  As the creation of these paths is dynamic, it is possible to add new cells or to repair faulty ones at runtime.  ...  The information provided is the sole responsibility of the authors and does not reflect the Community's opinion.  ... 
doi:10.1016/j.biosystems.2004.05.023 pmid:15351142 fatcat:ogq3fvzj2vh4rgwc7b22uhjyw4

Demonstrating Controlled Change for Autonomous Space Vehicles

Alexander Dorflinger, Mark Albers, Bjorn Fiethe, Harald Michalik, Mischa Mostl, Johannes Schlatow, Rolf Ernst
2019 2019 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)  
The robots are capable of executing several image computations for exploration, object detection and pose estimation, which can be allocated to both FPGA-and processor resources of a System-on-Chip.  ...  The demonstrator addresses three scenarios which cover application-, environment-, and platform change. The system adapts itself to any of the named changes.  ...  tries to find a configuration that matches the current state of the input models.  ... 
doi:10.1109/ahs.2019.00010 dblp:conf/ahs/DorflingerAFMMS19 fatcat:mabjuokq6raz5kqv5zyk3x2gte

A Survey on Reconfigurable System-on-Chips

Hung Kiem Nguyen, Tu Xuan Tran
2018 REV Journal on Electronics and Communications  
Finally, some state-of-the-art reconfigurable SoCs are briefly discussed.  ...  This paper analyzes and emphasizes the key research trends of the reconfigurable System-on-Chips (SoCs). Firstly, the emerging hardware architecture of SoCs is highlighted.  ...  Figure 8 shows the execution and dynamically mapping of a program on WARP.  ... 
doi:10.21553/rev-jec.147 fatcat:zqjzktktbjh4los7luipp45cvy

The Embryonics Project: a machine made of artificial cells

G Tempesti, D Mange, A Stauffer
1999 Rivista di biologia (testo stampato)  
As in living beings, the presence of the genome in every cell allows the introduction of features such as self-replication and self-repair (cicatrization).  ...  In addition, the cells are implemented using an array of programmable elements (the artificial molecules), which allows their structure to be adapted to a given application.  ...  We also wish to thank Marcello Barbieri of the University of Ferrara, Italy, for his invaluable suggestions and for his support.  ... 
pmid:10355371 fatcat:rxg5pttu5jhfpm5xerq3ofm2ie

ISODATA SOPC-FPGA implementation of image segmentation using NIOS-II processor

Radjah Fayçal, Ziet Lahcene, Benoudjit Nabil
2021 Indonesian Journal of Electrical Engineering and Computer Science  
<p>This paper presents an FPGA image segmentation-binarization system based on Iterative Self Organizing DATA (ISODATA) threshold using histogram analysis for embedded systems.  ...  The use of FPGA contains the ISODATA, histogram, NIOS processor and others custom altera IPs hardware modules greatly improves processing speed and allows the binarization application to be embedded on  ...  Image gray-scale histogram module is associated to the Iterative Self Organizing DATA (ISODATA) circuit for the analyzing and binarizing operation of data image pixel.  ... 
doi:10.11591/ijeecs.v22.i2.pp818-825 fatcat:dgrvhkfy2ff55js5perhofrhwi

Logic foundry

Gary Spivey, Shuvra S. Bhattacharyya, Kazuo Nakajima
2003 Proceedings of the 2003 conference on Asia South Pacific design automation - ASPDAC  
The Logic Foundry is a system for the creation and integration of FPGA-based DSP systems.  ...  Recognizing that some of the greatest challenges in creating FPGA-based systems occur in the integration of the various components, we have developed a system that addresses the following four areas of  ...  For the purpose of this work, we will focus on a single FPGA implementation and do the implementation by hand.  ... 
doi:10.1145/1119772.1119846 dblp:conf/aspdac/SpiveyBN03 fatcat:y5pl2bjflre2jf7imqy7p3nvwq

Evolutionary Strategy of Chromosomal RSOM Model on Chip for Phonemes Recognition

Mohamed Salah, Nejib Khalfaoui, Hamid Amiri
2016 International Journal of Advanced Computer Science and Applications  
This paper aims to contribute in modeling and implementation, over a system on chip SoC, of a powerful technique for phonemes recognition in continuous speech.  ...  A neural model known by its efficiency in static data recognition, named SOM for self organization map, is developed into a recurrent model to incorporate the temporal aspect in these applications.  ...  A neural model known by its power in static data recognition, named SOM for self organization map, is developed into a recurrent model to incorporate the temporal aspect in these applications.  ... 
doi:10.14569/ijacsa.2016.070720 fatcat:5mad7wjmyreazd6ap327ml3fya
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