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Iodine: Verifying Constant-Time Execution of Hardware
[article]
2019
arXiv
pre-print
Preserved Fulltext
A promising way to avoid timing vulnerabilities is to devise --- and verify --- conditions under which a hardware design is free of timing variability, i.e., executes in constant-time. ...
In this paper, we present Iodine: a clock precise, constant-time approach to eliminating timing side channels in hardware. ...
This work was supported in part by gifts from Fujitsu and Cisco, by the National Science Foundation under Grant Number CNS-1514435, by ONR Grant N000141512750, and by the CONIX Research Center, one of ...
arXiv:1910.03111v1
fatcat:vgvybt6xjzcu5nt6u7jntaadde
Solver-Aided Constant-Time Circuit Verification
[article]
2021
arXiv
pre-print
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We present Xenon, a solver-aided method for formally verifying that Verilog hardware executes in constant-time. ...
Xenon scales to realistic hardware designs by drastically reducing the effort needed to localize the root cause of verification failures via a new notion of constant-time counterexamples, which Xenon uses ...
Verifying Constant-Time Execution. ...
arXiv:2104.00461v1
fatcat:rpkzyxlss5billotbqinhp35lu
A Survey on RISC-V Security: Hardware and Architecture
[article]
2021
arXiv
pre-print
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This paper summarizes the representative security mechanisms of RISC-V hardware and architecture. Based on our survey, we predict the future research and development directions of RISC-V security. ...
The Internet of Things (IoT) is an ongoing technological revolution. Embedded processors are the processing engines of smart IoT devices. ...
that the hardware executes in a constant time. ...
arXiv:2107.04175v1
fatcat:hr6avyprj5dvpav2pvnmfmvg2a
A Methodology For Creating Information Flow Specifications of Hardware Designs
[article]
2021
arXiv
pre-print
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We present a methodology for creating information flow specifications of hardware designs. ...
By combining information flow tracking and specification mining, we are able to produce information flow properties of a design without prior knowledge of security agreements or specifications. ...
constant values. ...
arXiv:2106.07449v1
fatcat:tthuari24rbezgoukkh6kx7ase
Mining Secure Behavior of Hardware Designs
[article]
2021
arXiv
pre-print
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Specification miners use a form of machine learning to specify behaviors of a system by studying a system in execution. However, specification mining was first developed for use with software. ...
Complex hardware designs offer unique challenges for this technique. ...
both constants with different constant values. ...
arXiv:2108.09249v1
fatcat:hldkifb4qvas7dt7hsybgphooy
Cone-Beam Micro-CT System Based on LabVIEW Software
2007
Journal of digital imaging
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Each step in the chain takes care of one or two hardware commands at a time; the execution of the sequence can be modified according to the CBCT system design. ...
Additionally, writing flexible code to control the hardware components of a CBCT system combined with designing a friendly graphical user interface (GUI) can be cumbersome and time consuming. ...
Gaffen and Todd Evans of the UB Dentistry Department for the mouse jaw, and to Bruce A. Davidson and Paul R. ...
doi:10.1007/s10278-007-9024-9
pmid:17333411
pmcid:PMC2553273
fatcat:idj7yjrprjczpcszwxu4pqmcke
A parallelizable approach for mining likely invariants
2015
2015 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)
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However, to achieve a high accuracy, they require to analyse a huge number of (long) execution traces, which results in time-consuming phases. ...
Execution traces composed of millions of simulation instants can be efficiently analysed. ...
The iteration on all the time windows of T exits as soon as all invariants have been verified on at least one time window (lines 29-30 and 51-52). ...
doi:10.1109/codesisss.2015.7331382
dblp:conf/codes/DanesePP15
fatcat:wq423462frgwffo4ebio522uce
An Exhaustive Approach to Detecting Transient Execution Side Channels in RTL Designs of Processors
[article]
2021
arXiv
pre-print
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Hardware (HW) security issues have been emerging at an alarming rate in recent years. Transient execution attacks, in particular, pose a genuine threat to the security of modern computing systems. ...
UPEC scales to a wide range of HW designs, including in-order processors (RocketChip), pipelines with out-of-order writeback (Ariane), and processors with deep out-of-order speculative execution (BOOM) ...
Another HW verification approach targeting timing vulnerabilities is Iodine [19] , which, for an RTL model, verifies whether a given operation executes in a constant-time manner. ...
arXiv:2108.01979v2
fatcat:bb2ivpd5irczzexro2yqvm547u
Operating System for Wireless Embedded Systems Powered by Energy Harvesters
[chapter]
2012
Lecture Notes in Electrical Engineering
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By having the best and worst execution time of the primitive the typical execution time of the primitive has to be determined. ...
With the help of the execution profiler the worst case and best case execution time of primitive operations can be determined. ...
doi:10.1007/978-1-4614-3558-7_27
fatcat:rxp57uazbze3bb46mc5ormmfta
Ultrafast Fourier Transform with a Femtosecond-Laser-Driven Molecule
2010
Physical Review Letters
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The evolution time is 145 fs, which is shorter than the typical clock period of the current fastest Si-based computers by 3 orders of magnitudes. ...
An optically tailored vibrational wave packet in the iodine molecule implements four-and eight-element discrete Fourier transform with arbitrary real and imaginary inputs. ...
careful reading of this manuscript. ...
doi:10.1103/physrevlett.104.180501
pmid:20482157
fatcat:3abkn72x6nbejcmraxfqbqz4iq
Nanosecond resistive switching in Ag/AgI/PtIr nanojunctions
2020
Beilstein Journal of Nanotechnology
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Our results demonstrate the potential of Ag-based filamentary memristive nanodevices to serve as the hardware elements in high-speed neuromorphic circuits. ...
The high-speed switching capabilities are explored by a custom-designed microwave setup that enables time-resolved studies of subsequent set and reset transitions upon biasing the Ag/AgI/PtIr nanojunctions ...
Scheer for providing the opportunity of the internship at BME.
Funding This work was supported by the BME-Nanonotechnology FIKP grant of EMMI (BME FIKP-NAT) and the NKFI K119797 and K128534 grants. ...
doi:10.3762/bjnano.11.9
pmid:31976200
pmcid:PMC6964644
fatcat:ytghozao35bydpdtl7repkoza4
Lightweight Automatic Error Detection by Monitoring Collar Variables
[chapter]
2012
Lecture Notes in Computer Science
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The other pattern verifies the range of a variable per (successful) execution. If the range is constant across executions, then the variable is not monitored. ...
Results show a reduction of 52.04% on average in the number of monitored variables, while still maintaining a good detection rate with only 3.21% of executions detecting non-existing errors (false positives ...
IODINE [12] is a framework for extracting dynamic invariants for hardware designs. It has been shown that accurate properties can be obtained from using dynamic invariants. ...
doi:10.1007/978-3-642-34691-0_16
fatcat:zs5up2fhsbe4dapaej4z6l3xj4
Source strength verification and quality assurance of sterile, pre-loaded iodine-125 seed trains used for prostate brachytehrapy
2014
Preserved Fulltext
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We investigated a method to verify the positions and strengths of brachytherapy seeds loaded into implant needles. ...
Good correlation between detector reading and exposure time, as well as between detector reading and source strength, demonstrated the linear characteristic of the detecto [...] ...
seeds be verified in such cases. ...
doi:10.14288/1.0167373
fatcat:a2ufi4orwzhalaurwg2nnwj7ty
Concurrent Bug Detection Using Invariant Analysis
2018
International Journal of Engineering & Technology
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The bug detection is done by checking the interleaving of threads which is not available in operational phases. So, static analysis is one of the preferred approaches for detection of concurrent bug. ...
Invariant based testing technique is one approach of static analysis used for detecting the concurrent bugs. ...
Program Invariants A program invariant is a character that remains constant throughout the execution of the program [11] . ...
doi:10.14419/ijet.v7i3.4.14666
fatcat:rg3qlcvsqzemfdlvfdbgiwtg3y
On the impossibility of effectively using likely-invariants for software attestation purposes
2018
Journal of Wireless Mobile Networks, Ubiquitous Computing, and Dependable Applications
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On the server, an integrity Verifier uses the received values to check likely-invariants and establish trustworthiness of the target application. ...
Likely-invariants, as opposed to the "true" invariants described before, are inferred from the analysis of traces collected by executing the applications on selected inputs [12] . ...
Acknowledgments The research described in this paper is part of the ASPIRE project, co-funded by the European Commission (FP7 grant agreement no. 609734). ...
doi:10.22667/jowua.2018.06.30.001
dblp:journals/jowua/ViticchieBVL18
fatcat:zy2lp6recjd43iejdmvuveimem
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