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A unified approach to reduce soc test data volume, scan power and testing time

A. Chandra, K. Chakrabarty
2003 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
We present a test resource partitioning (TRP) technique that simultaneously reduces test data volume, test application time, and scan power.  ...  Experimental results for the larger ISCAS89 benchmarks and an IBM production circuit show that reduced test data volume, test application time, and low power-scan testing can indeed be achieved in all  ...  Keller of Cadence Design Systems, Endicott, NY, (formerly with IBM Corporation, Endicott, NY), for providing scan vectors for the production circuit.  ... 
doi:10.1109/tcad.2002.807895 fatcat:6fq7eyn4b5foxhjfi6fkn23j24


1971 Computer  
doi:10.1109/c-m.1971.216755 fatcat:wb6u47lpd5hbpjcnmwlhyroxay

Call and Calendar

2006 Computer  
IEEE International Workshop on Memory Technology, Design, and Testing The annual MTDT event draws experts working in all facets of memory technologies to discuss memory design, process technology, and  ...  21-23 June: IMSTW 2006, 12th IEEE Int'l Mixed-Signals Testing Workshop, Edinburgh. www.sli-institute. 22-23 June: CBMS 2006, 19th IEEE Int'l Symp. on Computer-Based Medical Systems, Salt  ... 
doi:10.1109/mc.2006.155 fatcat:x7lri45xnjdkdi2dugc4y54zgi

Thoughts on Complexity, Trust, and Truth

Jeffrey Voas
2020 Computer  
September/October 2016 IEEE COMPUTER GRAPHICS AND APPLICATIONS September/October 2016 Sports Data Visualization VOLUME 36 NUMBER 5 c1.indd 1 8/22/16 2:59 PM November/December 2016 IEEE COMPUTER  ...  › the Boeing MAX airplane advanced flight deck (in particular, the complexity and unsafe design of the autopilot system) › the Boeing CST-Starliner spacecraft used in the Orbital Flight Test ("capsule  ... 
doi:10.1109/mc.2020.2971812 fatcat:quozjmobs5euvetbnf42xswduy

Guest Editorial: IEEE Transactions on Emerging Topics in Computing Special Issue on Design & Technology of Integrated Systems in Deep Submicron Era

Giorgio Di Natale, Marco Ottavi
2018 IEEE Transactions on Emerging Topics in Computing  
He is an associate editor of the IEEE Transaction on Emerging Topics in Computing and a senior member of the IEEE. VOLUME 6, NO. 2, APRIL-JUNE 2018 6750 ß 2018 IEEE.  ...  He is the chair of the European group of the TTTC, Golden Core member of the computer society and senior member of the IEEE.  ... 
doi:10.1109/tetc.2018.2802788 fatcat:l65j62jdnff7nhz2wszww3i62q

Digital Microfluidic Biochips

Krishnendu Chakrabarty
2015 Proceedings of the 25th edition on Great Lakes Symposium on VLSI - GLSVLSI '15  
These devices enable the precise control of nanoliter-volume droplets of biochemical samples and reagents.  ...  The audience will next learn about design automation, design-for-testability, and reconfiguration aspects of digital microfluidic biochips.  ...  Chakrabarty served as the Editor-in-Chief of IEEE Design & Test of Computers during 2010-2012.  ... 
doi:10.1145/2742060.2745701 dblp:conf/glvlsi/Chakrabarty15 fatcat:sfgi42c3ozcgfnmoqsvoxqwmie

System performance modeling with functional schemes and VHDL

P. Bakowski, J.-P. Calvez
1992 Microprocessing and Microprogramming  
De Micheli, Hardware-Software cosynthesis for digital systems, IEEE Design & test of computers, Sept. 1993, pp 29-41. R.K.  ...  Benner, Hardware-Software Cosynthesis for Microcontrollers, IEEE Design & test of computers, vol. 10, n o 4, pp 64-75, Dec. 1993.  ... 
doi:10.1016/0165-6074(92)90328-5 fatcat:355us6s5jnfwlgtnvnaauugjca

Turbo1500: Core-Based Design for Test and Diagnosis

Laung-Terng Wang, Ravi Apte, Shianling Wu, Boryau Sheu, Kuen-Jong Lee, Xiaoqing Wen, Wen-Ben Jone, Jianghao Guo, Wei-Shin Wang, Hao-Jan Chao, Jinsong Liu, Yanlong Niu (+3 others)
2009 IEEE Design & Test of Computers  
This work was supported in part by the National Science Foundation under grant CCF-0541103 and in part by the National Science Council of Taiwan under contract NSC096-2917-I-006-120.  ...  Typically, scan compression reduces test data volume and test application time by 10Â to 100Â, thereby drastically reducing scan test cost. 1, 9 A proposed solution for further reducing test data volume  ...  IEEE Std 1500 IEEE Std 1500 effectively supports various TAMs for testing core-based designs within a SoC.  ... 
doi:10.1109/mdt.2009.21 fatcat:2sjisdbsizdtboiaxepcmc5sti

Most Readed Articles in last Month - International Journal of Software Engineering & Applications (IJSEA)-ERA Listed

Lauran Lillay
2019 Zenodo  
Advances in Computers, Volume 67, 2006, Pages 177-224, [14] Ian Somerville: Software Engineering (10th Edition) [15] Software Quality: Concepts and Practice,1st,Wiley-IEEE Computer Society Pr ©2018  ...  System Department, Faculty of Computers and Informatics, Zagazig University, Egypt, "Evaluation of automated web testing tools" International Journal of Computer Applications Technology and Research  ... 
doi:10.5281/zenodo.3378796 fatcat:a33b7dz6vncyxccl766bd3jcsy

Building Image Feature Kinetics for Cement Hydration Using Gene Expression Programming With Similarity Weight Tournament Selection

Lin Wang, Bo Yang, Shoude Wang, Zhifeng Liang
2015 IEEE Transactions on Evolutionary Computation  
.: Using software simulators to enhance the learning of digital logic design for the information technology students.  ...  Gates in Design and Test of Digital Circuits.  ...  In 2013 IEEE/AIAA 32nd Digital Avionics Systems Conference (DASC), 2013, pp.7D3-1,7D3-13 Starecek L., Sekanina L., Kotasek Z.: Reduction of Test Vectors Volume by Means of Gate-Level Reconfiguration  ... 
doi:10.1109/tevc.2014.2367111 fatcat:dsfdt3ngn5htfdg4ydmofrqznm

FPGA-enabled computing architectures

R. Gupta
2005 IEEE Design & Test of Computers  
Aside from the special issue, our nontheme offering appeals to a diverse group of design and test professionals, including articles on advances in ATE frameworks, BIST for detection of crosstalk faults  ...  This burst of creativity in exploiting FPGAs is indicative of the computing community's aggressive search for the most efficient platform (in terms of cost, energy, and design time) for future systems.  ... 
doi:10.1109/mdt.2005.34 fatcat:dftfxg3nnnaz3ji6tbypia2ltm

Concurrent application of compaction and compression for test time and data volume reduction in scan designs

I. Bayraktaroglu, A. Orailoglu
2003 IEEE transactions on computers  
1480 IEEE TRANSACTIONS ON COMPUTERS, VOL. 52 NO. 11, NOVEMBER 2003 Concurrent Application of Compaction and Compression for Test Time and Data Volume Reduction in Scan Designs Ismet Bayraktaroglu and Alex  ...  Chakrabarty, “Test Resource Partitioning for SOCs,” IEEE Design and Test of Computers, vol. 18, no. 5, pp. 80-91, Sept./Oct. 2001. A. Chandra and K.  ... 
doi:10.1109/tc.2003.1244945 fatcat:2pv7lkdfbffchfjnusj6dftrm4

Code generator for implementing dual tree complex wavelet transform on reconfigurable architectures for mobile applications

Ferhat Canbay, Vecdi Emre Levent, Gorkem Serbes, H. Fatih Ugurdag, Sezer Goren, Nizamettin Aydin
2016 Healthcare technology letters  
.  Researcher (Software Testing) -Software Test of TestBuilder -High Level Design Verification Tool.  ...  member, IEEE International Design and Test Symposium, 2013  Program committee member, IEEE International Design and Test Symposium, 2012  Program committee member, Intl.  ... 
doi:10.1049/htl.2016.0034 pmid:27733925 pmcid:PMC5048331 fatcat:3gaxtpvpkva3zmsi3m64yp7tku

ITC-Asia 2020 Committees

2020 2020 IEEE International Test Conference in Asia (ITC-Asia)  
Abstract: Design, fabrication, assembly, test, and debug of integrated circuits and systems have become distributed across the globe, raising major concerns about their security and trustworthiness.  ...  This talk presents the idea of Intelligent Engineering Assistant (IEA) in view of applying machine learning in test data analytics.  ...  He also served as an Associate EIC for IEEE Design & Test, an IEEE Distinguished Speaker, and an ACM Distinguished Speaker from 2010 to 2014.  ... 
doi:10.1109/itc-asia51099.2020.00010 fatcat:t35r75s2zng3npcnj3bdsztz6q

Page 238 of Technical Book Review Index Vol. 51, Issue 6 [page]

1985 Technical Book Review Index  
Hand- book of design automation. 1333 Bordeaux Dr, Sunnyvale, CA, CAE Systems, 1984. 193p. $39.95. IEEE Design & Test of Computers 2:94 (Feb 1985). 1% col.  ...  IEEE Spectrum 22:16 (Mar 1985). 1 col. “‘This book is a worthwhile contribution to the confusion over who invented the computer.  ... 
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