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ICEBERG : An Involutional Cipher Efficient for Block Encryption in Reconfigurable Hardware [chapter]

Francois-Xavier Standaert, Gilles Piret, Gael Rouvroy, Jean-Jacques Quisquater, Jean-Didier Legat
2004 Lecture Notes in Computer Science  
We present a fast involutional block cipher optimized for reconfigurable hardware implementations. ICEBERG uses 64-bit text blocks and 128-bit keys.  ...  The resulting design offers better hardware efficiency than other recent 128-key-bit block ciphers. Resistance against side-channel cryptanalysis was also considered as a design criteria for ICEBERG.  ...  Acknowledgements The authors are grateful to Paulo Barreto for providing valuable comments and help during the design of ICEBERG.  ... 
doi:10.1007/978-3-540-25937-4_18 fatcat:cxqz2sgonjfg7f6su4styocjbq

FPGA implementations of the ICEBERG block cipher

F.-X. Standaert, G. Piret, G. Rouvroy, J.-J. Quisquater
2005 International Conference on Information Technology: Coding and Computing (ITCC'05) - Volume II  
In comparison with other recent block ciphers, the implementation results of ICEBERG show a significant improvement of hardware efficiency.  ...  This paper presents FPGA (Field Programmable Gate Array) implementations of ICEBERG, a block cipher designed for reconfigurable hardware implementations and presented at FSE 2004.  ...  ICEBERG is a block cipher designed for efficient reconfigurable hardware implementations.  ... 
doi:10.1109/itcc.2005.155 dblp:conf/itcc/StandaertPRQ05 fatcat:6cft4mtn5rbalngbpjblo3vphe

Security Analysis of Cipher ICEBERG against Bit-pattern Based Integral Attack

Yuechuan Wei, Yisheng Rong, Xu An Wang
2016 International Journal of Technology and Human Interaction  
In this paper, bit-pattern based integral attack is applied to ICEBERG-a lightweight block cipher efficient in reconfigurable hard-ware.  ...  However, traditional integral attack based on byte or word is not available for a bit-oriented cipher.  ...  Involution Cipher Efficient for Block Encryption in Reconfigurable hardware) (Standaert, Piret & Rouvroy, 2004) is a lightweight block cipher proposed by the UCL Crypto Group in 2004.  ... 
doi:10.4018/ijthi.2016040105 fatcat:by6jkfxk6za3dgszlz5xeodz34

PUFFIN: A Novel Compact Block Cipher Targeted to Embedded Digital Systems

Huiju Cheng, Howard M. Heys, Cheng Wang
2008 2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools  
In this paper, we examine the digital hardware design and implementation of a novel compact block cipher, referred to as PUFFIN, that is suitable for embedded applications.  ...  The cipher structure is based on the following features: a simple encryption process composed of permutations and substitutions based on 4×4 S-boxes, an identical datapath for both encryption and decryption  ...  ICEBERG [5] is a proposal, with a 64 bit block size and an 128 bit key, that is intended for efficient, high speed applications targeted to reconfigurable hardware, but that is also suitable for compact  ... 
doi:10.1109/dsd.2008.34 dblp:conf/dsd/ChengHW08 fatcat:rkg776zm2nhqvk3zgvx3efn5pq

PRINCE IP-core on Field Programmable Gate Arrays (FPGA)

Yasir Amer Abbas, Razali Jidin, Norziana Jamil, Muhammad Reza Z\'aba, Mohd Ezanee Rusli
2015 Research Journal of Applied Sciences Engineering and Technology  
The design of this IP core is based on concurrent concept in encrypting blocks of 64 bits data, in that each block is executed within one clock cycle, resulting in high throughput and low latency.  ...  The test program that has been written in "C" to evaluate this IP-Core on a Virtex-403 FPGA board yields an encryption throughput of 2.03 Gbps or resource efficiency of 2.126 Mbps/slice.  ...  The concurrent model design with a short time delay, allows block cipher to encrypt the input data in all hardware components, within one clock cycle.  ... 
doi:10.19026/rjaset.10.2447 fatcat:4s76qi5bfjhftpqt2f3d7ehrjm

3-6 複数段消去型高階差分攻撃

田中 秀磨, 殿村 裕司, 金子 敏信
2005 Journal of NICT  
一方で確 率的に成立する 7 階差分値を用いた攻撃は、成功確率約 0.7 で 1, 04 Standacrt, Piret, Rouvroy, Quisquator, Legat, "ICEBERG : an Involution Cipher Efficient for Block Encryption in Reconfigurable Hardware", FSE2004 pre-proceedings  ...  ICEBERG is a block cipher with sixteen round SPN structure. In this paper, we analyze its higher order differential property, and estimate its strength against higher order differential attacks.  ... 
doi:10.24812/nictkenkyuhoukoku.51.1.2_135 fatcat:trlacspha5fltdm4goed6jyslm

LCASE: Lightweight Cellular Automata-based Symmetric-key Encryption

Somanath Tripathy, Sukumar Nandi
2009 International Journal of Network Security  
We propose a lightweight block cipher that supports 128bit block size with 128-, 192-and 256-bit keys, to confirm with the Advanced Encryption Standard (AES) specification.  ...  Software Implementation The ICEBERG scheme [24] that proposed with the objective for efficient hardware implementation, was not efficient in software implementation.  ...  Table 2 : 2 Comparison of hardware complexity Block Cipher Hardware complexity (in number of 4 input LUTs) LCASE 582 LUTs ICEBERG 704 LUTs AES 3376 LUTs Table 3 : 3 Comparison of execution time for a  ... 
dblp:journals/ijnsec/TripathyN09 fatcat:ghmmui5xdjdivlttcxpugroq6u

Forced to live side by side. Power, privacy and conflict in the Tor network

Daniele Pizio
2021
The analysis of Tor is structured around a careful reading of its fundamental design papers, an examination of the financial statements made public since 2008 by the To [...]  ...  These have been elaborated and tested in multiple historical contexts, such as the so called Arab Spring, the Anonymous movement, the Snowden's leaks, the rise of whistleblowing platforms in journalism  ...  their regulation by adding backdoors to cipher algorithms, so that they could have access to encrypted media whenever it was required for investigative purposes.  ... 
doi:10.25392/leicester.data.15155910.v1 fatcat:f66tdsjfjrezppt56k6flrtksi