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The microarchitecture of the IBM eServer z900 processor

E. M. Schwarz, M. A. Check, C.-L. K. Shum, T. Koehler, S. B. Swaney, J. D. MacDougall, C. A. Krygowski
2002 IBM Journal of Research and Development  
The microarchitecture of the IBM eServer z900 processor The recent IBM ESA/390 CMOS line of processors, from 1997 to 1999, consisted of the G4, G5, and G6 processors.  ...  Also, the hardware data compression and decimal arithmetic performance, though good, was in demand by database and COBOL programmers.  ...  Acknowledgments Processor development involves a considerable team effort, from logic design to millicode, to circuit design, and to verification.  ... 
doi:10.1147/rd.464.0381 fatcat:lk4d6qfbjnhxxm3itn5zfz6x4u

Processor subsystem interconnect architecture for a large symmetric multiprocessing system

P. Mak, G. E. Strait, M. A. Blake, K. W. Kark, V. K. Papazova, A. E. Seigler, G. A. Van Huben, L. Wang, G. C. Wellwood
2004 IBM Journal of Research and Development  
This paper describes the bus protocol on the second-level interconnect, the cache coherency management throughout the storage hierarchy, and the ring topology reconfiguration for hot swap.  ...  Integral to the significant capacity growth of the IBM eServer z990 (the eighth-generation zSeries CMOS-based server) from its predecessor z900 system is the interconnect architecture, which tightly couples  ...  Figure 5 5 Figure 5 IBM zSeries 990 storage hierarchy.  ... 
doi:10.1147/rd.483.0323 fatcat:jgcxhtxsqbdlhdzsvrcvehwpgm

First- and second-level packaging of the z990 processor cage

T.-M. Winkel, W. D. Becker, H. Harrer, H. Pross, D. Kaller, B. Garben, B. J. Chamberlin, S. A. Kuppinger
2004 IBM Journal of Research and Development  
In this paper, we describe the challenging first-and secondlevel packaging technology of a new system packaging architecture for the IBM eServer z990.  ...  In this super-blade design, the packaging complexity is increased dramatically over that of the previous zSeries eServer z900 to achieve increased volumetric density, processor performance, and system  ...  Acknowledgment The authors would like to thank Roland Frech for performing the VHDM connector measurements and for providing the coupling data in Table 4 .  ... 
doi:10.1147/rd.483.0379 fatcat:hr27o73sjjas7ii7km6q3suk7m