101 Hits in 6.1 sec

High-frequency pulse width modulation implementation using FPGA and CPLD ICs

Eftichios Koutroulis, Apostolos Dollas, Kostas Kalaitzakis
2006 Journal of systems architecture  
The contribution of this paper is the development of a high-frequency PWM generator architecture for power converter control using FPGA and CPLD ICs.  ...  Pulse width modulation (PWM) has been widely used in power converter control.  ...  In this paper, a novel architecture for the implementation of high-frequency PWM generation units for power converter control using FPGA and CPLD ICs is presented.  ... 
doi:10.1016/j.sysarc.2005.09.001 fatcat:hbtie4flfrh7rfnkmedhuyshcq

Survey on Neuro-Fuzzy Based Single Phase Multi-Level Inverters Using FPGA

Ameer Ahamed Z, Anuj Jain
2018 International Journal of Engineering & Technology  
inverters which is controlled using FPGA and NN.  ...  In this paper a survey is done on Multi level inverters using different control techniques to know how far FPGA and NN is better in performance for power electronic applications.  ...  According to The research paper published by IJSER journal is about Pulse Width Modulation Implementation using FPGA and CPLD ICs 1 Pulse Width Modulation Implementation using FPGA and CPLD ICs [11] .  ... 
doi:10.14419/ijet.v7i3.12.15851 fatcat:7g6ilsfwergwfcjteqsmn7mywa

Analysis of Velocity Measurement of Radar Signal in Space Vehicle.pdf

ganesh E N
processing received high speed analog 200MHz radar signal from target vehicle device through Antenna, analog preprocessing and FPGA based spectral analyzer.  ...  The desired algorithm is implemented on-chip reconfigurable hardware SOC-FPGA while keeping the cost, power and area of device low compared to general purpose processor and Embedded based microcontroller  ...  Proposed Module block Diagram ADC Interface : The Analog to digital converter used is ADS5463 an 80-pin IC which is a high speed ADC [9] .  ... 
doi:10.6084/m9.figshare.20417697.v1 fatcat:6yvpjchym5g25d2bdk4ghyvjnm

The IceCube data acquisition system: Signal capture, digitization, and timestamping

R. Abbasi, M. Ackermann, J. Adams, M. Ahlers, J. Ahrens, K. Andeen, J. Auffenberg, X. Bai, M. Baker, S.W. Barwick, R. Bay, J.L. Bazo Alba (+255 others)
2009 Nuclear Instruments and Methods in Physics Research Section A : Accelerators, Spectrometers, Detectors and Associated Equipment  
The sensors, called Digital Optical Modules (DOMs), detect, digitize and timestamp the signals from optical Cherenkov-radiation photons.  ...  IceCube is a km-scale neutrino observatory under construction at the South Pole with sensors both in the deep ice (InIce) and on the surface (IceTop).  ...  Those logic functions are implemented in a CPLD.  ... 
doi:10.1016/j.nima.2009.01.001 fatcat:hxwvkxnwynhuphtarrupy7tuqy

Plastic Optical Fibre Sensor System Design Using the Field Programmable Gate Array [chapter]

Yong Sheng Ong, Ian Grout, Elfed Lewis, Waleed Mohammed
2018 Selected Topics on Optical Fiber Technologies and Applications  
In this chapter, the use of the field programmable gate array (FPGA) is considered to implement the circuit functions that are required within a portable optical fibre sensor system that uses a light emitting  ...  diode (LED) as the light source, a photodiode as the light receiver and the FPGA to implement the system control, digital signal processing (DSP) and communications operations.  ...  Acknowledgements The authors would like to thank the European Union Erasmus Mundus LEADERS (Leading mobility between Europe and Asia in Developing Engineering Education and Research) scholarship programme  ... 
doi:10.5772/intechopen.71451 fatcat:6pr2nz42nvesvojjw6kz6r4gxu

Four-Step Current Commutation Strategy for a Matrix Converter Based on Enhanced-PWM MCU Peripherals

Luis Ramon Merchan-Villalba, Jose Merced Lozano-Garcia, Diego Armando de Jesus Gutierrez-Torres, Juan Gabriel Avina-Cervantes, Alejandro Pizano-Martinez
2019 Electronics  
the use of additional special hardware such as Field-Programmable Gate Arrays (FPGA) or Complex Programmable Logic Devices (CPLD) when controlling the MC.  ...  This strategy is based on the enhanced pulse width modulation peripheral included in the C 2000 Delfino 32-bit microcontroller of Texas Instruments.  ...  Acknowledgments: The authors would like to thank the Department of Electronic Engineering and Department of Electrical Engineering of the University of Guanajuato for its financial support.  ... 
doi:10.3390/electronics8050547 fatcat:m3ibcfpkqracna7kgw76arrya4

Design of Ultra-low-end Controllers for Efficient Stepper Motor Control

Mordecai Raji, Akeem Shokanbi, Happy Monday, X. Lei, S.P. Kozaitis, C.-C. Ku
2018 MATEC Web of Conferences  
This paper lays emphasis on thedevelopment of low cost controllers for stepper motors in contrast to its resource limitations such as memory size, few I/O pins and computing power compared to High-end  ...  The microchip AVR ATtiny45 microcontroller was employed alongside a redesigned (reduced-input pin count) pulse distribution circuit for two H-Bridge drivers.  ...  Therefore to achieve microstepping, the technique of Sinusoidal Pulse Width Modulation (PWM) is usually employed. SPWM is the sinusoidal variation of the Pulse Width of an output Signal.  ... 
doi:10.1051/matecconf/201816002003 fatcat:3t3zyxwigrfu5etdfkyu4biwq4

Reconfigurable Virtual Instrumentation Design for Radar using Object-Oriented Techniques and Open-Source Tools [chapter]

Ryan Seal, Julio Urbi
2010 Radar Technology  
The transmitted pulse is given by (2) where ω 0 is the transmitter's carrier frequency and m(t) is a periodic waveform that modulates the carrier signal with pulse width δ t and period T t .  ...  The RPG, in its most basic form, supplies the receiver's gating circuitry with a periodic pulse (gating pulse) of width δ r and period T t , as specified by m(t).  ...  :// © 2010 The Author(s).  ... 
doi:10.5772/7188 fatcat:ywkj2rat5vdbnoxwjj5ghxm5oy

A scalable, fast, and multichannel arbitrary waveform generator

M. T. Baig, M. Johanning, A. Wiese, S. Heidbrink, M. Ziolkowski, C. Wunderlich
2013 Review of Scientific Instruments  
circuit implemented using an FPGA.  ...  The device is operated using an internal clock and can be synced to other devices by means of the TTL pulses.  ...  Julius Krieg for his contribution to the design and prototyping of the control-board and Mr. Jrgen Geese for his contribution to the mechanical and electrical assembly of the device.  ... 
doi:10.1063/1.4832042 pmid:24387448 fatcat:ijo5un44czhhlecb4grtbmspdq

Design and performance of the multi-PMT optical module for IceCube Upgrade [article]

T. Anderson, L. Classen, A.T. Fienberg, S. Mechbal, J. Schneider, K.-H. Sulanke, M.A. Unland Elorrieta, C. Wendt
2021 arXiv   pre-print
The use of multiple, individually read-out PMTs allows directional information to be obtained for the registered photons and enables the use of multiplicity triggering within a single module, e.g., for  ...  The challenges driving the mDOM development included tight restrictions on module size, data-transfer rate, and power consumption as well as the harsh environment in the deep ice at the South Pole.  ...  Figure 3 : 3 Simplified block diagram of the mDOM mainboard. a powerful FPGA, a MCU (Microcontroller Unit), the ICM (IceCube Communication Module), a Xilinx CPLD, various sensors and the mDAB (mDOM Adapter  ... 
arXiv:2107.11383v1 fatcat:po6sjgkmwraota6m4jwmjnowsi

RGB LED Driver Circuit Design for an Optical Fiber Sensor System

Ian A. Grout, Muhaned Zaidi, Karel L. Sterckx, Abu Khari Bin A'ain
2017 ECTI Transactions on Computer and Information Technology  
The output of each LED color is to be independently controlled using either a d.c. current or a pulse width modulation (PWM) encoded current.  ...  The idea for, and architecture of, the mixed-signal electronic circuit design is considered as both a discrete implementation using off-the-shelf components and the concept for an application specific  ...  For example, both pulse frequency modulation (PFM) and pulse density modulation (PDM) schemes could also be utilised in this arrangement and would require only a change in the initial creation of the encoded  ... 
doi:10.37936/ecti-cit.2017112.63707 fatcat:nyd4syeoa5bkzf7tlkh2sbvjwm

KM3NeT front-end and readout electronics system: hardware, firmware and software [article]

The KM3NeT Collaboration: S. Aiello, F. Ameli, M. Andre, G. Androulakis, M. Anghinolfi, G. Anton, M. Ardid, J. Aublin, C. Bagatelas, G. Barbarino, B. Baret, S. Basegmez du Pree (+220 others)
2019 arXiv   pre-print
Each optical module houses 31 3-inch photomultiplier tubes, instrumentation for calibration of the photomultiplier signal and positioning of the optical module and all associated electronics boards.  ...  This paper presents an overview of the front-end and readout electronics system inside the optical module, which has been designed for a 1~ns synchronization between the clocks of all optical modules in  ...  acknowledge the financial support of the funding agencies: Agence Nationale de la Recherche (contract ANR-15-CE31-0020), Centre National de la Recherche Scientifique (CNRS), Commission Européenne (FEDER fund and  ... 
arXiv:1907.06453v2 fatcat:svjwisg3ibdobdouiczxwb6yz4

The Novel Image Signal Analysis of Monitoring Video Based on CMOS Image Sensor

Junhui FU, Jingqiao LV
2013 Sensors & Transducers  
In this paper, simulation results shows by using analog signal hardware simulation that the system can achieve the intended function and achieve the ideal effect.  ...  CMOS image sensor has the characteristics of low power, high integration and flexible function. The paper proposes the novel image signal analysis of monitoring video based on CMOS image sensor.  ...  When the microprocessor P_EN is set to a high level, and it is CPLD at the initial state. When P_EN is low, CPLD is in the preparation stage.  ... 
doaj:64ed28e4837044cf85860b75514d11e8 fatcat:bar2shj2kfhkdapgw2i3by7vyy

Low-Power GPS-Disciplined Oscillator Module for Distributed Wireless Sensor Nodes

Tyler J. Boehmer, Sven G. Bilén
2021 Electronics  
The circuit is implemented in a system called geoPebble, which uses a large grid of wireless sensors to perform glacial reflectometry.  ...  Many sensor systems, such as distributed wireless sensor arrays, require high-accuracy timing while maintaining low power consumption.  ...  CPLD combined into an FPGA) and more layers for the board.  ... 
doi:10.3390/electronics10060716 fatcat:zoy2mulevbbbjfhsvs7xk7ss64

Multichannel low power time-to-digital converter card with 21 ps precision and full scale range up to 10 μs

D. Tamborini, D. Portaluppi, F. Villa, S. Tisa, A. Tosi
2014 Review of Scientific Instruments  
Instrum. 84, 083107 (2013); 10.1063/1.4818965 10 ps resolution, 160 ns full scale range and less than 1.5% differential non-linearity time-to-digital converter module for high performance timing measurements  ...  Articles you may be interested in CMOS time-to-digital converter based on a pulse-mixing scheme Rev. Sci.  ...  When the START FF output is high, the STOP FF is enabled and only the first successive STOP pulse sets the FF output high.  ... 
doi:10.1063/1.4900863 pmid:25430129 fatcat:wmj5v5fjsza4liddosxclzfmvq
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