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High-performance parallel implementations of the NAS kernel benchmarks on the IBM SP2

R. C. Agarwal, B. Alpern, L. Carter, F. G. Gustavson, D. J. Klepacki, R. Lawrence, M. Zubair
<span title="">1995</span> <i title="IBM"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/kj3pclsbb5d3xpd5kqlzmvxa54" style="color: black;">IBM Systems Journal</a> </i> &nbsp;

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In this paper, we describe the parallel implementation of the five kernel benchmarks from this suite on the IBM SP2TM, a scalable, distributed memory parallel computer.  ...  High-performance implementations of these kernels have been obtained by mapping the computation of these kernels to the underlying architecture of the SP2 machine.  ...  Acknowledgments The authors are indebted to Mark Smith (IBM POWER Parallel Division) for performing the s p 2 runs used Gustavson, and  ... 
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R. C. Agarwal, B. Alpern, L. Carter, F. G. Gustavson, D. J. Klepacki, R. Lawrence, M. Zubair. "High-performance parallel implementations of the NAS kernel benchmarks on the IBM SP2." IBM Systems Journal 34.2 (1995) 263-272

Preface

Gene F. Hoffnagle
<span title="">1995</span> <i title="IBM"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/kj3pclsbb5d3xpd5kqlzmvxa54" style="color: black;">IBM Systems Journal</a> </i> &nbsp;

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In the second paper on NAS benchmarks for the SP2, Naik describes the parallel implementation of the NAS Parallel Benchmark BT (Block Tridiago- nal), which is designed to test the effectiveness of IBM  ...  In the first paper, Agar- wal et al. show the parallel implementation of the five NAS kernel benchmarks.  ... 
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Gene F. Hoffnagle. "Preface." IBM Systems Journal 34.2 (1995) 144-145

An Evaluation of High Performance Fortran Compilers Using the HPFBench Benchmark Suite [chapter]

Guohua Jin, Y. Charlie Hu
<span title="">1999</span> <i title="Springer Berlin Heidelberg"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/2w3awgokqne6te4nvlofavy5a4" style="color: black;">Lecture Notes in Computer Science</a> </i> &nbsp;

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In this paper, we report on an evaluation of two commercial HPF compilers, namely, xlhpf from IBM and pghpf from PGI, on an IBM SP2 using the linear algebra subset of the HPFBench benchmarks.  ...  The High Performance Fortran (HPF) benchmark suite HPF-Bench was designed for evaluating the HPF language and compilers on scalable architectures.  ...  The nodes are communicating through IBM's MPL library on the IBM SP2 high-performance switch network with a peak node-to-node bandwidth of 150 Mbytes/second.  ... 
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Guohua Jin, Y. Charlie Hu. "An Evaluation of High Performance Fortran Compilers Using the HPFBench Benchmark Suite." Lecture Notes in Computer Science (1999) 248-257

Performance results for a reliable low-latency cluster communication protocol [chapter]

Stephen R. Donaldson, Jonathan M. D. Hill, David B. Skillicorn
<span title="">1999</span> <i title="Springer Berlin Heidelberg"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/2w3awgokqne6te4nvlofavy5a4" style="color: black;">Lecture Notes in Computer Science</a> </i> &nbsp;

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Our results show that a executing a protocol in the kernel is not incompatible with high performance, and b complete control over the protocol stack enables 1 simple forms of ow control to beadopted, 2  ...  The result is a protocol which performs well in the context of parallel computation and the loose coupling of processes in the workstations of a cluster.  ...  David Skillicorn is supported in part by the Natural Science and Engineering Research Council of Canada.  ... 
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Stephen R. Donaldson, Jonathan M. D. Hill, David B. Skillicorn. "Performance results for a reliable low-latency cluster communication protocol." Lecture Notes in Computer Science (1999) 1097-1114

Contents of Volume 34, 1995

<span title="">1995</span> <i title="IBM"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/kj3pclsbb5d3xpd5kqlzmvxa54" style="color: black;">IBM Systems Journal</a> </i> &nbsp;

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Zlotek (G321-5566) Experiences with the IBM SP1 W. D. Gropp and E. Lusk (G321-5567) High-performance parallel implementations of the NAS kernel benchmarks on the IBM SP2 R. C. Agarwal, B. Alpern, L.  ...  Zubair (G321-5568) A scalable implementation of the NAS Parallel Benchmark BT on distributed memory systems V. K. Naik (G32i-5569) DB2 Parailel Edition C. K. Baru, G. Fecteau, A. Goyal, H. Hsiao, A.  ... 
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"Contents of Volume 34, 1995." IBM Systems Journal 34.4 (1995) 758-759

A scalable implementation of the NAS Parallel Benchmark BT on distributed memory systems

V. K. Naik
<span title="">1995</span> <i title="IBM"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/kj3pclsbb5d3xpd5kqlzmvxa54" style="color: black;">IBM Systems Journal</a> </i> &nbsp;

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In this paper, we describe an efficient and scalable implementation of the NAS Parallel Benchmark BT suitable for distributed memory systems such as the IBM Scalable POWERparallel Systems@.  ...  overheads on the IBM SP1" and SP2" systems.  ...  Acknowledgments The author is grateful to Idajean Fisher and Bob Walkup of the Center for Scalable Computing Solutions at the IBM T. J.  ... 
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V. K. Naik. "A scalable implementation of the NAS Parallel Benchmark BT on distributed memory systems." IBM Systems Journal 34.2 (1995) 273-291

Multi-Language Programming Environments for High Performance Java Computing

Vladimir Getov, Paul Gray, Sava Mintchev, Vaidy Sunderam
<span title="">1999</span> <i title="Hindawi Limited"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/fw4azkpu65d2thmrwfkoawyxse" style="color: black;">Scientific Programming</a> </i> &nbsp;

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A steadfast component of this dynamic evolution has been the scientific community's reliance on established scientific packages.  ...  As a consequence, programmers of high‐performance applications are reluctant to embrace evolving languages such as Java.  ...  Acknowledgements The authors acknowledge the use of the IBM SP2 installations at both the Cornell Theory Center and the University of Southampton.  ... 
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Vladimir Getov, Paul Gray, Sava Mintchev, Vaidy Sunderam. "Multi-Language Programming Environments for High Performance Java Computing." Scientific Programming 7.2 (1999) 139-146

HPFBench: a high performance Fortran benchmark suite

Y. Charlie Hu, Guohua Jin, S. Lennart Johnsson, Dimitris Kehagias, Nadia Shalaby
<span title="2000-03-01">2000</span> <i title="Association for Computing Machinery (ACM)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/nbwrdehgsngz7e2t5hbiap5vgq" style="color: black;">ACM Transactions on Mathematical Software</a> </i> &nbsp;

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Furthermore, we report an evaluation of an industry-leading HPF compiler from the Portland Group Inc. using the HPFBench benchmarks on the distributed-memory IBM SP2.  ...  The High Performance Fortran (HPF) benchmark suite HPFBench is designed for evaluating the HPF language and compilers on scalable architectures.  ...  [IBM 1996 ] for the IBM SP2.  ... 
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Citation

Y. Charlie Hu, Guohua Jin, S. Lennart Johnsson, Dimitris Kehagias, Nadia Shalaby. "HPFBench: a high performance Fortran benchmark suite." ACM Transactions on Mathematical Software 26.1 (2000) 99-149

High-performance parallel programming in Java: exploiting native libraries

Vladimir Getov, Susan Flynn Hummel, Sava Mintchev
<span title="">1998</span> <i title="Wiley"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/g5dm2rug7vbappj7xnqrzi3owm" style="color: black;">Concurrency Practice and Experience</a> </i> &nbsp;

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Performance results are presented for Java v ersions of two benchmarks from the NPB and PARKBENCH suites on an IBM SP2 distributedmemory machine using JDK and IBM's high-performance Java compiler.  ...  In this paper we discuss how new Java programs can capitalize on high-performance libraries for other languages.  ...  Experimental results In order to evaluate the performance of the Java binding to native libraries, we h a v e translated into Java a C + MPI benchmark | the IS kernel from the NAS Parallel Benchmark suite  ... 
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Vladimir Getov, Susan Flynn Hummel, Sava Mintchev. "High-performance parallel programming in Java: exploiting native libraries." Concurrency Practice and Experience 10.11-13 (1998) 863-872

Measurement of a Scientific Workload using the IBM Hardware Performance Monitor

R.J. Bergeron
<span title="">1998</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/zigbcra6rjdivda6lkzknwuo5q" style="color: black;">Proceedings of the IEEE/ACM SC98 Conference</a> </i> &nbsp;

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This paper presents data on the performance of the NAS SP2 IBM system using RS6000 hardware monitors and a performance measurement tool.  ...  Abstract This paper presents data on the performance of the NAS SP2 IBM system using RS6000 hardware monitors and a performance measurement tool.  ...  by a high-performance proprietary IBM network.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/sc.1998.10021">doi:10.1109/sc.1998.10021</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/sc/Bergeron98.html">dblp:conf/sc/Bergeron98</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/e22ahs3pcbds5lqyed43hx3hse">fatcat:e22ahs3pcbds5lqyed43hx3hse</a> </span>
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R.J. Bergeron. "Measurement of a Scientific Workload using the IBM Hardware Performance Monitor." Proceedings of the IEEE/ACM SC98 Conference (1998) 49

Early prediction of MPP performance: The SP2, T3D, and Paragon experiences

Zhiwei Xu, Kai Hwang
<span title="">1996</span> <i title="Elsevier BV"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/sv4mpg7lmfaqdp24ohp5qqiobm" style="color: black;">Parallel Computing</a> </i> &nbsp;

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We have tested the effectiveness of this early performance prediction scheme by running the MIT/STAP benchmark programs on a 400-node IBM SP2 system at the Maui High-Performance Computing Centre (MHPCC  ...  The high cost is partially caused by lack of early prediction of MPP performance. The program development cycle may iterate many times before achieving the desired performance level.  ...  We are grateful to the User-Support group at Maui High-Performance Computing Centre for their help.  ... 
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Zhiwei Xu, Kai Hwang. "Early prediction of MPP performance: The SP2, T3D, and Paragon experiences." Parallel Computing 22.7 (1996) 917-942

Scalable parallel computers for real-time signal processing

Kai Hwang, Zhiwei Xu
<span title="">1996</span> <i title="Institute of Electrical and Electronics Engineers (IEEE)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/txj4mzfpbne4hhwgo2ku5cycbq" style="color: black;">IEEE Signal Processing Magazine</a> </i> &nbsp;

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Benchmark performance results are presented along with some scalability analysis on machine and problem sizes.  ...  In particular, we evaluate the IBM SP2 at MHPCC [33], the Intel Paragon at SDSC [38], the Cray T3D at Cray Eagan Center [I], and the Cray T3E and ASCI TeraFLOP system recently proposed by Intel [32].  ...  The Project was supported by a research subcontract from MIT Lincoln Laboratory to USC. The revision of the paper was done a t the Universily of Hong Kong, subsequently. We  ... 
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Kai Hwang, Zhiwei Xu. "Scalable parallel computers for real-time signal processing." IEEE Signal Processing Magazine 13.4 (1996) 50-66

Resource scaling effects on MPP performance: the STAP benchmark implications

Kai Hwang, Choming Wang, Cho-Li Wang, Zhiwei Xu
<span title="">1999</span> <i title="Institute of Electrical and Electronics Engineers (IEEE)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/ll6bfs5o6bahfinh3u5z2cnyoy" style="color: black;">IEEE Transactions on Parallel and Distributed Systems</a> </i> &nbsp;

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Among three commercial MPPs, the IBM SP2 shows the highest speed and efficiency, attributed to its well-designed network with middleware support for single system image.  ...  Index TermsÐMassively parallel processors, SPMD parallelism, ASCI program, STAP benchmark, phase-parallel model, latency and bandwidth, scalability analysis, supercomputer performance.  ...  from the University of Hong Kong in 1998.  ... 
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Kai Hwang, Choming Wang, Cho-Li Wang, Zhiwei Xu. "Resource scaling effects on MPP performance: the STAP benchmark implications." IEEE Transactions on Parallel and Distributed Systems 10.5 (1999) 509-527

PM2: High Performance Communication Middleware for Heterogeneous Network Environments

T. Takahashi, S. Sumimoto, A. Hori, H. Harada, Y. Ishikawa
<span title="">2000</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/zigbcra6rjdivda6lkzknwuo5q" style="color: black;">ACM/IEEE SC 2000 Conference (SC&#39;00)</a> </i> &nbsp;

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According to a set of NAS parallel benchmark results, MPICH-SCore performance is better than dedicated communication libraries such as MPICH-BIP/SMP and MPICH-GM when running some benchmark programs. 0  ...  After showing the communication latency and bandwidth for the libraries listed above, results on NAS parallel benchmarks using the same libraries are shown.  ...  NAS Parallel Benchmark Results NAS parallel benchmarks, class A, on MPICH-SCore, MPICH-BIP/SMP, MPICH-GM, and LAM run using the cluster specified in Tables 4 and 5 .  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/sc.2000.10013">doi:10.1109/sc.2000.10013</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/sc/TakahashiSHHI00.html">dblp:conf/sc/TakahashiSHHI00</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/72gbdqbvm5axzlesse4iyip47y">fatcat:72gbdqbvm5axzlesse4iyip47y</a> </span>
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T. Takahashi, S. Sumimoto, A. Hori, H. Harada, Y. Ishikawa. "PM2: High Performance Communication Middleware for Heterogeneous Network Environments." ACM/IEEE SC 2000 Conference (SC'00) (2000) 16

BIP-SMP

Patrick Geoffray, Loïc Prylli, Bernard Tourancheau
<span title="">1999</span> <i title="ACM Press"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/zigbcra6rjdivda6lkzknwuo5q" style="color: black;">Proceedings of the 1999 ACM/IEEE conference on Supercomputing (CDROM) - Supercomputing &#39;99</a> </i> &nbsp;

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MPI-BIP MPI-BIP [15] is a high performance implementation of MPI [7] for Myrinet connected clusters using the BIP protocols.The current MPI-BIP implementation is based on the work done by Myricom on the  ...  ¡ A free software operating system : Linux provides the flexibility and performance needed. ¡ An efficient communication software layer like BIP (Basic Interface for Parallelism [16]).  ...  IS/NAS parallel benchmark The second measurement series are the IS/NAS [13] parallel benchmark 2.3 using class A.  ... 
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Patrick Geoffray, Loïc Prylli, Bernard Tourancheau. "BIP-SMP." Proceedings of the 1999 ACM/IEEE conference on Supercomputing (CDROM) - Supercomputing '99 (1999) 20

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