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Hierarchical backoff locks for nonuniform communication architectures

Z. Radovic, E. Hagersten
The Ninth International Symposium on High-Performance Computer Architecture, 2003. HPCA-9 2003. Proceedings.  
Nonuniform communication architectures (NUCAs), for example CC-NUMAs built from a few large nodes or from chip multiprocessors (CMPs), have a lower penalty for reading data from a neighbor's cache than  ...  We propose a set of simple software-based hierarchical backoff locks (HBO) that create node affinity in NUCAs. A solution for lowering the risk of starvation is also suggested.  ...  Scherer III, Department of Computer Systems, University of Rochester, for providing us with the source code for many of the tested locks.  ... 
doi:10.1109/hpca.2003.1183542 dblp:conf/hpca/RadovicH03 fatcat:i5pfcwxdsfa3rllxq35yuckr3u

A Hierarchical CLH Queue Lock [chapter]

Victor Luchangco, Dan Nussbaum, Nir Shavit
2006 Lecture Notes in Computer Science  
Modern multiprocessor architectures such as CC-NUMA machines or CMPs have nonuniform communication architectures that make programs highly sensitive to memory access locality.  ...  backoff locks of Radović and Hagersten.  ...  ACKNOWLEDGEMENTS We wish to thank Brian Whitney for getting us access to the E25K machine and Rick Hetherington for providing us architectural details of the T2000 machine.  ... 
doi:10.1007/11823285_84 fatcat:5mf2c54kyzhrtpf3ifwnh7cfh4

Flat-combining NUMA locks

Dave Dice, Virendra J. Marathe, Nir Shavit
2011 Proceedings of the 23rd ACM symposium on Parallelism in algorithms and architectures - SPAA '11  
With this shift, the need for scalable hierarchical locking algorithms is becoming crucial to performance.  ...  This paper presents a novel scalable hierarchical queue-lock algorithm based on the flat combining synchronization paradigm.  ...  backoff lock [5] and the HCLH hierarchical queue-lock [6] .  ... 
doi:10.1145/1989493.1989502 dblp:conf/spaa/DiceMS11 fatcat:g5z7mexjffb5divrfmimtbhiou

Latency Impact on Spin-Lock Algorithms for Modern Shared Memory Multiprocessors

Jan Christian Meyer, Anne Cathrine Elster
2008 2008 International Conference on Complex, Intelligent and Software Intensive Systems  
This prize was for their 1991 paper on algorithms for scalable synchronization on shared memory multiprocessors, which included a novel spin-lock algorithm (a.k.a. MCS spin-lock).  ...  Their empirical work and architectural suggestions have since had a major impact on how the field has viewed spin-locks.  ...  Lasse Natvig at NTNU and Helge Rustad at SINTEF for their valuable feedback on early versions of this work. Magnus Jahre and Rune E.  ... 
doi:10.1109/cisis.2008.132 dblp:conf/cisis/MeyerE08 fatcat:cpwlv7zlqzbwhmxtchnumfrngy

Spin-lock synchronization on the Butterfly and KSR1

Xiaodong Zhang, R. Castaneda, E.W. Chan
1994 IEEE Parallel & Distributed Technology Systems & Applications  
The execution behavior of spin-lock akorithms is significantly dzfferent between architectures based on multistage interconnection networks and those based on hierarchical rings. n e s e tests suggest  ...  A simple spin-lock is most common, but this method wastes processor cycles during delays. Moreover, a spinwait can generate extra traffic and consume communication bandwidth on the network.  ...  Hence, both architectures use nonuniform memory access (NUMA).  ... 
doi:10.1109/88.281875 fatcat:cowk56ycqrdrppztck6y6qtmty

Abstracting Multi-Core Topologies with MCTOP

Georgios Chatzopoulos, Rachid Guerraoui, Tim Harris, Vasileios Trigonakis
2017 Proceedings of the Twelfth European Conference on Computer Systems - EuroSys '17  
for locks.  ...  We illustrate several such policies through four examples: (i-ii) thread placement in OpenMP and in a MapReduce library, (iii) a topology-aware mergesort algorithm, as well as (iv) automatic backoff schemes  ...  Acknowledgments We wish to thank our shepherd, Jean-Pierre Lozi, and the anonymous reviewers for their fruitful comments on improving the paper.  ... 
doi:10.1145/3064176.3064194 dblp:conf/eurosys/ChatzopoulosG0T17 fatcat:xoxdudvpx5dcxph5lnkokoe2yy

An HTM-based update-side synchronization for RCU on NUMA systems

SeongJae Park, Paul E. McKenney, Laurent Dufour, Heon Y. Yeom
2020 Proceedings of the Fifteenth European Conference on Computer Systems  
RCX is a software-based synchronization mechanism combining hardware transactional memory (HTM) and traditional locking based on our NUMA-aware design principles for RCU.  ...  nonuniform memory access (NUMA) systems, mainly due to their lack of NUMA-aware design principles.  ...  Each of these variants protects updates using global locking, fine-grained hierarchical locking, STM, HTM, HTM-based locking, hierarchical HTM-based locking, and our algorithm, respectively.  ... 
doi:10.1145/3342195.3387527 dblp:conf/eurosys/ParkMDY20 fatcat:l3lo6xnmdfe5vlgeyfcmzmn2im

2005 index

2005 IEEE Communications Letters  
Information systems Computer architecture; cf. Reconfigurable architectures Computer network management dyn. commun. nets., near-optimal service facility location.  ...  ., nonuniform signalling, bonferroni-type bounds. Nguyen, H.H., + , COML Jul 05 583-585 context of runlength-limited-codes for opt. wireless communs., rateadaptive transm. schemes.  ...  Information rates adaptive RateLimit for 1xEV-DO reverse link traffic channels, rate control scheme BSased. HyeJeong Lee  ... 
doi:10.1109/lcomm.2005.1576594 fatcat:upvkv2oloze3jos34ny6hs6ove

Parallel Computers [chapter]

2011 Algorithms and Parallel Computing  
In this chapter, we discuss a hierarchical design methodology for deriving hierarchical SIMD processor architectures for FBMA, which possess adaptable sampling rates, adaptable processor complexity, low  ...  For example, we can hierarchically decompose 2 -D or 3 -D digital fi lters into modules of 1 -D fi lters.  ...  Therefore, the design of effi cient high -speed algo rithms and hardware architectures for computing GF(2 m ) multiplication are highly required and considered.  ... 
doi:10.1002/9780470932025.ch3 fatcat:riwzs7t2v5ed3ebod7nopld25e

Towards Scalable Synchronization on Multi-Cores

Vasileios Trigonakis
2016
More recently, Radovic and Hagersten [184, 185] were the first to propose hierarchical locks, tailored for NUMA architectures.  ...  We do so on different types of architectures, from single-socket-uniform and nonuniform-to multi-socket-directory and broadcast-based-multi-cores.  ...  : (i) cache-coherence protocols are deterministic by design, and (ii) communication latencies characterize the topology.  ... 
doi:10.5075/epfl-thesis-7246 fatcat:3v4eogrwerht5dsh35wtiinzpu

Real-Time Control over Wireless Networks [article]

Venkata Prashant Modekurthy
2020 arXiv   pre-print
In a centralized wireless stack design, a central manager generates routes and a communication schedule for a multi-channel time division multiple access communication (TDMA) based medium access control  ...  These applications require the wireless stack to provide a scalable, reliable, low-power and low-latency communication.  ...  An important technical challenge in our proposed hierarchical architecture is to deal with the interdependencies among the subnetworks.  ... 
arXiv:2011.03169v1 fatcat:ms6fyb45cbhyvkpfryjhpipgou

A distributed dynamic simulation mechanism for buildings automation and control systems [article]

A Azzedine Yahiaoui, JLM Jan Hensen, LL Luc Soethout
2013
circumstances, and the patience to wait for the reward(s).  ...  Acknowledgments This research work has certainly been a very exceptional and wonderful learning experience for me as it has also been a long journey full of many severe hardships and very difficult moments  ...  Exactly which part is for Building Automation and Control Systems 51 required depends on the type of the communication mechanism being used (e.g., files with lock and unlock facilities).  Dynamic coupling  ... 
doi:10.6100/ir759138 fatcat:fbsya7fqvfhrbht7qbzcfwbiye

Scaling Language Models: Methods, Analysis Insights from Training Gopher [article]

Jack W. Rae, Sebastian Borgeaud, Trevor Cai, Katie Millican, Jordan Hoffmann, Francis Song, John Aslanides, Sarah Henderson, Roman Ring, Susannah Young, Eliza Rutherford, Tom Hennigan (+68 others)
2021 arXiv   pre-print
Language modelling provides a step towards intelligent communication systems by harnessing large repositories of written human knowledge to better predict and understand the world.  ...  This includes the communication of activations between model shards as denoted by 'model parallelism', the pipeline bubble (Huang et al., 2019) , and the communication of gradients as part of the optimiser  ...  We use accelerator time to versus FLOPs to reflect the time spent in communication and on operations bottlenecked on data movement such as relative attention.  ... 
arXiv:2112.11446v1 fatcat:2orxz7y3w5g7hpbpdtp5c623za

Cascading Network Failure in Power Grid Blackouts [chapter]

Dr.Ian Dobson
2014 Encyclopedia of Systems and Control  
One potential solution relies on a centralized control architecture in which each DER is directly coordinated by (and communicates with) a central decision maker.  ...  control CV 1;s D CV 1;max backoff For example, to avoid exceeding the speed limit of 100 km/h, we may set backoff D 5 km/h, and use a setpoint v s D 95 km/h rather than 100 km/h.  ...  M .K 1/ for which ! j D J j .i; x i I u ? M .i /; : : : ; u ? M the projection of !  ... 
doi:10.1007/978-1-4471-5102-9_264-1 fatcat:slhzrvsilfephprfzlkkccbyma

Cooperative Manipulators [chapter]

Fabrizio Caccavale
2015 Encyclopedia of Systems and Control  
One potential solution relies on a centralized control architecture in which each DER is directly coordinated by (and communicates with) a central decision maker.  ...  control CV 1;s D CV 1;max backoff For example, to avoid exceeding the speed limit of 100 km/h, we may set backoff D 5 km/h, and use a setpoint v s D 95 km/h rather than 100 km/h.  ...  M .K 1/ for which ! j D J j .i; x i I u ? M .i /; : : : ; u ? M the projection of !  ... 
doi:10.1007/978-1-4471-5058-9_175 fatcat:gzo7xen4ynezhesyrpsldzj5bi
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