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SPAID: software prefetching in pointer- and call-intensive environments

M.H. Lipasti, W.J. Schmidt, S.R. Kunkel, R.R. Roediger
1995 Proceedings of the 28th Annual International Symposium on Microarchitecture  
This paper proposes a new heuristic-SPAID-for utilizing prefetch instructions in pointer-and call-intensive environments.  ...  We use trace-driven cache simulation of a number of pointer-and call-intensive benchmarks to evaluate the benefits and implementation trade-offs of SPAID.  ...  Memory traffic Once again, this data reinforces the need for better heuristics for selecting which pointers to prefetch at call sites.  ... 
doi:10.1109/micro.1995.476830 dblp:conf/micro/LipastiSKR95 fatcat:5od7gljt2ndqjfcps2ti7mfbzi

Energy-Aware Data Prefetching for General-Purpose Programs [chapter]

Yao Guo, Saurabh Chheda, Israel Koren, C. Mani Krishna, Csaba Andras Moritz
2005 Lecture Notes in Computer Science  
This paper proposes several techniques to make hardware-based data prefetching power-aware.  ...  There has been intensive research on data prefetching focusing on performance improvement, however, the energy aspect of prefetching is relatively unknown.  ...  Profiling was used to select which load instructions generate data references that are useful prefetch triggers.  ... 
doi:10.1007/11574859_6 fatcat:kpuecakaxfcrfmn7cae7qszp24

Energy-Efficient Hardware Data Prefetching

Yao Guo, Pritish Narayanan, Mahmoud Abdullah Bennaser, Saurabh Chheda, Csaba Andras Moritz
2011 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
Index Terms-Compiler analysis, data prefetching, energy efficiency, prefetch filtering, prefetch hardware.  ...  This paper provides a detailed evaluation on the energy impact of hardware data prefetching and then presents a set of new energy-aware techniques to overcome prefetching energy overhead of such schemes  ...  During a search operation, the reference data are driven to and compared in parallel with all locations in the CAM array.  ... 
doi:10.1109/tvlsi.2009.2032916 fatcat:kt2f2lmks5df3by3drdqestgwa

Dynamic hot data stream prefetching for general-purpose programs

Trishul M. Chilimbi, Martin Hirzel
2002 Proceedings of the ACM SIGPLAN 2002 Conference on Programming language design and implementation - PLDI '02  
Our technique runs on stock hardware, is completely automatic, and works for generalpurpose programs, including pointer-chasing codes written in weakly-typed languages, such as C and C++.  ...  First, the profiling phase gathers a temporal data reference profile from a running program with low-overhead.  ...  On future traversals of the data structure, the targets of these extra pointers are prefetched. Natural jump pointers are existing pointers in the data structure used for prefetching.  ... 
doi:10.1145/512553.512554 fatcat:d6bhksewxnfprjjsu563qi2msm

Dynamic hot data stream prefetching for general-purpose programs

Trishul M. Chilimbi, Martin Hirzel
2002 SIGPLAN notices  
Our technique runs on stock hardware, is completely automatic, and works for generalpurpose programs, including pointer-chasing codes written in weakly-typed languages, such as C and C++.  ...  First, the profiling phase gathers a temporal data reference profile from a running program with low-overhead.  ...  On future traversals of the data structure, the targets of these extra pointers are prefetched. Natural jump pointers are existing pointers in the data structure used for prefetching.  ... 
doi:10.1145/543552.512554 fatcat:xw5o36vlb5dxde3hbo64jrb4n4

Dynamic hot data stream prefetching for general-purpose programs

Trishul M. Chilimbi, Martin Hirzel
2002 Proceedings of the ACM SIGPLAN 2002 Conference on Programming language design and implementation - PLDI '02  
Our technique runs on stock hardware, is completely automatic, and works for generalpurpose programs, including pointer-chasing codes written in weakly-typed languages, such as C and C++.  ...  First, the profiling phase gathers a temporal data reference profile from a running program with low-overhead.  ...  On future traversals of the data structure, the targets of these extra pointers are prefetched. Natural jump pointers are existing pointers in the data structure used for prefetching.  ... 
doi:10.1145/512529.512554 dblp:conf/pldi/ChilimbiH02 fatcat:l7ki2agdhnhhlpwl3uxpkzp2wi

Techniques for bandwidth-efficient prefetching of linked data structures in hybrid prefetching systems

Eiman Ebrahimi, Onur Mutlu, Yale N. Patt
2009 2009 IEEE 15th International Symposium on High Performance Computer Architecture  
Our solution has two new components: 1) a compilerguided prefetch filtering mechanism that informs the hardware about which pointer addresses to prefetch, 2) a coordinated prefetcher throttling mechanism  ...  This paper proposes a low-cost hardware/software cooperative technique that enables bandwidth-efficient prefetching of linked data structures.  ...  Acknowledgments Many thanks to Chang Joo Lee, Veynu Narasiman, other HPS members and the anonymous reviewers for their comments and suggestions.  ... 
doi:10.1109/hpca.2009.4798232 dblp:conf/hpca/EbrahimiMP09 fatcat:5nrfndrvubgdnjj7flsqf7s4fe

SAD Prefetching for MPEG4 Using Flux Caches [chapter]

Georgi N. Gaydadjiev, Stamatis Vassiliadis
2006 Lecture Notes in Computer Science  
In this paper, we consider flux caches prefetching and a media application. We analyze the MPEG4 encoder workload with realistic data set in a scenario representative for the embedded systems domain.  ...  Our study shows that different well known data prefetch mechanisms can gain little reduction in the cache miss ratios when applied on the complete MPEG4 application.  ...  of addresses unknown at compile time, e.g. pointer references.  ... 
doi:10.1007/11796435_26 fatcat:g6r6nqydtbenvngk246so3676e

Tolerating memory latency through software-controlled pre-execution in simultaneous multithreading processors

Chi-Keung Luk
2001 Proceedings of the 28th annual international symposium on Computer architecture - ISCA '01  
Hardly predictable data addresses in man), irregular applications have rendered prefetching ineffective.  ...  ., no integration of pre-execution results, no need of shortening programs for pre-execution, and no need of special hardware to copy register values upon thread spawns).  ...  In addition, I thank the Asim team for supporting the simulator and the Alpha 21464 team for graciously sharing their computing resources.  ... 
doi:10.1145/379240.379250 dblp:conf/isca/Luk01 fatcat:m6tbsizugvhqpnuzyzqbf6fbbe

Remove the memory wall: from performance modeling to architecture optimization

Xian-He Sun
2006 Proceedings 20th IEEE International Parallel & Distributed Processing Symposium  
evaluation) • Prefetch-on-miss -when a cache miss occurs, next predicted address is prefetchedPrefetch Always -for each demand reference • Tagged Prefetching -when a data block is first  ...  data has to be accessed from lower levels of memory hierarchy • Solution: Prefetching-fetch the data before the processor demands for it 11/29/2006 5 Existing Prefetching • Move data closer  ... 
doi:10.1109/ipdps.2006.1639621 dblp:conf/ipps/Sun06 fatcat:nkbkmrmaendy7h4utvm7ou3pqu

Tolerating memory latency through software-controlled pre-execution in simultaneous multithreading processors

Chi-Keung Luk
2001 SIGARCH Computer Architecture News  
Hardly predictable data addresses in many irregular applications have rendered prefetching ineffective.  ...  ., no integration of pre-execution results, no need of shortening programs for pre-execution, and no need of special hardware to copy register values upon thread spawns).  ...  In addition, I thank the Asim team for supporting the simulator and the Alpha 21464 team for graciously sharing their computing resources.  ... 
doi:10.1145/384285.379250 fatcat:a5dhmeb7wvglxiaeujrrekmtca

Semantics-Aware, Timely Prefetching of Linked Data Structure

Gang Liu, Zhuo Huang, Jih-kwon Peir, Xudong Shi
2010 2010 IEEE 16th International Conference on Parallel and Distributed Systems  
In addition, we evaluate three hardware-based leap prefetching methods to timely fetch the nodes further ahead in the traversal path for overcoming the lateness in LDS prefetching.  ...  Furthermore, the irregularity of missing block addresses makes it difficult for accurate data prefetching without recording a huge miss history.  ...  DBP dynamically generates compact representation for specialized pointer-traversal hardware.  ... 
doi:10.1109/icpads.2010.70 dblp:conf/icpads/LiuHPS10 fatcat:zpmg6ixj2vguzn76c5jleouec4

A general framework for prefetch scheduling in linked data structures and its application to multi-chain prefetching

Seungryul Choi, Nicholas Kohout, Sumit Pamnani, Dongkeun Kim, Donald Yeung
2004 ACM Transactions on Computer Systems  
Third, we propose a hardware prefetch engine that traverses pointer-based data structures and overlaps multiple pointer chains according to the computed prefetch schedule.  ...  First, we introduce a framework for compactly describing LDS traversals, providing the data layout and traversal code work information necessary for prefetching.  ...  Prefetches issued for link nodes near the beginning of a pointer chain tend to arrive early. Until the processor references the prefetched data, these early prefetches occupy the prefetch buffer.  ... 
doi:10.1145/986533.986536 fatcat:dxzpgbsbxjazbddavyftouka2u

Page 275 of IEEE Transactions on Computers Vol. 52, Issue 3 [page]

2003 IEEE Transactions on Computers  
Cheung, “Hardware-Driven Prefetching for Pointer Data References,” Proc. Int'l Conf. Supercomputing, pp. 377-384, June 1998 [12] G. Chrysos and J.  ...  Baer, “Effective Hardware-Based Data Prefetching for High Performance Processors,” [EEE Trans Computers, vol. 44, no. 5, pp. 609-623, May 1995 [!11] C. Chi and C.  ... 

PARE: a power-aware hardware data prefetching engine

Yao Guo, M.B. Naser, C.A. Moritz
2005 ISLPED '05. Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005.  
Aggressive hardware prefetching often significantly increases energy consumption in the memory system.  ...  In this paper, we present PARE, a Power-Aware pRefetching Engine that uses a newly designed indexed hardware history table.  ...  During a search operation, the reference data are driven to and compared in parallel with all locations in the CAM array.  ... 
doi:10.1109/lpe.2005.195544 fatcat:7wqsd5mtzzbpzfjymeqzmpi2pi
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