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A case study of hardware and software synthesis in ForSyDe

Zhonghai Lu, Ingo Sander, Axel Jantsch
2002 Proceedings of the 15th international symposium on System Synthesis - ISSS '02  
In this paper we illustrate with a case study of a digital equalizer how a ForSyDe model can be synthesized into a hardware, a software or a combined hardware/software implementation.  ...  Starting with a formal system specification, which captures the functionality of the system, it provides refinement methods inside the functional domain to transform the abstract specification into an  ...  Processes communicate via variables shared by the communicating processes. Skeletons are translated into function templates in software.  ... 
doi:10.1145/581214.581219 fatcat:g2kw44clh5egpo7xek2h4czh4q

A case study of hardware and software synthesis in ForSyDe

Zhonghai Lu, Ingo Sander, Axel Jantsch
2002 Proceedings of the 15th international symposium on System Synthesis - ISSS '02  
In this paper we illustrate with a case study of a digital equalizer how a ForSyDe model can be synthesized into a hardware, a software or a combined hardware/software implementation.  ...  Starting with a formal system specification, which captures the functionality of the system, it provides refinement methods inside the functional domain to transform the abstract specification into an  ...  Processes communicate via variables shared by the communicating processes. Skeletons are translated into function templates in software.  ... 
doi:10.1145/581199.581219 fatcat:omd55iospjgr3nrewpnhslswsi

C- Based Rapid Prototyping For Digital Signal Processing

Bertrand Le Gal, Emmanuel Casseau, Sylvain Huet, Pierre Bomel, Christophe Jego, Eric Martin
2005 Zenodo  
Publication in the conference proceedings of EUSIPCO, Antalya, Turkey, 2005  ...  decoding in digital communication [8] .  ...  Handshaking protocols are automatically refined by the GAUT tool to fit with the selected inter-node platform communication interfaces (bus width, signal names, etc …).  ... 
doi:10.5281/zenodo.38823 fatcat:jonh2qvebzexpprnticzbkya5m

Using codesign techniques to support analog functionality

Francis G. Wolff, Michael J. Knieser, Dan J. Weyer, Chris A. Papachristou
1999 Proceedings of the seventh international workshop on Hardware/software codesign - CODES '99  
With the growth of System on a Chip (SoC), the functionality of analog components must also be considered in the design process.  ...  Many system-level issues were addressed including hardware/software codesign trade-offs.  ...  In this design, analog to digital codesign tradeoff was the number of bits to process the signal with the required accuracy.  ... 
doi:10.1145/301177.301492 dblp:conf/codes/WolffKWP99 fatcat:xoq3iuo53bd55gfcubp6bqdz5m

Hardware/software co-design of digital telecommunication systems

I. Bolsens, H.J. De Man, B. Lin, K. Van Rompaey, S. Vercauteren, D. Verkest
1997 Proceedings of the IEEE  
In this paper we reflect on the nature of digital telecommunication systems.  ...  The principles of CoWare will be illustrated by the design process of a spread-spectrum receiver for a pager system.  ...  Digital communication systems are made possible by the combination of very large scale integrated (VLSI) technology and digital signal processing (DSP).  ... 
doi:10.1109/5.558713 fatcat:tn23s7ya45ddxomyni5q76mb5a

System Modeling and Transformational Design Refinement in ForSyDe

I. Sander, A. Jantsch
2004 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
In a study of a digital equalizer example, we illustrate the modeling and refinement process and focus in particular on refinement of the clock domain, communication refinement, and resource sharing.  ...  To this end, process constructors and processes have a hardware and software interpretation which shall facilitate accurate performance and cost estimations.  ...  The processes communicate with each other by means of signals.  ... 
doi:10.1109/tcad.2003.819898 fatcat:yzmyipmr4vhe3bbvjm5c3vrg4e

Transformation based communication and clock domain refinement for system design

I. Sander, A. Jantsch
2002 Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324)  
In particular we present and illustrate communication and clock domain refinement by way of a digital equalizer system.  ...  In this paper we present formal transformation methods for the refinement of an abstract and formal system model into an implementation model.  ...  A SoC (System-on-a-Chip) architecture can include a variety of components, such as analog parts, micro controller cores, digital signal processor cores, memories, IP blocks and custom hardware.  ... 
doi:10.1109/dac.2002.1012636 fatcat:roghwivr5bb73ov5xbazxx5xc4

Transformation based communication and clock domain refinement for system design

Ingo Sander, Axel Jantsch
2002 Proceedings - Design Automation Conference  
In particular we present and illustrate communication and clock domain refinement by way of a digital equalizer system.  ...  In this paper we present formal transformation methods for the refinement of an abstract and formal system model into an implementation model.  ...  A SoC (System-on-a-Chip) architecture can include a variety of components, such as analog parts, micro controller cores, digital signal processor cores, memories, IP blocks and custom hardware.  ... 
doi:10.1145/513918.513992 dblp:conf/dac/SanderJ02 fatcat:vrqtur2rzvd4bg6oygiiqrmgn4

Transformation based communication and clock domain refinement for system design

Ingo Sander, Axel Jantsch
2002 Proceedings - Design Automation Conference  
In particular we present and illustrate communication and clock domain refinement by way of a digital equalizer system.  ...  In this paper we present formal transformation methods for the refinement of an abstract and formal system model into an implementation model.  ...  A SoC (System-on-a-Chip) architecture can include a variety of components, such as analog parts, micro controller cores, digital signal processor cores, memories, IP blocks and custom hardware.  ... 
doi:10.1145/513991.513992 fatcat:ikzix5lfm5febewhfgluw4suym

The Andres Project: Analysis and Design of Run-Time Reconfigurable, Heterogeneous Systems

A. Herrholz, F. Oppenheimer, P. A. Hartmann, A. Schallenberg, W. Nebel, C. Grimm, M. Damm, J. Haase, F. Brame, F. Herrera, E. Villar, I. Sander (+3 others)
2007 2007 International Conference on Field Programmable Logic and Applications  
Today's heterogeneous embedded systems combine components from different domains, such as software, analogue hardware and digital hardware.  ...  Using domain-specific modelling extensions and libraries, ANDRES will provide means to efficiently use and exploit adaptivity in embedded system design.  ...  ANDRES uses a formally defined, hierarchical heterogeneous MoC, which is illustrated in Figure 2 . Processes communicate via signals.  ... 
doi:10.1109/fpl.2007.4380679 dblp:conf/fpl/HerrholzOHSNGDHBHVSJFM07 fatcat:uhneslblq5etlkorfljeiefxcu

Codesign Methodology of Real-time Embedded Controllers for Electromechanical Systems

Slim Ben Saoud, Andreas Gerstlauer, Daniel D. Gajski
2005 American Journal of Applied Sciences  
Then, we describe the different steps and transformations used to convert this model to a communication model and finally an implementation model ready for manufacturing.  ...  This requirement can be satisfied only by using a well-defined system-level design methodology and by reducing the migration time between the algorithm development language and the hardware specification  ...  Communication Synthesis refines the abstract communication between components in the architecture model into an implementation over actual busses.  ... 
doi:10.3844/ajassp.2005.1331.1336 fatcat:ejzlsb67e5evdngivv32lh2cgu

Development and application of design transformations in ForSyDe

I. Sander, A. Jantsch, Z. Lu
2003 IEE Proceedings - Computers and digital Techniques  
Starting with a formal specification model, that captures the functionality of the system at a high abstraction level, it provides formal design transformation methods for a transparent refinement process  ...  The main contribution of this paper is the formal treatment of transformational design refinement.  ...  Refinement of a FIR-filter We will now use the developed transformation SerialClockDomain for the refinement of a FIR-filter which is part of the specification model of a digital equalizer [12] .  ... 
doi:10.1049/ip-cdt:20030836 fatcat:lceyjklwtfbopdwcobw3l2wzze

Design Methodologies and Innovative Architectures for Mixed-Signal Embedded Systems

Sergio Saponara, Pierluigi Nuzzo, Paolo D'Abramo, Luca Fanucci
2010 EURASIP Journal on Embedded Systems  
Digital subsystems, such as microprocessors, memories, or communication interfaces, can be integrated onto the same substrate (System-on-Chip) or the same package (System-in-Package) together with RF blocks  ...  Overcoming the classic dichotomy between analog and digital domains, such new generation of mixed-signal embedded systems is fueling the development of more efficient and performance solutions in several  ...  In "Mixed-signal architectures for high efficiency and low distortion digital audio processing and power amplification," from the University of Pisa, the algorithmic and architectural design of digital  ... 
doi:10.1155/2010/641261 fatcat:3piubqsf2zbaxeac26kyobu6tm

A petri nets based design of cognitive radios using distributed signal processing

Christoph Spiegel, Alexander Viessmann, Admir Burnic, Christian Kocks, Andreas Waadt, Ernest Scheiber, Konstantin Statnikov, Guido H. Bruck, Peter Jung
2009 Procedia Earth and Planetary Science  
The signal processing in both SR and SDR requires a considerable amount of concurrent processes.  ...  This demonstrator makes use of a digital signal processor (DSP) which forms the core of the design and flexibly programmable hardware accelerators based on field programmable gate arrays (FPGAs).  ...  Acknowledgements The authors of this communication gratefully acknowledge the generous support by Thomson, Analog Devices and Texas Instruments.  ... 
doi:10.1016/j.proeps.2009.09.227 fatcat:cpgepybnlbh7vchkhlj4u325pu

Implementation of a hardware functional verification system using SystemC infrastructure

Myoung-Keun You, Yong-Jin Oh, Gi-Yong Song
2009 TENCON 2009 - 2009 IEEE Region 10 Conference  
SystemC is used in system-level design methodology because of the capability of system architectural model description and hardware/software design.  ...  The implemented verification system, which consists of various SystemC modules, in this paper can explore design space using SystemC and verify functional correction of progressive refined module in RTL  ...  Transposed FIR Filter Digital filters [9] are typically used to modify or alter the attributes of a signal in the time or frequency domain.  ... 
doi:10.1109/tencon.2009.5395830 fatcat:l6b4u6uvuzb5vhmfba33nx4aji
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