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Native offload of Haskell repa programs to integrated GPUs

Hai Liu, Laurence E. Day, Neal Glew, Todd A. Anderson, Rajkishore Barik
2014 Proceedings of the 3rd ACM SIGPLAN workshop on Functional high-performance computing - FHPC '14  
benchmarks, comparing to two different CPUs, and for one benchmark to handwritten OpenCL code. • Repa programs are statically type-checked and compiled, whilst those written using Accelerate are only  ...  compiled at runtime. • The DSL compiler for Accelerate has to re-implement optimizations already implemented by the host-language compiler.  ...  Accelerate [4] and Obsidian [22] are two examples of this approach, using the functional language Haskell.  ... 
doi:10.1145/2636228.2636236 dblp:conf/icfp/LiuDGAB14 fatcat:7pq4rowtrrghvjwuva5gtoqdye

Automatic Image and Video Caption Generation with Deep Learning: A Concise Review and Algorithmic Overlap

Soheyla Amirian, Khaled Rasheed, Thiab R. Taha, Hamid R. Arabnia
2020 IEEE Access  
They have used Single-Stream Temporal Action model to get some proposals at a single scan, then by implying PtrNet, the highly correlated events that makeup an episode fed into a sequentional captioning  ...  CIDEr was first developed specifically for evaluating image captioning tasks, but it is also used in video captioning methods. 4) ROUGE: Recall-Oriented Understudy for Gisting Evaluation [52] determines  ... 
doi:10.1109/access.2020.3042484 fatcat:ssl5awoxlrb5rdxbekvv3af74u

Efficient query processing in co-processor-accelerated databases [article]

Sebastian Breß, Universitäts- Und Landesbibliothek Sachsen-Anhalt, Martin-Luther Universität, Gunter Saake
This thesis shows how we can build database management systems that efficiently use heterogeneous processors to reliably accelerate database query processing.  ...  Our investigations show that co-processors can significantly slow down a DBMS when not used appropriately and develop approaches that avoid using co-processors when we expect a performance degradation.  ...  To speed up GiST lookup operations with coprocessors such as GPUs, Beier and others implemented a framework that abstracts from the hardware where index scans are actually executed and therefore, hide  ... 
doi:10.25673/4341 fatcat:h3qtmqalyvbmvfjernh7hxa3qe

Development of an embedded device for real-time detection of atrial fibrillation and atrial flutter in single-channel ECG, using optimised classification based on a large training corpus

Eric Auer, Oliver Scholz, Daniel Strauss
2021 Zenodo  
The algorithm uses morphological analysis of the averaged ECG shape, properties of the R/R interval distribution and spectral analysis of the ECG to create a feature vector used for classification.  ...  Building on an earlier proof of concept project work by the author, this thesis presents a fully integrated, custom device, using an advanced classification algorithm trained on thousands of short, annotated  ...  Scan for maximum before S to find R. If R is positive, scan 120 ms for next minimum to find S.  ... 
doi:10.5281/zenodo.4560150 fatcat:4cvxfe4jgreuxkbrdqiai2usiq

Acceleration of image recognition on Caffe framework using FPGAs [article]

Dimitrios Danopoulos, National Technological University Of Athens, National Technological University Of Athens
Then the input image is scanned for features using small filters. This feature extraction starts with the input image where each pixel represents the input for the neurons grouped in features.  ...  They share a standard format for packaging in Caffe and are found in a central wiki page for sharing info Gists.  ...  The following tables list all the data movers and various properties for each used in each kernel.  ... 
doi:10.26240/heal.ntua.16108 fatcat:33zjldcl5zgddf3vwupersbgla

Design of large polyphase filters in the Quadratic Residue Number System

Gian Carlo Cardarilli, Alberto Nannarelli, Yann Oster, Massimo Petricca, Marco Re
2010 2010 Conference Record of the Forty Fourth Asilomar Conference on Signals, Systems and Computers  
Mixed simulation approaches which makes use of analytical models as a means of acceleration are proposed.  ...  We study the implementation of DBNS recoding schemes in FPGA for secure ECC coprocessors.  ... 
doi:10.1109/acssc.2010.5757589 fatcat:ccxnu5owr5fyrcjcqukumerueq

Year 2 Editor-in-chief Proceedings of the Croatian Computer Vision Workshop

E D I N G S O F P R O C E, Third Croatian, S Lončarić, M Subašić, Donators, Sven Lončarić, Marko Subašić, Tomislav Petković
2014 Proceedings of the Croatian Computer Vision Workshop CCVW   unpublished
The authors wish to thank Thomas Mensink for useful suggestions regarding the choice of Combined Linear approach for comparison.  ...  A special coprocessor, the Viewmont video analytics coprocessor, has been provided by Intel, who is a partner on the project.  ...  For the GIST descriptor we used an implementation provided by its authors [11] .  ... 

Practical symbolic execution analysis and methodology for GPU programs

Peng Li
in the acceleration of a wide range of computationally intensive tasks.  ...  Peng Li has been approved by the following supervisory committee members: Ganesh Gopalakrishnan , Chair ABSTRACT Graphics processing units (GPUs) are highly parallel processors that are now commonly used  ...  GPUs are widely used as parallel coprocessors under the control of a host CPU in a heterogeneous system.  ... 
doi:10.26053/0h-ghpf-rrg0 fatcat:bnd6pqzeofdonjnua7xqelrmkq

CS1 pedagogical approach to parallel thinking

Brian William Rague
A new evaluation instrument developed for this study, the Perceptions of Parallelism Survey (PoPS), was used to measure student learning regarding parallel systems.  ...  Logical thinking is highlighted, guided primarily by a sequential approach to algorithm development and made manifest by typically using the latest, commercially successful programming language.  ...  Efficient network interface, pro- tection, events, active messages, and coprocessors in large-scale designs.  ... 
doi:10.26053/0h-nkf7-zr00 fatcat:h546o2dmvndjxem477synfciza