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Generating custom propagators for arbitrary constraints

Ian P. Gent, Christopher Jefferson, Steve Linton, Ian Miguel, Peter Nightingale
2014 Artificial Intelligence  
Given an arbitrary constraint, we show how to generate a custom propagator that establishes GAC in small polynomial time.  ...  Many constraints have efficient constraint-specific propagation algorithms. In this work, we generate custom propagators for constraints.  ...  Acknowledgements We would like to thank anonymous reviewers for their helpful comments. This research was supported by EPSRC grants with numbers EP/H004092/1 and EP/E030394/1.  ... 
doi:10.1016/j.artint.2014.03.001 fatcat:pufj7ybntnenhb3fs5pjei6lna

An Integrated Modelling, Debugging, and Visualisation Environment for G12 [chapter]

Andreas Bauer, Viorica Botea, Mark Brown, Matt Gray, Daniel Harabor, John Slaney
2010 Lecture Notes in Computer Science  
We present G12IDE, a front-end for the G12 platform aimed at helping users create and work with constraint models in a manner independent from any underlying solver.  ...  G12IDE also includes a number of visualisation tools for drawing graphs and trees, and additionally allows users to create arbitrary domain-specific visualisations, such as the drawing of a sequential  ...  We thank the NICTA G12 team for their valued help and assistance in the development of this work.  ... 
doi:10.1007/978-3-642-15396-9_42 fatcat:q7zyalmj5faxbjn4zk2r64fqdq

Extended constraint management for analog and mixed-signal IC design

Andreas Krinke, Maximilian Mittag, Goran Jerke, Jens Lienig
2013 2013 European Conference on Circuit Theory and Design (ECCTD)  
In this paper, we propose a solution to these issues with a new methodology for constraint propagation and transformation.  ...  With constraints of this type the ON resistance of power stages in smart power ICs can be limited for the first time.  ...  Transformation and propagation of the R ON,max constraint generate R DS,ON,max and R max constraints for all relevant elements.  ... 
doi:10.1109/ecctd.2013.6662319 fatcat:sm3at7gcnjeg5gi5zzpc53qgmy

Generating Special-Purpose Stateless Propagators for Arbitrary Constraints [chapter]

Ian P. Gent, Chris Jefferson, Ian Miguel, Peter Nightingale
2010 Lecture Notes in Computer Science  
Given an arbitrary constraint c on n variables with domain size d, we show how to generate a custom propagator that establishes GAC in time O(nd) by precomputing the propagation that would be performed  ...  Propagation is so fast that, for constraints available in our solver, the generated propagator compares well with a human-optimised propagator for the same constraint.  ...  The algorithms we give herein generate GAC propagators for arbitrary constraints that run in time O(nd), in extreme cases an exponential factor faster than any table constraint propagator [4, 12, 7, 6  ... 
doi:10.1007/978-3-642-15396-9_19 fatcat:pzv6uhazsfb7vhh5eyk7xf5s4i

Nutmeg: a MIP and CP Hybrid Solver Using Branch-and-Check

Edward Lam, Graeme Gange, Peter J. Stuckey, Pascal Van Hentenryck, Jip J. Dekker
2020 SN Operations Research Forum  
At every node in the branch-and-bound search tree, the linear relaxation computes dual bounds and proposes solutions, which are checked for feasibility of the omitted constraints in the constraint programming  ...  Benders decomposition, but performs poorly on general problems, which lack specific decomposable structure.  ...  A general mechanism to strengthen cuts for arbitrary problems remains an important unanswered question.  ... 
doi:10.1007/s43069-020-00023-2 fatcat:f3etkpapkfcm5gj74oomzmtwze

Input-specific Dynamic Power Optimization for VLSI Circuits

Fei Hu, Vishwani D. Agrawal
2006 ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design  
Considering the worstcase these methods ensure absence of glitches for any arbitrary state of primary input as well as internal signals.  ...  We relax constraints of any existing LP either selectively or probabilistically.  ...  We define a glitch-generation pattern for a gate as the input vector pair that can potentially generate a glitch at the output of the gate for some arbitrary input and inertial delays.  ... 
doi:10.1109/lpe.2006.4271842 fatcat:gubc5tukzbeu7hvzrcpujrtxtq

Input-specific dynamic power optimization for VLSI circuits

Fei Hu, Vishwani D. Agrawal
2006 Proceedings of the 2006 international symposium on Low power electronics and design - ISLPED '06  
Considering the worstcase these methods ensure absence of glitches for any arbitrary state of primary input as well as internal signals.  ...  We relax constraints of any existing LP either selectively or probabilistically.  ...  We define a glitch-generation pattern for a gate as the input vector pair that can potentially generate a glitch at the output of the gate for some arbitrary input and inertial delays.  ... 
doi:10.1145/1165573.1165630 dblp:conf/islped/HuA06 fatcat:tls5dbkmvrhihggpi3toasmupq

Exploiting subproblem dominance in constraint programming

Geoffrey Chu, Maria Garcia de la Banda, Peter J. Stuckey
2011 Constraints  
In this paper we show how we can automatically and efficiently define keys for arbitrary constraint problems using constraint projection.  ...  We show how, for search problems where subproblem dominance arises, a constraint programming solver with this capability can solve these problems orders of magnitude faster than solvers without caching  ...  In particular, we have explained how to easily generate caching schemes for arbitrary complex global constraints.  ... 
doi:10.1007/s10601-011-9112-9 fatcat:iaeos4bquffkjii2g3v6oi5hpi

Automating Decisions in Component Composition Based on Propagation of Requirements [chapter]

Ioana Şora, Vladimir Creţu, Pierre Verbaeten, Yolande Berbers
2004 Lecture Notes in Computer Science  
Our composition strategy takes automatic decisions for the composition of a target that is specified through a set of required properties imposed over its given structural constraints.  ...  The composition strategy is driven by a mechanism of propagation of required properties, detailed in this paper.  ...  In the next subsection, the mechanism of propagation of requirements is generalized for components with an arbitrary number of input and output ports that are part of multiflow architectures of hierarchically  ... 
doi:10.1007/978-3-540-24721-0_28 fatcat:fqwvsydef5e65fvkvfexagu2q4

The Finite Domain Constraint Solver of SWI-Prolog [chapter]

Markus Triska
2012 Lecture Notes in Computer Science  
The constraint solver is fast enough for teaching and research purposes and is already being used in courses at several universities in France, Germany, Italy, Austria and other countries.  ...  the full semantics of constraint reification.  ...  Above all, I thank Lisa Marie and Maggy Zitz for giving me the motivation and energy to finish this paper, and their great example of working, writing and living.  ... 
doi:10.1007/978-3-642-29822-6_24 fatcat:xodl55jv3vdlbajf2qi465xdgy

Gradient-based optimization of custom circuits using a static-timing formulation

A. R. Conn, I. M. Elfadel, W. W. Molzen, P. R. O'Brien, P. N. Strenski, C. Visweswariah, C. B. Whan
1999 Proceedings of the 36th ACM/IEEE conference on Design automation conference - DAC '99  
A large-scale, general-purpose, nonlinear optimization package is used to solve the tuning problem.  ...  It employs efficient time-domain simulation and gradient computation for each channel-connected component.  ...  David Ling provided SPECS device models for all the tuning runs and was involved with the project from the start.  ... 
doi:10.1145/309847.309979 dblp:conf/dac/ConnEMOSVW99 fatcat:udp6if7rgvepjbnursvcphy3km

Implementing logical connectives in constraint programming

Christopher Jefferson, Neil C.A. Moore, Peter Nightingale, Karen E. Petrie
2010 Artificial Intelligence  
Therefore we investigate reification of constraints. We present a fast generic algorithm for reification using satisfying sets and movable triggers.  ...  By extending the OR propagator, we present a propagator for ATLEASTK, which expresses that at least k of its child constraints are satisfied in any solution.  ...  Acknowledgements We would like to thank the anonymous reviewers for their helpful comments about an earlier version of this paper.  ... 
doi:10.1016/j.artint.2010.07.001 fatcat:5iyuikpmpfhanh4u77sddmhf3u

Datapath Synthesis for Standard-Cell Design

Reto Zimmermann
2009 2009 19th IEEE Symposium on Computer Arithmetic  
Datapath synthesis for standard-cell design goes through extraction of arithmetic operations from RTL code, high-level arithmetic optimizations and netlist generation.  ...  This work summarizes the circuit architectures and techniques used in a commercial synthesis tool to optimize cell-based datapath netlists for timing, area and power.  ...  The algorithm is able to generate a serial-prefix structure for very loose constraints, a fast parallel-prefix structure for tight constraints, and a mix of both for constraints in between.  ... 
doi:10.1109/arith.2009.28 dblp:conf/arith/Zimmermann09 fatcat:jkfkcas22zbclkhpuos3t44h3m

A Beamline Matching application based on open source software

J.-F. Ostiguy
2001 AIP Conference Proceedings  
In particular, we discuss object-based event propagation mechanisms, multithreading, language mixing and persistence.  ...  Sliding cursors are displayed for each user-defined variable. Similarly, a custom widget is displayed created for each local constraint.  ...  Events In addition to the primitive event propagation mechanism provided by FLTK for GUI related events, BLIMP uses a generic event propagation scheme.  ... 
doi:10.1063/1.1405281 fatcat:2yvhfx53szcshpvf3ualdybf2a

The Anatomy of a Sales Configurator: An Empirical Study of 111 Cases [chapter]

Ebrahim Khalil Abbasi, Arnaud Hubaux, Mathieu Acher, Quentin Boucher, Patrick Heymans
2013 Lecture Notes in Computer Science  
In many cases, configurators have become the single entry point for placing customer orders.  ...  Nowadays, mass customization has been embraced by a large portion of the industry.  ...  We identified three patterns for dealing with mandatory options: Step-by-step 59% Full-step 41% Backward Navigation (58) Stateful arbitrary 69% Stateless arbitrary 14% Not supported 17% -Transition  ... 
doi:10.1007/978-3-642-38709-8_11 fatcat:ema35uigafaorfohtvs5o53r74
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