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T-count Optimized Design of Quantum Integer Multiplication [article]

Edgard Muñoz-Coreas, Himanshu Thapliyal
2017 arXiv   pre-print
To have fair comparison with the recent design by Babu and get an actual estimate of the T-count, it is made garbageless by using Bennett's garbage removal scheme.  ...  Therefore, this work presents a T-count optimized quantum circuit for integer multiplication with only 4 · n + 1 qubits and no garbage outputs.  ...  Table IV illustrates that the order of growth of the qubits for the proposed quantum integer multiplication circuit is linear. Thus, the qubit cost is O(n).  ... 
arXiv:1706.05113v1 fatcat:eymtg77kh5g3hn7q2vzpc2cbdq

Quantum Circuit Designs of Integer Division Optimizing T-count and T-depth [article]

Himanshu Thapliyal, Edgard Muñoz-Coreas, T. S. S. Varun, Travis S. Humble
2018 arXiv   pre-print
The design of quantum circuits for integer division has caught the attention of researchers and designs have been proposed in the literature.  ...  Further, both our proposed designs have linear T-depth.  ...  To realize reversible gates such as the Toffoli gate, we use the Clifford+T implementations presented in [8] . As ahown in [8] , the Toffoli gate has a Tcount of 7 and a T-depth of 3.  ... 
arXiv:1809.09732v1 fatcat:v2g753pdkrattoqwq67m2sgfhe

Quantum Computing Circuits and Devices [article]

Travis S. Humble, Himanshu Thapliyal, Edgard Munoz-Coreas, Fahd A. Mohiyaddin, Ryan S. Bennink
2018 arXiv   pre-print
The development of quantum computing technologies builds on the unique features of quantum physics while borrowing familiar principles from the design of conventional devices.  ...  We then discuss the generation and synthesis of quantum circuits for higher-order logic that can be carried out using quantum computing devices.  ...  Department of Energy, Office of Science, Office of Advanced Scientific Computing Research, and Oak Ridge National Laboratory Directed Research and Development.  ... 
arXiv:1804.10648v1 fatcat:rkofpdpxxfdgrbbgz3ez7uuutm

Design, Synthesis and Test of Reversible Circuits for Emerging Nanotechnologies

Himanshu Thapliyal, Nagarajan Ranganathan
2012 2012 IEEE Computer Society Annual Symposium on VLSI  
Nagarajan Ranganathan to allow me to work on the burgeoning area of reversible logic and emerging nanotechnologies.  ...  I firmly believe that it is because of Dr. Ranganathan guidance, encouragement and confidence in me that has transformed me into a better researcher. I would also like to thank Dr.  ...  Some of these implementation platforms are trapped ions, spintronics, superconducting circuits, linear optics/photonics, quantum dots, etc, [5, 11, 21, [27] [28] [29] .  ... 
doi:10.1109/isvlsi.2012.83 dblp:conf/isvlsi/ThapliyalR12 fatcat:vqp3ruke4fa5vkacwfoeehaseu