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Garbage Collection Techniques for Flash-Resident Page-Mapping FTLs [article]

Niv Dayan, Philippe Bonnet
2015 arXiv   pre-print
A class of relevant FTLs employ a flash-resident page-associative mapping table from logical to physical addresses, with a smaller RAM-resident cache for frequently mapped entries.  ...  In this paper, we address the problem of performing garbage-collection under such FTLs. We observe two problems.  ...  techniques for solving the garbage-collection metadata problem.  ... 
arXiv:1504.01666v1 fatcat:cotn3ipjebajjlwg74zjsdcgym


Niv Dayan, Philippe Bonnet, Stratos Idreos
2016 Proceedings of the 2016 International Conference on Management of Data - SIGMOD '16  
We show that this is a good trade-off because (1) updates are intrinsically more frequent than garbage-collection queries to page validity metadata, and (2) flash writes are more expensive than flash reads  ...  PVB is used by the garbage-collectors of state-of-the-art FTLs to keep track of which physical pages in the device are invalid.  ...  in recovery time. • GeckoFTL keeps garbage-collection overheads low by differentiating between user data and flash-resident metadata. • GeckoFTL includes a fast recovery algorithm for dirty cached mapping  ... 
doi:10.1145/2882903.2915219 dblp:conf/sigmod/DayanBI16 fatcat:fmklhkifjbb43cd22iij3siht4


Hunki Kwon, Eunsam Kim, Jongmoo Choi, Donghee Lee, Sam H. Noh
2010 Proceedings of the tenth ACM international conference on Embedded software - EMSOFT '10  
Some low-end SSDs use the block mapping FTL (Flash Translation Layer) that is good for sequential write patterns but poor for random ones.  ...  Our experimental results show the superiority of Janus-FTL, which adapts itself along the spectrum for a given workload, over state-of-the-art hybrid mapping FTLs and the pure page mapping FTL.  ...  The two basic mapping techniques used in FTLs are page mapping [26] and block mapping [12] .  ... 
doi:10.1145/1879021.1879044 dblp:conf/emsoft/KwonKCLN10 fatcat:eexjebtni5bubfmllk7lbkuiqi

Improving MLC flash performance and endurance with extended P/E cycles

Fabio Margaglia, Andre Brinkmann
2015 2015 31st Symposium on Mass Storage Systems and Technologies (MSST)  
naive greedy garbage collection strategy.  ...  The traditional usage pattern for NAND flash memory is the program/erase (P/E) cycle: the flash pages that make a flash block are all programmed in order and then the whole flash block needs to be erased  ...  Garbage Collection The garbage collection procedure is similar to the one used in the baseline FTL.  ... 
doi:10.1109/msst.2015.7208278 dblp:conf/mss/MargagliaB15 fatcat:w7n2mdxdyfhnxltay7fjojeuka

Sector log

Seongwook Jin, Jaehong Kim, Jaegeuk Kim, Jaehyuk Huh, Seungryoul Maeng
2011 Proceedings of the 2011 ACM Symposium on Applied Computing - SAC '11  
With the sector mapping mechanism, sector log provides a sector-accessible block device abstraction upon page-managed flash memory.  ...  Sector log manages a small part of NAND flash memory in SSDs with sectorlevel mapping, and stores sub-page writes more efficiently than conventional SSDs.  ...  Sector log resides on top of a conventional FTL, and the FTL manages the rest of the flash area at page granularity.  ... 
doi:10.1145/1982185.1982264 dblp:conf/sac/JinKKHM11 fatcat:3fzpapbhoncrbigcmismmbnwze


Guanying Wu, Xubin He
2012 Proceedings of the 7th ACM european conference on Computer Systems - EuroSys '12  
Experimental results based on our ∆FTL prototype show that ∆FTL can significantly reduce the number of writes and garbage collection operations and thus improve SSD lifetime at a cost of trivial overhead  ...  NAND flash-based SSDs suffer from limited lifetime due to the fact that NAND flash can only be programmed or erased for limited times.  ...  Acknowledgments We thank our shepherd Steven Gribble and anonymous reviewers for their feedback. This research is sponsored in part by the U.S.  ... 
doi:10.1145/2168836.2168862 dblp:conf/eurosys/WuH12 fatcat:manrpg5krbf55odadeyxrfrbmi

A superblock-based flash translation layer for NAND flash memory

Jeong-Uk Kang, Heeseung Jo, Jin-Soo Kim, Joonwon Lee
2006 Proceedings of the 6th ACM & IEEE International conference on Embedded software - EMSOFT '06  
Our experimental results show that the proposed FTL scheme decreases the garbage collection overhead up to 40% compared to previous FTL schemes.  ...  In the proposed FTL scheme, superblocks are mapped at coarse granularity, while pages inside the superblock are mapped freely at fine granularity to any location in several physical blocks.  ...  Figure 9 depicts the garbage collection overhead for each block-mapped FTL scheme.  ... 
doi:10.1145/1176887.1176911 dblp:conf/emsoft/KangJKL06 fatcat:b6hlcrmq7rd5hmzd367t45rzrm

A survey of address translation technologies for flash memories

Dongzhe Ma, Jianhua Feng, Guoliang Li
2014 ACM Computing Surveys  
Primary functionalities of the FTL include address translation, garbage collection, and wear leveling.  ...  Flash Translation Layer (FTL) is a software layer built on raw flash memories that emulates a normal block device like magnetic disks.  ...  An independent page-level mapping table is employed for data in the UBA and the CBA. Unlike hybrid mapping schemes, LazyFTL never performs merge operations. during garbage collection.  ... 
doi:10.1145/2512961 fatcat:rhwwnl2xgffvxnbcwhefge43vm

Improving flash translation layer performance by supporting large superblocks

Pei-Kuan Lin, Mong-Ling Chiao, Da-Wei Chang
2010 IEEE transactions on consumer electronics  
The use of fine-grained mapping information allows a logical page within a superblock, i.e., a set of contiguous logical blocks, to be placed at any page offset of the physical blocks allocated for that  ...  Due to the erase-before-write feature of flash memory, an FTL usually performs out-ofplace updates and uses a garbage collection procedure to reclaim stale data.  ...  In this scheme, garbage collection is needed only when there are almost no free pages in the flash memory.  ... 
doi:10.1109/tce.2010.5505982 fatcat:zwhd2cjbrbdqzccyebwpxr5tga

High-Performance and Lightweight Transaction Support in Flash-Based SSDs

Youyou Lu, Jiwu Shu, Jia Guo, Shuai Li, Onur Mutlu
2015 IEEE transactions on computers  
Experiments show that LightTx achieves nearly the lowest overhead in garbage collection, memory consumption and mapping persistence compared to existing embedded transaction designs.  ...  First, LightTx improves transaction concurrency arbitrarily by using a page-independent commit protocol.  ...  For durability, the FTL mapping table needs to be written to persistent media when a transaction commits. But this leads to extra flash writes for the FTL mapping table.  ... 
doi:10.1109/tc.2015.2389828 fatcat:lffclmyosrb3botf6vmphk3jo4

Optimizing random write performance of FAST FTL for NAND flash memory

XuFeng Guo, YuPing Wang
2014 Science China Information Sciences  
Optimizing random write performance of FAST FTL for NAND flash memory.  ...  The NAND flash memory has gained its popularity as a storage device for consumer electronics due to its higher performance and lower power consumption.  ...  We greatly appreciate all the anonymous reviewers for their valuable suggestions.  ... 
doi:10.1007/s11432-014-5157-x fatcat:34fkkaditnasjilo54jybbnile

LightTx: A lightweight transactional design in flash-based SSDs to support flexible transactions

Youyou Lu, Jiwu Shu, Jia Guo, Shuai Li, Onur Mutlu
2013 2013 IEEE 31st International Conference on Computer Design (ICCD)  
LightTx also achieves nearly the lowest overhead in garbage collection and mapping persistence compared to existing embedded transaction designs.  ...  However, existing transaction designs embedded in flash-based Solid State Drives (SSDs) have limited support for transaction flexibility, i.e., support for different isolation levels between transactions  ...  Since the blocks in Available and Unavailable Zones, which are used for recent allocation, are unlikely to be chosen for garbage collection, the garbage collection overhead of LightTx is nearly the same  ... 
doi:10.1109/iccd.2013.6657033 dblp:conf/iccd/LuSGLM13 fatcat:5pqmjns4gjdetifmnfvab6g5wm

S-FTL: An efficient address translation for flash memory by exploiting spatial locality

Song Jiang, Lei Zhang, XinHao Yuan, Hao Hu, Yu Chen
2011 2011 IEEE 27th Symposium on Mass Storage Systems and Technologies (MSST)  
Our experiments show that S-FTL can reduce accesses to the flash for address translation by up to 70% and reduce response time of SSD by up to 25%, compared with the stateof-the-art FTL strategies such  ...  Accordingly we propose designs to take advantage of these patterns to reduce mapping table size, increase hit ratio for in-cache address translation, and minimize expensive writes to flash memory.  ...  ACKNOWLEDGMENTS We thank the anonymous reviewers for their constructive comments that helped us to improve the paper. This research is partially supported by U.S.  ... 
doi:10.1109/msst.2011.5937215 dblp:conf/mss/JiangZYHC11 fatcat:evmse6yoajfj7dhhuva7ahgreu

Performance Analysis of FTL Schemes

M. N.Kale, A. S. Jahagirdar
2012 International Journal of Computer Applications  
In this paper we have tried to find out the comparative cost of block merge operation required during garbage collection for some representative mapping schemes like BAST [9] and FAST [7].  ...  Many efforts for optimizing the working of address mapping schemes have been done by different research workers.  ...  The out-of-place update requires Flash to employ a garbage collection (GC) mechanism.  ... 
doi:10.5120/7453-0271 fatcat:xj7ios35tjdi3geuvso7slxway

HaWL: Hidden Cold Block-Aware Wear Leveling Using Bit-Set Threshold for NAND Flash Memory

Seon Hwan KIM, Ju Hee CHOI, Jong Wook KWAK
2016 IEICE transactions on information and systems  
The performance results illustrate that HaWL prolongs the lifetime of flash memory by up to 48% compared with previous wear leveling techniques in our experiments. key words: wear leveling, NAND flash  ...  The bit array table saves the histories of block erasures for a period and distinguishes cold blocks from all blocks.  ...  Therefore, some cold pages can be migrated to a different block from a resident block in page mapping. Moreover, cold data and hot data are mixed by wear leveling and garbage collection.  ... 
doi:10.1587/transinf.2015edl8198 fatcat:xgxx4wyy7jdqzgj5hruggxev7m
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