97 Hits in 4.9 sec

Full-CMOS 2-GHz WCDMA direct conversion transmitter and receiver

Kang-Yoon Lee, Seung-Wook Lee, Yido Koo, Hyoung-Ki Huh, Hee-Young Nam, Jeong-Woo Lee, Joonbae Park, Kyeongho Lee, Deog-Kyoon Jeong, Wonchan Kim
2003 IEEE Journal of Solid-State Circuits  
This paper presents a full-CMOS transmitter and receiver for 2.0-GHz wide-band code division multiple access with direct conversion mixers and a dc-offset cancellation scheme.  ...  The direct conversion scheme combined with a multiphase sampling fractional-prescaler alleviates the problems of the direct conversion transmitter and receiver.  ...  His research interests include CMOS RF circuit design and high-speed communication interface. Mr.  ... 
doi:10.1109/jssc.2002.806280 fatcat:b3awwy5lyrht3ibguf54k72g2u

CMOS software-defined radio transceivers: Analog design in digital technology

Jan Craninckx
2012 IEEE Communications Magazine  
ACKNOWLEDGMENTS The work presented here is the result of a large team effort, and the author would like to thank Jonathan Borremans, Lynn Bos, Björn Debaillie, Arnd Geis, Vito Giannini  ...  It includes 2 frequency synthesizers and a full RX and TX chain in a total area of 2 × 2.5 mm 2 . Full system measurements are reported in [16, 17] , a short summary is given here.  ...  Furthermore, the same transmitter provides legacy with all WCDMA scenarios and can be used with other bands/modulations such as GMSK and OFDM-based standards up to 5.5 GHz carrier frequency [16] .  ... 
doi:10.1109/mcom.2012.6178847 fatcat:atynsqcdkvdvrfk2sz6otnp52m

Guest editors' introduction

D. Robertson, R. Minear, C. Chien, J. Judy
2001 IEEE Journal of Solid-State Circuits  
In the last paper, Jussila et al. describe a 2-GHz single-chip direct conversion receiver fabricated in a 0.35-m SiGe BiCMOS process.  ...  A direct-conversion architecture is used for the transmitter and a low-IF architecture for the receiver. The transceiver achieves a sensitivity of 82 dBm at 0.1% BER and an IIP3 of 7 dBm.  ...  In the second paper, Doutreloigne et al. report on a 0.7-m CMOS I T Technology display-driver chip with 100-V driving capability and internal power consumption of only 1 to 2 W per driver output.  ... 
doi:10.1109/jssc.2001.972134 fatcat:yfbgugtxmbenpa7e7heuhnxdu4

A 9.5mW 4GHz WCDMA frequency synthesizer in 0.13μm CMOS

Xinhua Chen, Qiuting Huang
2005 Proceedings of the 2005 international symposium on Low power electronics and design - ISLPED '05  
Core area of the chip is as small as 0.2mm 2 .  ...  A 4GHz integer-N frequency synthesizer is realized in a 0.13µm CMOS technology.  ...  CMOS has been demonstrated for both the RF receiver [1] and transmitter [2] .  ... 
doi:10.1145/1077603.1077620 dblp:conf/islped/ChenH05 fatcat:hkgt467ywbeyvajjvs5w2ancm4

Introduction to the Special Issue on the 2014 IEEE International Solid-State Circuits Conference (ISSCC)

Makoto Nagata, Lucien J. Breems, Carlo Samori, Sven Mattisson, Pavan Kumar Hanumolu
2014 IEEE Journal of Solid-State Circuits  
Liu et al. from imec present, in the second paper, a 2.4 GHz receiver in 65 nm CMOS employing a digital phase-tracking loop to perform direct phase-to-digital conversion.  ...  Finally, Yoo et al. from Chung-Ang University report the design of a direct digital frequency synthesizer clocked at 2 GHz, fabricated in a 55 nm CMOS technology.  ... 
doi:10.1109/jssc.2014.2366411 fatcat:wityuhkaonfnzkbw52shpxo7i4

RF CMOS Integrated Circuit: History, Current Status and Future Prospects

Noboru ISHIHARA, Shuhei AMAKAWA, Kazuya MASU
2011 IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences  
In this paper, the history and the current status of the development of RF CMOS circuits are reviewed, and the future status of RF CMOS circuits is predicted.  ...  As great advancements have been made in CMOS process technology over the past 20 years, RF CMOS circuits operating in the microwave band have rapidly developed from component circuit levels to multiband  ...  Acknowledgments We are all thanks for students and researchers who were or are engaged in studding of the future LSI circuit design with us.  ... 
doi:10.1587/transfun.e94.a.556 fatcat:4fvaacoeqfc6nhmpgmjg5mrdiq

A high performance 2-GHz direct-conversion front end with single-ended RF input in 0.13 um CMOS

Yiping Feng, Gaku Takemura, Shunji Kawaguchi, Peter Kinget
2008 2008 IEEE Radio Frequency Integrated Circuits Symposium  
This paper describes a 2.1-GHz CMOS frontend with a single-ended low noise amplifier (LNA) and a double balanced, current-driven passive mixer.  ...  Implemented in a 0.13 um CMOS process, it achieves 30 dB conversion gain, a low noise figure of 3.1 dB, a 40 kHz 1/f noise corner, an in-band IIP3 of -12 dBm and IIP2 better than 39 dBm, while consuming  ...  INTRODUCTION Direct conversion receivers are widely used in wireless receivers for their high level of integration in particular for multi-band front-ends.  ... 
doi:10.1109/rfic.2008.4561449 fatcat:q6xpmqwgmrec5mn3fi6ts7duw4

A direct-conversion receiver integrated circuit for WCDMA mobile systems

S. K. Reynolds, B. A. Floyd, T. J. Beukema, T. Zwick, U. R. Pfeiffer, H. A. Ainspan
2003 IBM Journal of Research and Development  
A prototype of a 3-V SiGe direct-conversion receiver integrated circuit for use in third-generation (3G) WCDMA mobile cellular systems has been completed.  ...  A rigorous set of performance tests are used to characterize the noise and linearity performance of the packaged IC across its full frequency band of operation.  ...  Recouly of IBM La Gaude, France, for his input regarding WCDMA receiver system performance requirements. Finally, thanks to B. Gaucher, M. Soyuer, M. Oprysko, and J.  ... 
doi:10.1147/rd.472.0337 fatcat:llghrueafvdxzgd7ni4wxosj3u

An integrated CMOS passive transmitter leakage suppression technique for FDD Radios

Tong Zhang, Apsara Ravish Suvarna, Venumadhav Bhagavatula, Jacques C. Rudell
2014 2014 IEEE Radio Frequency Integrated Circuits Symposium  
An example of this technique is applied to the design of WCDMA front-end including the FPC, a low noise amplifier (LNA) and an emulated power amplifier (PA) in a 40nm, 6-metallayer TSMC CMOS process.  ...  A new structure, Four Port Canceller (FPC) serves a dual function as a receiver (RX) input matching network, and provides an auxiliary path from transmitter (TX) to RX, used for leakage cancellation, with  ...  Large LO leakage will be reflected back from the antenna and leads to DC offset issues in the direct conversion receiver.  ... 
doi:10.1109/rfic.2014.6851653 fatcat:5ftporbqlnan7e5iybaezyemre

Digitally Assisted Analog and RF Circuits

Kenichi OKADA
2015 IEICE transactions on electronics  
Digital calibration techniques for compensating I/Q mismatch, IM2, and LO impairments in cellular, 2.4 GHz WiFi, and 60 GHz WiGig transceivers are introduced with detailed analysis and circuit implementations  ...  Future technology directions such as the shift from digitally-assisted analog circuit to digitally-designed analog circuit will also be discussed.  ...  Acknowledgements This work is partially supported by MIC, SCOPE, MEXT, STARC, STAR, and VDEC in collaboration with Cadence Design Systems, Inc., Synopsys, Inc., Mentor Graphics, Inc., and Agilent Technologies  ... 
doi:10.1587/transele.e98.c.461 fatcat:hdrfiwl6jfdkzikz7etnysdijq

Software-defined radio receiver: dream to reality

R. Bagheri, A. Mirzaei, M.E. Heidari, S. Chehrazi, Minjae Lee, M. Mikhemar, W.K. Tang, A.A. Abidi
2006 IEEE Communications Magazine  
This article describes a fully integrated 90 nm CMOS software-defined radio receiver operating in the 800 MHz to 5 GHz band.  ...  Thus, the ADCs operate with modest resolution and sample rate, consuming low power. This approach makes portable SDR a reality.  ...  Frequency downconversion is indispensable, and zero-IF direct conversion is the most suitable choice for its high flexibility and low image rejection requirements.  ... 
doi:10.1109/mcom.2006.1678118 fatcat:audkvfmdlfdtnnpox46e5goyim


Qiuzhen Wan, Chunhua Wang
2012 Electromagnetic Waves  
The mixer is implemented using a 0.18 µm CMOS technology and covers frequency band from 0.5 GHz to 4.0 GHz.  ...  A comparison with conventional CMOS down-conversion mixer shows that this currentmode mixer has advantages of large conversion gain, low noise figure and high linearity.  ...  ACKNOWLEDGMENT The authors would like to thank the National Natural Science Foundation of China for financially supporting this research under No. 60776021 and the Scholarship Award for Excellent Doctoral  ... 
doi:10.2528/pier12032001 fatcat:zb3bjppuy5hurnyv3htjfqqvxu

Integrated RF Interference Suppression Filter Design Using Bond-Wire Inductors

H. Khatri, P.S. Gudem, L.E. Larson
2008 IEEE transactions on microwave theory and techniques  
A differential low-noise amplifier with an integrated on-chip passive interference suppression filter is designed at 2.1 GHz in a 0.18-m CMOS process, and achieves a transmit leakage suppression of 10  ...  Index Terms-Bandpass filter (BPF), bond wires, CMOS, interference suppression, mutual inductance, wideband code division multiple access (WCDMA).  ...  Rebeiz and Prof. P. Asbeck, both with the University of California at San Diego (UCSD), Prof. D. Lie, Texas Tech. University, Lubboch, and D.  ... 
doi:10.1109/tmtt.2008.921297 fatcat:zjw42c4m4jhfjglzjcvqatbm6m

Efficiency Enhancement of CMOS Power Amplifier for RF Applications

Shamil Hussein, Mohammed Yassin
2022 Al-Rafidain Engineering Journal  
The third intermodulation IDM3 is -49.2dBc at output power driven at frequency 2.4 GHz and input power greater than 20dBm.  ...  This paper presented a new structure for the CMOS power amplifiers as a more effective trend to amplify radio frequency (RF) signals compared to polar power amplifiers PA's by using envelope removal and  ...  Fig. 1 represents a typical RF transmitter with direct conversion architecture [7] .  ... 
doi:10.33899/rengj.2022.132768.1156 fatcat:ifuad2ix4be6dlyb53l7jxa3w4

A Fully Integrated 16-Element Phased-Array Transmitter in SiGe BiCMOS for 60-GHz Communications

Alberto Valdes-Garcia, Sean T. Nicolson, Jie-Wei Lai, Arun Natarajan, Ping-Yu Chen, Scott K. Reynolds, Jing-Hong Conan Zhan, Dong G. Kam, Duixian Liu, Brian Floyd
2010 IEEE Journal of Solid-State Circuits  
The IC occupies 44 mm 2 and is fully characterized on wafer. The TX delivers 9 to 13.5 dBm oP 1dB per element at 60.48 GHz with a total power consumption of 3.8 to 6.2 W.  ...  A phased-array transmitter (TX) for multi-Gb/s non-line-of-sight links in the four frequency channels of the IEEE 802.15.3c standard (58.32 to 64.8 GHz) is fully integrated in a 0.12-m SiGe BiCMOS process  ...  His work at IBM included the development of 3 G WCDMA receivers in SiGe BiCMOS and CMOS technologies and then the development and demonstration of some of the first silicon-based millimeter-wave receivers  ... 
doi:10.1109/jssc.2010.2074951 fatcat:ndxu3dc4ojgv7dzjjhr5sfzmhm
« Previous Showing results 1 — 15 out of 97 results