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Taming release-acquire consistency
<span title="">2016</span>
<i title="ACM Press">
<a target="_blank" rel="noopener" href="https://fatcat.wiki/container/2qaxtqe2rfgjnfefqcokcnzelq" style="color: black;">Proceedings of the 43rd Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages - POPL 2016</a>
</i>
Acknowledgments We would like to thank Marko Doko, Jeehoon Kang, Peter Sewell, Francesco Zappa Nardelli, and the POPL'16 reviewers for their helpful feedback. ...
Moreover, we provided a simple notion of a strong memory fence that suffices for restoring sequential consistency assuming all (racy) accesses are RA, and presented reduction theorems to SC and TSO for ...
G is called TSO-coherent if there exists a total store order for it. Note that unlike modification orders, the total store order relates also read events. ...
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<a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/2837614.2837643">doi:10.1145/2837614.2837643</a>
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Fast complete memory consistency verification
<span title="">2009</span>
<i title="IEEE">
<a target="_blank" rel="noopener" href="https://fatcat.wiki/container/n7ljjecrpje5pj66pk4pvx65qu" style="color: black;">2009 IEEE 15th International Symposium on High Performance Computer Architecture</a>
</i>
This paper proposes a novel fast memory consistency verification method by identifying a new natural partial order: time order. ...
Based on the time order restriction, memory consistency verification is localized: for any operation, both inferring related orders and checking related cycles need to take into account only a bounded ...
Acknowledgment We are grateful to Michel Dubois and to the anonymous reviewers for their helpful comments and insightful suggestions. ...
<span class="external-identifiers">
<a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/hpca.2009.4798276">doi:10.1109/hpca.2009.4798276</a>
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Verifying Visibility-Based Weak Consistency
[chapter]
<span title="">2020</span>
<i title="Springer International Publishing">
<a target="_blank" rel="noopener" href="https://fatcat.wiki/container/2w3awgokqne6te4nvlofavy5a4" style="color: black;">Lecture Notes in Computer Science</a>
</i>
While some concurrentobject operations are designed to behave atomically, each witnessing the atomic effects of predecessors in a linearization order, others forego such strong consistency to avoid complex ...
In this work we develop a methodology for proving that concurrent object implementations adhere to weak-consistency specifications. ...
In practice, the happens-before order among invocations is determined by a program order, i.e., among invocations of the same thread, and a synchronization order, i.e., among invocations of distinct threads ...
<span class="external-identifiers">
<a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/978-3-030-44914-8_11">doi:10.1007/978-3-030-44914-8_11</a>
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<a target="_blank" rel="noopener" href="https://web.archive.org/web/20200509232359/https://link.springer.com/content/pdf/10.1007%2F978-3-030-44914-8_11.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext">
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On verifying causal consistency
<span title="2017-01-01">2017</span>
<i title="Association for Computing Machinery (ACM)">
<a target="_blank" rel="noopener" href="https://fatcat.wiki/container/xu5bk2lj5rbdxlx6222nw7tsxi" style="color: black;">SIGPLAN notices</a>
</i>
Moreover, for a significant class of implementations, we derive from this reduction the decidability of verifying causal consistency w.r.t. the read-write memory abstraction. 1 Throughout the paper, unbounded ...
Using these machines as observers (in parallel with the implementation) allows to reduce polynomially the problem of checking causal consistency to a state reachability problem. ...
Sequential consistency [30] imposes a total order on all (read and write) operations. In particular, no such total order can exist for History (2d). ...
<span class="external-identifiers">
<a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/3093333.3009888">doi:10.1145/3093333.3009888</a>
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<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170922011142/https://infoscience.epfl.ch/record/223699/files/draft.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext">
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On verifying causal consistency
<span title="">2017</span>
<i title="ACM Press">
Proceedings of the 44th ACM SIGPLAN Symposium on Principles of Programming Languages - POPL 2017
</i>
Moreover, for a significant class of implementations, we derive from this reduction the decidability of verifying causal consistency w.r.t. the read-write memory abstraction. 1 Throughout the paper, unbounded ...
Using these machines as observers (in parallel with the implementation) allows to reduce polynomially the problem of checking causal consistency to a state reachability problem. ...
Sequential consistency [30] imposes a total order on all (read and write) operations. In particular, no such total order can exist for History (2d). ...
<span class="external-identifiers">
<a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/3009837.3009888">doi:10.1145/3009837.3009888</a>
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Verifying Visibility-Based Weak Consistency
[article]
<span title="2019-11-04">2019</span>
<i >
arXiv
</i>
<span class="release-stage" >pre-print</span>
While some concurrent-object operations are designed to behave atomically, each witnessing the atomic effects of predecessors in a linearization order, others forego such strong consistency to avoid complex ...
In this work we develop a methodology for proving that concurrent object implementations adhere to weak-consistency specifications. ...
In practice, the happens-before order among invocations is determined by a program order, i.e., among invocations of the same thread, and a synchronization order, i.e., among invocations of distinct threads ...
<span class="external-identifiers">
<a target="_blank" rel="external noopener" href="https://arxiv.org/abs/1911.01508v1">arXiv:1911.01508v1</a>
<a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/xeu4aoa4szbupchvodlzcaoyay">fatcat:xeu4aoa4szbupchvodlzcaoyay</a>
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Automatable Verification of Sequential Consistency
<span title="2003-07-25">2003</span>
<i title="Springer Nature">
<a target="_blank" rel="noopener" href="https://fatcat.wiki/container/qj6jzeossfhihfshwf7nb7lbcq" style="color: black;">Theory of Computing Systems</a>
</i>
Sequential consistency is a multiprocessor memory model of both practical and theoretical importance. ...
The class includes all published sequentially consistent protocols that are known to us, and we argue why the class is likely to include all real sequentially consistent protocols. ...
Acknowledgments We thank Mark Hill, Dan Sorin, Manoj Plakal and the other members of the Wisconsin Multifacet group for sharing their insights and intuition about proving sequential consistency. ...
<span class="external-identifiers">
<a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/s00224-003-1082-x">doi:10.1007/s00224-003-1082-x</a>
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</span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20060117120918/http://www.cs.ubc.ca:80/~condon/papers/ajh02.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext">
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On Verifying Causal Consistency
[article]
<span title="2016-11-15">2016</span>
<i >
arXiv
</i>
<span class="release-stage" >pre-print</span>
We address the issue of verifying automatically whether the executions of an implementation of a data structure are causally consistent. ...
Indeed, such systems often store data in key-value stores, which are instances of the read-write memory abstraction. ...
Sequential consistency [30] imposes a total order on all (read and write) operations. In particular, no such total order can exist for History (2d). ...
<span class="external-identifiers">
<a target="_blank" rel="external noopener" href="https://arxiv.org/abs/1611.00580v2">arXiv:1611.00580v2</a>
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The Consistency of Web Conversations
<span title="">2008</span>
<i title="IEEE">
<a target="_blank" rel="noopener" href="https://fatcat.wiki/container/hj24pr6lvba3dfi5muhp4mz5tm" style="color: black;">2008 23rd IEEE/ACM International Conference on Automated Software Engineering</a>
</i>
We have used BPELCheck to check conversational consistency for a set of BPEL processes, including an industrial example. ...
A process is consistent if each possible conversation leaves its peer automata in a state labeled as consistent and the overall execution satisfies a user-specified predicate on the automata states. ...
To process an order, the store first authorizes with the bank the total value of the order. If this fails, the processing of the order stops. ...
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<a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/ase.2008.62">doi:10.1109/ase.2008.62</a>
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A Framework for Consistency Algorithms
[article]
<span title="2020-07-21">2020</span>
<i >
arXiv
</i>
<span class="release-stage" >pre-print</span>
Such an algorithm checks whether the executions of a shared-memory concurrent program are consistent under the axioms defined by a model. ...
Our framework shows, that despite the hardness, fast deterministic consistency algorithms can be obtained by employing tools from fine-grained complexity. ...
First, we demand a total order tw instead of a store order, a partial order that is total on writes to the same location [6, 7, 50] . ...
<span class="external-identifiers">
<a target="_blank" rel="external noopener" href="https://arxiv.org/abs/2007.11398v1">arXiv:2007.11398v1</a>
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Verifying Sequential Consistency on Shared-Memory Multiprocessors by Model Checking
[article]
<span title="2001-08-25">2001</span>
<i >
arXiv
</i>
<span class="release-stage" >pre-print</span>
A trace of a memory system satisfies sequential consistency if there exists a total order of all memory events in the trace that is both consistent with the total order at each processor and has the property ...
The sequential consistency memory model specifies a total order among the memory (read and write) events performed at each processor. ...
. , u k , v k is a canonical k-nice cycle in G(Ω)(τ ). Example. We now give an example to illustrate the method described in this section. ...
<span class="external-identifiers">
<a target="_blank" rel="external noopener" href="https://arxiv.org/abs/cs/0108016v1">arXiv:cs/0108016v1</a>
<a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/yeq3uimw2bbijouanmoq32lt6m">fatcat:yeq3uimw2bbijouanmoq32lt6m</a>
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On consistency types for lattice-based distributed programming languages
[article]
<span title="2020-09-14">2020</span>
<i >
arXiv
</i>
<span class="release-stage" >pre-print</span>
In this paper, we propose lattice-based consistency types for replicated data (CTRD), a higher-order static consistency-typed language with replicated data types. ...
In contrast, data flow from data with weak consistency to data with strong consistency requirements is problematic, since application correctness may be broken. ...
order number from a customer, and processes the order according to the availability. ...
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<a target="_blank" rel="external noopener" href="https://arxiv.org/abs/1907.00822v3">arXiv:1907.00822v3</a>
<a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/gc6657mbkbhdvhytkmizhhcz4u">fatcat:gc6657mbkbhdvhytkmizhhcz4u</a>
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Regular Sequential Serializability and Regular Sequential Consistency
[article]
<span title="2021-10-18">2021</span>
<i >
arXiv
</i>
<span class="release-stage" >pre-print</span>
Strictly serializable (linearizable) services appear to execute transactions (operations) sequentially, in an order consistent with real time. ...
This work introduces two new consistency models to ease this trade-off: regular sequential serializability (RSS) and regular sequential consistency (RSC). ...
. < is a strict total order. Proof. We must show < is irreflexive, total, and transitive. Irreflexivity follows from the fact that each operation has one carstamp and the irreflexivity of <. ...
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<a target="_blank" rel="external noopener" href="https://arxiv.org/abs/2109.08930v2">arXiv:2109.08930v2</a>
<a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/s7kgrqqrn5h2jpopmebcnujjfu">fatcat:s7kgrqqrn5h2jpopmebcnujjfu</a>
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Robustness Against Transactional Causal Consistency
[article]
<span title="2021-02-02">2021</span>
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arXiv
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over a sequentially consistent memory. ...
in transactional programs over a sequentially consistent shared memory. ...
over a sequentially consistent memory. ...
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Robustness Against Transactional Causal Consistency
<span title="2019-08-26">2019</span>
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over a sequentially consistent memory. ...
in transactional programs over a sequentially consistent shared memory. ...
In the non-transactional case this model corresponds to sequential consistency (SC) [31] . ...
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