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Bankshot

Meenakshi Sundaram Bhaskaran, Jian Xu, Steven Swanson
2013 Proceedings of the 1st Workshop on Interactions of NVM/FLASH with Operating Systems and Workloads - INFLOW '13  
misses and performing write backs.  ...  We evaluate several design decisions in Bankshot including different cache management policies and different levels of hardware, software support for tracking dirty data and maintaining meta-data.  ...  Hybrid Hardware/Software Dirty Bits We can combine the hardware and software dirty data tracking mechanisms to provide the best of both world.  ... 
doi:10.1145/2527792.2527793 dblp:conf/sosp/BhaskaranXS13 fatcat:efncfqzsyvgexk6pcnjgo33p5u

Bankshot

Meenakshi Sundaram Bhaskaran, Jian Xu, Steven Swanson
2014 ACM SIGOPS Operating Systems Review  
misses and performing write backs.  ...  We evaluate several design decisions in Bankshot including different cache management policies and different levels of hardware, software support for tracking dirty data and maintaining meta-data.  ...  Hybrid Hardware/Software Dirty Bits We can combine the hardware and software dirty data tracking mechanisms to provide the best of both world.  ... 
doi:10.1145/2626401.2626417 fatcat:7rtpblbhqjbdpfpkkg6lhj7224

Model Checking: Back and Forth between Hardware and Software [chapter]

Edmund Clarke, Anubhav Gupta, Himanshu Jain, Helmut Veith
2008 Lecture Notes in Computer Science  
The interplay back and forth between software model checking and hardware model checking has been fruitful for both.  ...  The abstraction methods developed for hardware verification however have been a stepping stone for the new generation of software verification tools including SLAM, BLAST, and MAGIC which focus on control-intensive  ...  From Software Verification to Hardware Verification The origins of model checking date back to the early 1980s, when Clarke and Emerson [5] and, independently, Queille and Sifakis [19] introduced a  ... 
doi:10.1007/978-3-540-69149-5_27 fatcat:42jggsgsqzajxflkckzi4wan2i

Establishing a Novel Modeling Tool: A Python-based Interface for a Neuromorphic Hardware System

Daniel Bruederle
2009 Frontiers in Neuroinformatics  
We present a software concept that provides the possibility to establish such hardware devices as valuable modeling tools.  ...  An example setup and results acquired by utilizing both the hardware system and a software simulator are demonstrated.  ...  The translation layer also performs the transformation from biological to hardware time domain and back.  ... 
doi:10.3389/neuro.11.017.2009 pmid:19562085 pmcid:PMC2701676 fatcat:ek6ef7nz2jedtgcvifztjwsani

The future of system-level design

Reinaldo Bergamaschi, Grant Martin, Wayne Wolf, Rolf Ernst, Kees Vissers, Jack Kouloheris
2003 Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign & system synthesis - CODES+ISSS '03  
Over the last 15 years we have seen and helped the evolution of design from behavioral modeling to hardware/software co-design, to today's system-level design.  ...  As we continue and expand systemlevel research with new approaches opening exciting new research avenues, we have an obligation to look back at our successes and failures.  ...  Over the last 15 years we have seen and helped the evolution of design from behavioral modeling to hardware/software co-design, to today's system-level design.  ... 
doi:10.1145/944645.944704 dblp:conf/codes/BergamaschiMWEVK03 fatcat:zl3douin3fbjxcnvoafyp5d6am

The future of system-level design

Reinaldo Bergamaschi, Grant Martin, Wayne Wolf, Rolf Ernst, Kees Vissers, Jack Kouloheris
2003 Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign & system synthesis - CODES+ISSS '03  
Over the last 15 years we have seen and helped the evolution of design from behavioral modeling to hardware/software co-design, to today's system-level design.  ...  As we continue and expand systemlevel research with new approaches opening exciting new research avenues, we have an obligation to look back at our successes and failures.  ...  Over the last 15 years we have seen and helped the evolution of design from behavioral modeling to hardware/software co-design, to today's system-level design.  ... 
doi:10.1145/944700.944704 fatcat:3kt34awgxfbdjkxofav2mmutq4

Steal but No Force: Efficient Hardware Undo+Redo Logging for Persistent Memory Systems

Matheus Almeida Ogleari, Ethan L. Miller, Jishen Zhao
2018 2018 IEEE International Symposium on High Performance Computer Architecture (HPCA)  
Furthermore, we develop a cache forcewrite-back mechanism in hardware to significantly reduce the performance and energy overheads from forcing data into persistent memory.  ...  Previously proposed hardware logging schemes are inefficient and do not fully address the issues in software.  ...  This paper is supported in part by NSF grants 1652328 and 1718158, and NSF I/UCRC Center for Research on Storage Systems.  ... 
doi:10.1109/hpca.2018.00037 dblp:conf/hpca/OgleariMZ18 fatcat:es5jizhvanbujnwptgw6kh7pza

Open-source Hardware: Opportunities and Challenges [article]

Gagan Gupta, Tony Nowatzki, Vinay Gangadhar, Karthikeyan Sankaralingam
2016 arXiv   pre-print
Innovation in hardware is slowing due to rising costs of chip design and diminishing benefits from Moore's law and Dennard scaling.  ...  We identify these reasons and how the industry, academia, and the hardware community at large can come together to address them.  ...  Hence the next challenge to OSH is making a critical mass of IP available, that spans from front end to back end. Making OSH IP more mature and easily available.  ... 
arXiv:1606.01980v2 fatcat:zphgy6a5hvhdtg6pslxi6jnyn4

FAIL*: An Open and Versatile Fault-Injection Framework for the Assessment of Software-Implemented Hardware Fault Tolerance

Horst Schirmeier, Martin Hoffmann, Christian Dietrich, Michael Lenz, Daniel Lohmann, Olaf Spinczyk
2015 2015 11th European Dependable Computing Conference (EDCC)  
We describe FAIL*, its application to the development process of safety-critical software, and the lessons learned from a real-world example.  ...  FAIL* supplies the developer with reusable and composable FI campaigns, advanced pre-and post-processing analyses to easily identify sensitive spots in the software, wellabstracted back-end implementations  ...  We also thank all additional contributors to FAIL*, especially Adrian Böckenkamp, Christoph Borchert, Björn Döbel, Tobias Friemel, Richard Hellwig, Florian Lukas, and Lars Rademacher.  ... 
doi:10.1109/edcc.2015.28 dblp:conf/edcc/SchirmeierH0LLS15 fatcat:2pyg67egxfffdeiwfbavbolkwe

Page 27 of Hewlett-Packard Journal Vol. 30, Issue 11 [page]

1979 Hewlett-Packard Journal  
The software interface with the hardware makes use of two concepts called software state and hardware state.  ...  The software state is located in 22 bytes of RAM and totally describes the state of the instrument. On power-up, the initialization procedure loads the software state from ROM.  ... 

Hybrid Transactional Memory Revisited [chapter]

Wenjia Ruan, Michael Spear
2015 Lecture Notes in Computer Science  
On the other, it is critical to create a fall-back path to handle the cases where hardware TM cannot complete a transaction, and this path ought to be scalable and reasonably fair to all transactions.  ...  We present an implementation of our Hybrid Cohorts that prioritizes transactions that fall back to software mode.  ...  Any opinions, findings, and conclusions or recommendations expressed in this material are those of the authors and do not necessarily reflect the views of the National Science Foundation.  ... 
doi:10.1007/978-3-662-48653-5_15 fatcat:kjdyxo25sjgnfkfq7omrr332xi

Efficient Self-Tuning Strategy for Hardware Transactional Memory

Ping Wu
2016 ICIC Express Letters  
A fall-back strategy is needed to avoid constant abortion of hardware transactions due to the hardware limitations.  ...  Recent hardware support from Intel and IBM draws new lights on reducing the huge overhead of transactional processing.  ...  This work is supported by the Weifang Science and Technology Development Project No. 2014GX031.  ... 
doi:10.24507/icicel.10.10.2391 fatcat:hvsfatwrcra5hdnsr5xq3fymri

Software Framework for Controlling Unsupervised Scientific Instruments

Benjamin Schmid, Wiebke Jahr, Michael Weber, Jan Huisken, Giorgio F Gilestro
2016 PLoS ONE  
In this study, we describe a software framework and the necessary computer configuration that is well suited for exposing a complex self-built and software-controlled instrument such as a microscope to  ...  We identify several aspects that must be met by such software, and we describe a design that can simultaneously be used to control either (i) a fully functional instrument in a robust and fail-safe manner  ...  for establishing the contact to the museum and all of the members of the Huisken lab for discussions.  ... 
doi:10.1371/journal.pone.0161671 pmid:27570966 pmcid:PMC5003368 fatcat:lzyjo3mfyvbd3cb4zctnivqb7m

Architecture and dependability of large-scale internet services

D. Oppenheimer, D.A. Patterson
2002 IEEE Internet Computing  
An analysis of the architectures and causes of failure at three large-scale Internet services can help developers plan reliable systems offering maximum availability.  ...  We categorized this root-cause component by location (front end, back end, network, unknown) and type (node hardware, node software, network hardware, network software, operator, environment, overload,  ...  cause, and fixing hardware, software, and networking issues.  ... 
doi:10.1109/mic.2002.1036037 fatcat:advn5knyqbdtfggtbh3kdadswm

Fault Tolerance Mechanisms in Distributed Systems

Arif Sari, Murat Akkaya
2015 International Journal of Communications, Network and System Sciences  
This is because distributed systems enable nodes to organise and allow their resources to be used among the connected systems or devices that make people to be integrated with geographically distributed  ...  This article highlights the different fault tolerance mechanism in distributed systems used to prevent multiple system failures on multiple failure points by considering replication, high redundancy and  ...  PLR uses a software-centric approach which causes a shift in focus from guaranteeing hardware execution correctly to ensuring a correct software execution.  ... 
doi:10.4236/ijcns.2015.812042 fatcat:mzxpi36zzbagnaygondaw5lqfq
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