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Verified compilation of CakeML to multiple machine-code targets
2017
Proceedings of the 6th ACM SIGPLAN Conference on Certified Programs and Proofs - CPP 2017
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Our correctness theorem allows interference from the environment: the top-level correctness statement takes into account execution of foreign code and per-instruction interference from external processes ...
This paper describes how the latest CakeML compiler supports verified compilation down to multiple realistically modelled target architectures. ...
Acknowledgments The first author was partially supported by EPSRC Programme Grant EP/K008528/1, UK. The second author was partially supported by the Swedish Research Council, Sweden. ...
doi:10.1145/3018610.3018621
dblp:conf/cpp/FoxMTK17
fatcat:247jjf4zkbd4tmdwt5nfirn65m
Improvement of Algebraic Models of Abstract Pipelines for Formal Verification
2018
Academic Journal of Computing & Information Science
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We introduce a set of algebraic tools and methods to model the specification, implementation and verification, to define formal correctness condition in formal verification and guide the actual work of ...
microprocessors formal verification. ...
[15] introduces an overview of progress on the formal specification and verification of a commercial processor -ARM6 with the application of algebraic theory of this method, using HOL proof system. ...
doi:10.25236/ajcis.010006
fatcat:bz3fgyekk5e7tfqwvvt27yr6xi
A Trustworthy Monadic Formalization of the ARMv7 Instruction Set Architecture
[chapter]
2010
Lecture Notes in Computer Science
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This paper presents a new HOL4 formalization of the current ARM instruction set architecture, ARMv7. This is a modern RISC architecture with many advanced features. ...
The formalization is detailed and extensive. Considerable tool support has been developed, with the goal of making the model accessible and easy to work with. ...
Formal models of instruction sets are pivotal when verifying computer micro-architectures and compilers. ...
doi:10.1007/978-3-642-14052-5_18
fatcat:ydyc75yjn5exjflzkas5dd3pou
The semantics of power and ARM multiprocessor machine code
2008
Proceedings of the 4th workshop on Declarative aspects of multicore programming - DAMP '09
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This should provide a good basis for informal reasoning and formal verification of low-level code for these weakly consistent architectures, and, together with our x86 semantics, for the design and compilation ...
We develop a rigorous semantics for Power and ARM multiprocessor programs, including their relaxed memory model and the behaviour of reasonable fragments of their instruction sets. ...
We acknowledge the support of EPSRC grants GR/T11715, EP/C510712, and EP/F036345, and ANR grant ANR-06-SETI-010-02. ...
doi:10.1145/1481839.1481842
dblp:conf/popl/AlglaveFIMSSN09
fatcat:h4dlhsfd4zcbfkuggpyfrj7nkm
Formal Verification of Secure User Mode Device Execution with DMA
[chapter]
2014
Lecture Notes in Computer Science
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For modern processor architectures -with hardware support for memory management, several modes of operation and I/O interfaces -this is a delicate issue requiring deep analysis at both instruction set ...
of interactions between the model components. ...
Work supported by framework grant "IT 2010" from the Swedish Foundation for Strategic Research. ...
doi:10.1007/978-3-319-13338-6_18
fatcat:ic3khqvv2rdurauxw27swkpju4
Algebraic models of correctness for abstract pipelines
2003
The Journal of Logic and Algebraic Programming
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We define formal correctness conditions, and introduce the one-step theorems that can reduce the complexity of formal verification. ...
The algebraic models provide: (i) modular descriptions of pipelined systems; (ii) equational correctness criteria; and (iii) equational specification and verification techniques for the design of pipelined ...
Acknowledgements Part of this work began as part of the European Union Esprit Working Group NADA (00 85 33) on new methods for hardware description languages [47] . ...
doi:10.1016/s1567-8326(03)00041-9
fatcat:fg52xyfuvngaznxligtohebar4
Towards Designing Asynchronous Microprocessors: From Specification to Tape-out
2019
IEEE Access
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of those works in terms of area on the die and performance metrics. ...
The asynchronous logic has been known for its ability to address the aforementioned challenges by means of the closed-loop handshake protocols, instead of notorious clock signals. ...
The main purpose of the design was to use it as a test case in an integrated formal verification and distributed simulation environment [95] . ...
doi:10.1109/access.2019.2903126
fatcat:rwtsay62xbenhn5cgwzszhf4lm
Formalizing Arrow's theorem
2009
Sadhana (Bangalore)
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The details of this specific project, as well as the process of formalization (encoding proofs in the computer) in general are discussed. ...
A small project in which I encoded a proof of Arrow's theoremprobably the most famous results in the economics field of social choice theory-in the computer using the Mizar system is presented here. ...
HOL4 has been used by Anthony Fox to prove the correctness of a real microprocessor (the ARM6 micro-architecture) (Fox 2003 ). ...
doi:10.1007/s12046-009-0005-1
fatcat:xiyg27kxbrabtoreyopxukgxhq
A Formally Verified Compiler Back-end
2009
Journal of automated reasoning
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Such a verified compiler is useful in the context of formal methods applied to the certification of critical software: the verification of the compiler guarantees that the safety properties proved on the ...
This article describes the development and formal verification (proof of semantic preservation) of a compiler back-end from Cminor (a simple imperative intermediate language) to PowerPC assembly code, ...
Examples of such hardware verifications include the Piton project [69, 70] (from a high-level assembly language to an NDL netlist for a custom microprocessor), Fox's verification of the ARM6 micro-architecture ...
doi:10.1007/s10817-009-9155-4
fatcat:ofhgseu6hfda7fki4cyofq27bi
Mechanized semantics
[article]
2010
pre-print
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The topics covered include: operational semantics (small-step, big-step, definitional interpreters); a simple form of denotational semantics; axiomatic semantics and Hoare logic; generation of verification ...
The goal of this lecture is to show how modern theorem provers---in this case, the Coq proof assistant---can be used to mechanize the specification of programming languages and their semantics, and to ...
Beyond verifying compilers and other code generation tools, we'd like to gain formal assurance in the correctness of program verification tools such as static analyzers and program provers. ...
doi:10.3233/978-1-60750-100-8-195
arXiv:1010.5582v1
fatcat:kvbwzhpzrfbmrbmyqz23v553ve
An End-To-End Toolset For The Creation And Delivery Of Video-Based Multi-Device Content
2018
Zenodo
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We describe the three main components of the toolset. The production tool is implemented as a custom Adobe Premiere Pro plugin. ...
We introduce an end-to-end toolset for the production and delivery of synchronous multi-device content. ...
Acknowledgements Authors are grateful to: the members of ACAPO -Porto and ACAPO -Aveiro, who accepted to be part of the focus group, for their openness and kindness; and FCT and FSE for the financial support ...
doi:10.5281/zenodo.1402979
fatcat:gehlqemtongildlquzjz4dyzwe
Of stereotypes, political rights, and intersignification: postcolonial Moroccan writing
2001
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The quality of this reproduction is dependent upon the quality o f the copy submitted. ...
Thus, some thesis and dissertation copies are in typewriter face, while others may be from any type of computer printer. ...
) , to formal Arabic, to one of the three Berber languages -depending on the speakers' heritage, level of education, social status, as well as the personal, social or professional context he or she is ...
doi:10.7939/r3-eb9j-9p19
fatcat:5blqfdrtsbgdvhbnw7b4wsfhiu