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Formal Methods for Modelling and Analysis of Single-Event Upsets

Rene Rydhof Hansen, Kim Guldstrand Larsen, Mads Chr. Olesen, Erik Ramsgaard Wognsen
2015 2015 IEEE International Conference on Information Reuse and Integration  
In this paper we develop a formal semantic framework for easy formal modelling of a large variety of SEUs in a core assembly language capturing the essential features of the ARM assembly language.  ...  We use this framework to formally prove the soundness of a static analysis enforcing so-called blue/green separation in a given program.  ...  CONCLUSION We have formalised TinyARM, an assembly language close to the ARM language, and several fault models based on bitflips of varying degree of potency: data, flags, control registers or instruction  ... 
doi:10.1109/iri.2015.54 dblp:conf/iri/HansenLOW15 fatcat:dsh5qt3ygbb4rdci2fstatdg7a

A LEON3 Virtual Platform with real SpaceWire interfaces for dependable space software development

Antonio Da Silva Fariña, Sebastián Sánchez Prieto
2011 Proceedings of the 4th International ICST Conference on Simulation Tools and Techniques  
Each TLM component of the model exposes a standard TLM2.0 "transport_dbg" interface to allow internal component inspection and modification.  ...  In space software development there are strong robustness requirements that need advanced simulation techniques and tools to analyze the system behavior in the presence of faults.  ...  These key attributes are taken from FARM model introduced in [14] and are formalized in a XML based description.  ... 
doi:10.4108/icst.simutools.2011.245516 dblp:conf/simutools/SilvaS11 fatcat:jvy6zrhqendu7giprvgeyi3o5m

Batteries in Space [article]

Erik Ramsgaard Wognsen
2016 Ph.d.-serien for Det Teknisk-Naturvidenskabelige Fakultet, Aalborg Universitet  
We formalize a realistic low-level assembly language and show how programs in it can be modified to guarantee detection of computation errors caused by transient bit errors in data registers, thus making  ...  We show that precise modeling of battery behavior in the context of formal methods enables more efficient operation without extensive safety margins, and that battery-aware scheduling can reduce energy  ...  Paper E defines and formalizes a low-level language that captures the essential features of the ARM assembly language.  ... 
doi:10.5278/vbn.phd.engsci.00072 fatcat:jpclsc7jazhinmnn3wfrjissx4

No Crash, No Exploit: Automated Verification of Embedded Kernels [article]

Olivier Nicole, Matthieu Lemerre, Sébastien Bardin, Xavier Rival
2020 arXiv   pre-print
We propose a method that can verify both absence of runtime errors (i.e. crashes) and absence of privilege escalation (i.e. exploits) in embedded kernels from their binary executables.  ...  It is thus desirable to guarantee that a kernel is free from these bugs using formal methods, but the high cost and expertise required to do so are deterrent to wide applicability.  ...  Xavier Rival received funding from the French ANR, as part of the Veriamos grant. Matthieu Lemerre and Sébastien Bardin also received funding from the ANR as part of the TAVA grant.  ... 
arXiv:2011.15065v1 fatcat:7qprfoncxjfs3eavcy4xzjwhwa

Towards Practical Tools for Side Channel Aware Software Engineering: 'Grey Box' Modelling for Instruction Leakages

David McCann, Elisabeth Oswald, Carolyn Whitnall
2017 USENIX Security Symposium  
We confirm its versatility by demonstrating the basic technique on two processors (the ARM Cortex-M0 and M4), and use the M0 models to develop ELMO, the first leakage simulator for the ARM Cortex M0.  ...  Power (along with EM, cache and timing) leaks are of considerable concern for developers who have to deal with cryptographic components as part of their overall software implementation, in particular in  ...  Acknowledgments This work has been supported in part by EPSRC via grant EP/N011635/1 and by the European Union's H2020 Programme under grant agreement number 731591, as well as by a studentship from GCHQ  ... 
dblp:conf/uss/McCannOW17 fatcat:fwdpzrd4zjcp5aje6fd3y4sbze

A toolbox for software optimization of QC-MDPC code-based cryptosystems [article]

Nir Drucker, Shay Gueron
2017 IACR Cryptology ePrint Archive  
These optimized primitives offer a useful toolbox that can be used, in various ways, by designers and implementers of QC-MDPC cryptosystems.  ...  One example is the family of code-based cryptosystems that relies on the Syndrome Decoding Problem (SDP).  ...  Opinions, findings, conclusions, and recommendations, expressed in this material, are those of the author(s), and do not necessarily reflect the views of their employers and the granting agencies.  ... 
dblp:journals/iacr/DruckerG17 fatcat:n2wv7p4c5vd6boqsqcj4gwpzgq

A survey of the RISC-V architecture software support

Benjamin W. Mezger, Douglas A. Santos, Luigi Dilillo, Cesar A. Zeferino, Douglas R. Melo
2022 IEEE Access  
In this context, this survey reviews the contributions introduced in the last years to understand the RISC-V's software ecosystem and its usage in both academic and industrial environments.  ...  The primary goal of this research is to provide the community with a comprehensive overview of the current state of the art of RISC-V software support and identify and highlight the main contributions  ...  In addition, the work proposes a heuristic, code analysis, and generation technique to find an optimized register layout that exploits its performance and memory footprint.  ... 
doi:10.1109/access.2022.3174125 fatcat:smbyxselm5gjxlk4pqilzrxjli

TheHuzz: Instruction Fuzzing of Processors Using Golden-Reference Models for Finding Software-Exploitable Vulnerabilities [article]

Aakash Tyagi
2022 arXiv   pre-print
We analyze the intrinsic behaviors of hardware designs in HDLs and then measure the coverage metrics that model such behaviors.  ...  In this paper, we present the design and implementation of a novel hardware fuzzer, TheHuzz, that overcomes the aforementioned limitations and significantly improves the state of the art.  ...  *In theory, the bugs discovered can be used to build more than two exploits, but we show only two due to page limitations. [95], ARM Cortex Neoverse [96] , and ARM Fast Models [97] .  ... 
arXiv:2201.09941v1 fatcat:a3oint22fjc7xe56tvafvecedu

V0LTpwn: Attacking x86 Processor Integrity from Software [article]

Zijo Kenjar, Tommaso Frassetto, David Gens, Michael Franz, and Ahmad-Reza Sadeghi
2019 arXiv   pre-print
Fault-injection attacks have been proven in the past to be a reliable way of bypassing hardware-based security measures, such as cryptographic hashes, privilege and access permission enforcement, and trusted  ...  However, traditional fault-injection attacks require physical presence, and hence, were often considered out of scope in many real-world adversary settings.  ...  We provide a stripped down version of the relevant parts of the code in Listing 4, highlighting the most important parts in the form of inline assembly for clarity.  ... 
arXiv:1912.04870v1 fatcat:4bazs7ee65hlbd4d5dga63op7q

Automated mechanism design with co-evolutionary hierarchical genetic programming techniques

John A. Doucette, Darren Abramson
2012 Proceedings of the fourteenth international conference on Genetic and evolutionary computation conference - GECCO '12  
We present a novel form of automated game theoretic mechanism design in which mechanisms and players co-evolve.  ...  We also model the memetic propagation of strategies through a population of players, and argue that this process represents a more accurate depiction of human behavior than conventional economic models  ...  bitflip in meme mutation. pxo 0.  ... 
doi:10.1145/2330163.2330293 dblp:conf/gecco/DoucetteA12 fatcat:pqun6v6sf5g4dd47nbj63hrjke

Combined Fault and DPA Protection for Lattice-Based Cryptography [article]

Daniel Heinz, Thomas Pöppelmann
2021 IACR Cryptology ePrint Archive  
On an ARM Cortex-M4, our implementation of the RNR and fault countermeasure offers better performance than masking and redundant calculation.  ...  The progress on constructing quantum computers and the ongoing standardization of post-quantum cryptography (PQC) have led to the development and refinement of promising new digital signature schemes and  ...  The authors would like to thank the Chair for Communication Systems and Network Security as well as the research institute CODE at the Bundeswehr University in Munich, headed by Prof.  ... 
dblp:journals/iacr/HeinzP21 fatcat:o56qhp5uync5zhel5f2herd5de

Photonic Physical Unclonable Functions: From the Concept to Fully Functional Device Operating in the Field

M. Akriotou Department of Informatics Telecommunications, National and Kapodistrian University of Athens, Athens, Greece, Eulambia Advanced Technologies Ltd., Athens, Greece)
2020 arXiv   pre-print
The scope of this paper is to demonstrate a fully working and compact photonic Physical Unclonable Function (PUF) device capable of operating in real life scenarios as an authentication mechanism and random  ...  Two different software algorithms, the Random Binary Method (RBM) and Singular Value Decomposition (SVD), were tested for optimized key extraction and error correction codes have been incorporated for  ...  Innovation Infrastructures" (project code MIS: 5002735).  ... 
arXiv:2002.12618v1 fatcat:pzrtxqopl5fz3eqcvhj23uokye

Full Theoretical Runtime Analysis of Alternating Variable Method on the Triangle Classification Problem

Andrea Arcuri
2009 2009 1st International Symposium on Search Based Software Engineering  
These tasks are very difficult, and their automation in literature has been limited. To get a better understanding of how search algorithms work, there is the need of a theoretical foundation.  ...  In this thesis we also give the important contribution of defining a first theoretical foundation.  ...  as input the assembler code or byte-code of a program, we want to automatically derive its source code.  ... 
doi:10.1109/ssbse.2009.16 fatcat:ypqz4vfs45er7nlroqkranvrpi

On the Timing Leakage of the Deterministic Re-encryption in HQC KEM [article]

Clemens Hlauschek, Norman Lahr, Robin Leander Schröder
2021 IACR Cryptology ePrint Archive  
In this paper, we reveal that rejection sampling routines that are seeded with secretdependent information and leak timing information result in practical key recovery attacks in the code-based key encapsulation  ...  constant weight word sampler in the BIKE decapsulation, we demonstrate how to distinguish whether the decoding step is successful or not, and how this distinguisher is then used in the framework of the  ...  Here Decode is a kind of bitflipping decoder [Gal62] . The choice of decoder is a trade-off between efficiency and failure probability.  ... 
dblp:journals/iacr/HlauschekLS21 fatcat:5erhgi2gj5fqnlp2g6fnyfevn4

Don't Reject This: Key-Recovery Timing Attacks Due to Rejection-Sampling in HQC and BIKE

Qian Guo, Clemens Hlauschek, Thomas Johansson, Norman Lahr, Alexander Nilsson, Robin Leander Schröder
2022 Transactions on Cryptographic Hardware and Embedded Systems  
In this paper, we reveal that rejection sampling routines that are seeded with secretdependent information and leak timing information result in practical key recovery attacks in the code-based key encapsulation  ...  constant weight word sampler in the BIKE decapsulation, we demonstrate how to distinguish whether the decoding step is successful or not, and how this distinguisher is then used in the framework of the  ...  The work presented in this paper has been partly funded by the German Federal Ministry of Education and Research (BMBF) under the project "QuantumRISC" (ID 16KIS1033K) [Qua20] , by the Swedish Research  ... 
doi:10.46586/tches.v2022.i3.223-263 dblp:journals/tches/GuoHJLNS22 fatcat:axzhx5zjendergthxii3csefxi
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