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Flipping bits in memory without accessing them: An experimental study of DRAM disturbance errors

Yoongu Kim, Ross Daly, Jeremie Kim, Chris Fallin, Ji Hye Lee, Donghyuk Lee, Chris Wilkerson, Konrad Lai, Onur Mutlu
2014 2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA)  
We provide an extensive characterization study of disturbance errors and their behavior using an FPGA-based testing platform.  ...  Memory isolation is a key property of a reliable and secure computing system -an access to one memory address should not have unintended side effects on data stored in other addresses.  ...  Yoongu Kim is supported by an Intel fellowship.  ... 
doi:10.1109/isca.2014.6853210 dblp:conf/isca/KimDKFLLWLM14 fatcat:meyb4cofkzc7zos5ec4o7qfqae

Flipping bits in memory without accessing them

Yoongu Kim, Ross Daly, Jeremie Kim, Chris Fallin, Ji Hye Lee, Donghyuk Lee, Chris Wilkerson, Konrad Lai, Onur Mutlu
2014 SIGARCH Computer Architecture News  
We provide an extensive characterization study of disturbance errors and their behavior using an FPGA-based testing platform.  ...  Memory isolation is a key property of a reliable and secure computing system -an access to one memory address should not have unintended side effects on data stored in other addresses.  ...  Yoongu Kim is supported by an Intel fellowship.  ... 
doi:10.1145/2678373.2665726 fatcat:znphzlyydjfgpfuhf4mw2ajmca

Rethinking memory system design for data-intensive computing

Onur Mutlu
2015 2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)  
C company Up to 1.0×10 7 errors Up to 2.7×10 6 errors Up to 3.3×10 5 errors 14 Kim+, "Flipping Bits in Memory Without Accessing Them: An Experimental Study of DRAM Disturbance Errors  ...   Tolerating cell-to-cell interference at the system level  Kim+, "Flipping Bits in Memory Without Accessing Them: An Experimental Study of DRAM Disturbance Errors," ISCA 2014.  ... 
doi:10.1109/samos.2015.7363650 dblp:conf/samos/Mutlu15 fatcat:fc5a6u4sinhotaibqt6bsull2a

Detection Technique of Software-induced Rowhammer Attacks

Minkyung Lee, Jin Kwak
2021 Computers Materials & Continua  
generating a disturbance error affecting the neighboring cells, resulting in bit flips.  ...  In particular, a rowhammer attack, which exploits the characteristics of dynamic random access memory (DRAM), can quickly and continuously access the cells as the cell density of DRAM increases, thereby  ...  A bit flip is a phenomenon in which a repeatedly accessed memory row generates an electrical disturbance and affects adjacent rows.  ... 
doi:10.32604/cmc.2021.014700 fatcat:obrupafnp5ccxia5kqcmb3fftq

Intrinsic Rowhammer PUFs: Leveraging the Rowhammer effect for improved security

Andre Schaller, Wenjie Xiong, Nikolaos Athanasios Anagnostopoulos, Muhammad Umair Saleem, Sebastian Gabmeyer, Stefan Katzenbeisser, Jakub Szefer
2017 2017 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)  
Our PUF makes use of bit flips, which occur in DRAM cells due to rapid and repeated access of DRAM rows.  ...  In this work, we present a new type of a memory-based intrinsic PUF, which leverages the Rowhammer effect in DRAM modules; the Rowhammer PUF.  ...  ACKNOWLEDGEMENT This work has been partly funded by the German Research Foundation (Deutsche ForschungsGemeinschaft -DFG), as part of project P3 within the CRC 1119 CROSSING, and, also, partly by the German  ... 
doi:10.1109/hst.2017.7951729 dblp:conf/host/SchallerXASG0S17 fatcat:6z6ecd5fxjhthhcjm3ibv5gg3u

RowHammer: A Retrospective [article]

Onur Mutlu, Jeremie S. Kim
2019 arXiv   pre-print
It is the phenomenon that repeatedly accessing a row in a modern DRAM chip causes bit flips in physically-adjacent rows at consistently predictable bit locations.  ...  RowHammer is caused by a hardware failure mechanism called DRAM disturbance errors, which is a manifestation of circuit-level cell-to-cell interference in a scaled memory technology.  ...  In fact, two of our works experimentally examine read disturb errors in flash memory: 1) our original work in DATE 2012 [42] that provides a rigorous experimental study of error patterns in modern MLC  ... 
arXiv:1904.09724v1 fatcat:eucfr7lbrvawrjtztthuharb5a

Improving DRAM Performance, Security, and Reliability by Understanding and Exploiting DRAM Timing Parameter Margins [article]

Jeremie S. Kim
2021 arXiv   pre-print
without the interference of refresh commands.  ...  Overall, our studies build a new understanding of modern DRAM devices to improve computing system performance, reliability and security all at the same time.  ...  RowHammer: DRAM Disturbance Errors Modern DRAM devices suffer from disturbance errors that occur when a high rate of accesses to a single DRAM row unintentionally flip the values of cells in nearby rows  ... 
arXiv:2109.14520v1 fatcat:7hhrlz3tfjgx5fekdblfawxf3a

NeuroHammer: Inducing Bit-Flips in Memristive Crossbar Memories [article]

Felix Staudigl, Hazem Al Indari, Daniel Schön, Dominik Sisejkovic, Farhad Merchant, Jan Moritz Joseph, Vikas Rana, Stephan Menzel, Rainer Leupers
2021 arXiv   pre-print
We demonstrate that bit-flips can be deliberately induced in ReRAM devices in a crossbar by systematically writing adjacent memory cells.  ...  Emerging non-volatile memory (NVM) technologies offer unique advantages in energy efficiency, latency, and features such as computing-in-memory.  ...  Kim et al., “Flipping bits in memory without accessing them: An of the system would typically mitigate frequent activation of the  ... 
arXiv:2112.01087v2 fatcat:zs7jw4aysnfpzcoyfwpvp4uxcy

Are We Susceptible to Rowhammer? An End-to-End Methodology for Cloud Providers [article]

Lucian Cojocar, Jeremie Kim, Minesh Patel, Lillian Tsai, Stefan Saroiu, Alec Wolman, Onur Mutlu
2020 arXiv   pre-print
Our findings show that none of the CPU instruction sequences used in prior work to mount Rowhammer attacks create worst-case DRAM testing conditions.  ...  With our methodology, a cloud provider can construct worst-case testing conditions for DRAM. We apply our methodology to three classes of servers from a major cloud provider.  ...  Finally, we greatly appreciate the overall support of Victor Bahl.  ... 
arXiv:2003.04498v1 fatcat:kvys72dfy5ffnasgriwnhbb7cq

Uncovering In-DRAM RowHammer Protection Mechanisms: A New Methodology, Custom RowHammer Patterns, and Implications [article]

Hasan Hassan, Yahya Can Tugrul, Jeremie S. Kim, Victor van der Veen, Kaveh Razavi, Onur Mutlu
2021 arXiv   pre-print
We find that the DRAM modules we analyze are vulnerable to RowHammer, having bit flips in up to 99.9% of all DRAM rows.  ...  To assess the security guarantees of recent DRAM chips, we present Uncovering TRR (U-TRR), an experimental methodology to analyze in-DRAM TRR implementations.  ...  Dennard, “Field-Effect Transistor Memory,” 1968, US Patent 3,387,286. O. Mutlu, “Flipping Bits in Memory Without Accessing Them: An Experimental [22] F. Devaux and R.  ... 
arXiv:2110.10603v1 fatcat:ab7zgdwb3vaqtbszjmyxuvngny

ANVIL

Zelalem Birhanu Aweke, Salessawi Ferede Yitbarek, Rui Qiao, Reetuparna Das, Matthew Hicks, Yossi Oren, Todd Austin
2016 Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS '16  
Recent studies have shown serious security concerns due to "rowhammer" attacks, where repeated accesses to a row of memory cause bit flips in adjacent rows.  ...  ANVIL detects rowhammer attacks by tracking the locality of DRAM accesses using existing hardware performance counters.  ...  This work was supported in part by C-FAR, one of the six STARnet Centers, sponsored by MARCO and DARPA.  ... 
doi:10.1145/2872362.2872390 dblp:conf/asplos/AwekeYQDHOA16 fatcat:gg65wy5mbbehnk4bc4vs4peyai

Curious Case of Rowhammer: Flipping Secret Exponent Bits Using Timing Analysis [chapter]

Sarani Bhattacharya, Debdeep Mukhopadhyay
2016 Lecture Notes in Computer Science  
Rowhammer attacks have exposed a serious vulnerability in modern DRAM chips to induce bit flips in data which is stored in memory.  ...  An intelligent combination of timing Prime + Probe attack and row-buffer collision is shown to induce bit flip faults in a 1024 bit RSA key on modern processors using realistic number of hammering attempts  ...  This research was supported in part by the TCS Research Scholarship Program in collaboration with IIT Kharagpur.  ... 
doi:10.1007/978-3-662-53140-2_29 fatcat:42mmvsnuhva43jvfcttluduhoa

Defeating Software Mitigations Against Rowhammer: A Surgical Precision Hammer [chapter]

Andrei Tatar, Cristiano Giuffrida, Herbert Bos, Kaveh Razavi
2018 Lecture Notes in Computer Science  
We use RAMSES to build Hammertime, an open-source suite of tools for studying Rowhammer properties affecting attacks and defenses, which we release as open-source software.  ...  In this paper, we show that the assumptions existing software defenses make about memory addressing are inaccurate.  ...  Out of these, 14 exhibited Rowhammer bit flips during an initial test run and were selected for further experimentation. The vulnerable memory setups in question are detailed in Table 1 .  ... 
doi:10.1007/978-3-030-00470-5_3 fatcat:mmhi2bax4zerfjpkmdvs5tcvyy

PThammer: Cross-User-Kernel-Boundary Rowhammer through Implicit Accesses [article]

Zhi Zhang, Yueqiang Cheng, Dongxi Liu, Surya Nepal, Zhi Wang, Yuval Yarom
2020 arXiv   pre-print
Rowhammer is a hardware vulnerability in DRAM memory, where repeated access to memory can induce bit flips in neighboring memory locations.  ...  Recently, several proposals suggest exploiting the spatial proximity between the accessed memory location and the location of the bit flip for a defense against rowhammer.  ...  ACKNOWLEDGMENT This project was supported by an Australian Research Council Discovery Early Career Researcher Award (project number: DE200101577) and by a gift from Intel.  ... 
arXiv:2007.08707v2 fatcat:zp5fkgf4o5cuxgpccdqjz75z7u

DeepHammer: Depleting the Intelligence of Deep Neural Networks through Targeted Chain of Bit Flips [article]

Fan Yao, Adnan Siraj Rakin, Deliang Fan
2020 arXiv   pre-print
and precise flipping of targeted bits.  ...  To trigger deterministic bit flips across multiple pages within reasonable amount of time, we develop novel system-level techniques that enable fast deployment of victim pages, memory-efficient rowhammering  ...  Rowhammer is a class of fault injection attacks that exploits DRAM disturbance errors.  ... 
arXiv:2003.13746v1 fatcat:3afawi4wzzfypa47mdetvx6bra
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