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Fast prototyping

Francois Pogodalla, Richard Hersemeule, Pierre Coulomb
1999 Proceedings of the seventh international workshop on Hardware/software codesign - CODES '99  
This paper describes a new design flow that significantly reduces time-to-market for highly complex multiprocessorbased System-On-Chip (SOC) designs.  ...  This flow, put in place within STMicroelectronics and which is called Fast Prototyping, allows concurrent hardware and software development, early verification and enables the productive re-use of intellectual  ...  Fast Prototyping: a system design flow for fast design, prototyping and efficient IP reuse Francois Pogodalla STMicroelectronics 5bis, Chemin de la Dhuy F-38240 Meylan France +33-476-584-037 francois.pogodalla  ... 
doi:10.1145/301177.301215 dblp:conf/codes/PogodallaHC99 fatcat:uhgtialkfnfijehd4tsp2biuha

Fast FPGA Prototyping based Real-Time Image and Video Processing with High-Level Synthesis

Refka Ghodhbani, Layla Horrigue, Taoufik Saidani, Mohamed Atri
2020 International Journal of Advanced Computer Science and Applications  
It uses a Model-Based Design workflow based on HDL Coder (MBD), Vision HDL Toolbox, Simulink and MATLAB for the purpose of accelerating the design of image and video solution.  ...  It can facilitate the development of digital image and video processing systems. Recently, high-level synthesis (HLS) has played a significant role in developing this field of study.  ...  Fig. 9 . 9 Hardware Prototype for Color System Conversion. Fig. 10 . 10 Vivado IP Integrator with Several IP-Blocks for Color System Conversion.  ... 
doi:10.14569/ijacsa.2020.0110215 fatcat:zpue6cwfanbsbnuxgpx6pbwnsm

Silicon virtual prototyping

Wei-Jin Dai, Dennis Huang, Chin-Chih Chang, Michel Courtoy
2003 Proceedings of the 2003 conference on Asia South Pacific design automation - ASPDAC  
A design methodology for the implementation of multi-million gate system-on-chip designs is described.  ...  The prototype is generated in a fraction of the time required to complete the traditional back-end flow but still maintains very high correlation with the final design.  ...  Based on the fast physical implementation, the circuit can be partitioned more effectively into a set of macro blocks, each of which is either a set of standard cells or an IP block (design reuse).  ... 
doi:10.1145/1119772.1119916 dblp:conf/aspdac/DaiHCC03 fatcat:zrsc5gcwgnfjbkrq3zkogud2my

Improving ns-3 Emulation Performance for Fast Prototyping of Network Protocols

Helder Fontes, Tiago Cardoso, Manuel Ricardo
2016 Proceedings of the Workshop on ns-3 - WNS3 '16  
Fast prototyping is a protocol development process that attempts to solve this problem by reusing ns-3 simulation code for the implementation.  ...  in real environments and verified the amount of code reuse between the simulator and the real system.  ...  , direct code execution, and fast prototyping.  ... 
doi:10.1145/2915371.2915374 dblp:conf/wns3/FontesCR16 fatcat:ynrq4y3y5rag3o27vt435jlgfu

C- Based Rapid Prototyping For Digital Signal Processing

Bertrand Le Gal, Emmanuel Casseau, Sylvain Huet, Pierre Bomel, Christophe Jego, Eric Martin
2005 Zenodo  
In this context, platforms aim at providing an IP-reuse framework for SoC design, thus reduce the IP development and integration phases.  ...  RAPID PROTOTYPING SYSTEM DESIGN FLOW System design flow In the prototyping platform context the design flow consists in mapping the functional architecture (interconnected algorithmic functions, e.g.  ... 
doi:10.5281/zenodo.38823 fatcat:jonh2qvebzexpprnticzbkya5m

Fast prototyping of parallel-vision applications using functional skeletons

Jocelyn Sérot, Dominique Ginhac, Roland Chapuis, Jean-Pierre Dérutin
2001 Machine Vision and Applications  
We present a design methodology for real-time vision applications aiming at significantly reducing the design-implement-validate cycle time on dedicated parallel platforms.  ...  Sérot et al.: Fast prototyping of parallel-vision applications using functional skeletons the algorithm under realistic operating conditions -at least a dozen images per second for the application presented  ...  The authors would like to thank the anonymous referees for many insightful comments which led to improvements in this paper.  ... 
doi:10.1007/s001380050146 fatcat:yeuoewp6rndabitchtlo4u63ca

Embedded Systems Design and Verification: Reuse Oriented Prototyping Methodologies [chapter]

S. Raimbault, G. Sassatelli, G. Cambon, M. Robert, S. Pillement, L. Torres
2000 IFIP Advances in Information and Communication Technology  
SPW [2] (from Cadence) can handle a wide variety ofmodels in a cosimulation for virtual prototyping.  ...  The key solution for saving design time is Design Reuse. However, while design reuse solves many design problems, it causes increased verification problems.  ...  We first build a data-flow model of the system, reusing the specification's e code for the computing block.  ... 
doi:10.1007/978-0-387-35498-9_36 fatcat:77w44aiehvdipmva52vgobsdpm

Rapid Prototyping Of Image Analysis Algorithms On An Adaptive Fgpa Architecture

Zahir Larabi, Linlin Zhang, Virginie Fresse, Anne-Claire Legrand
2007 Zenodo  
Section 3 describes the fast design flow proposed for this architecture.  ...  DESIGN FLOW A fast and reliable design flow for this adaptive architecture is proposed in figure 4 . The input description is the C or C++ algorithm described by the image processing designer.  ... 
doi:10.5281/zenodo.40375 fatcat:4ddukqpr5vhlpacw2dgzmaocj4

Virtual Prototyping of Embedded Platforms for Wireless and Multimedia

T. Kogel, M. Braun
2006 Proceedings of the Design Automation & Test in Europe Conference  
We believe that one of the major obstacles preventing the urgently required adoption and proliferation of an ESL based design approach is the nonexistence of an efficient and intuitive methodology for  ...  Most of the challenges related to the development of multi-processor platforms for complex wireless and multimedia applications fall into the Electronic System Level (ESL) domain.  ...  TLM based ESL design flow The goals of our modeling methodology are high simulation speed, modeling efficiency, and reusability for the different ESL design tasks.  ... 
doi:10.1109/date.2006.243856 dblp:conf/date/KogelB06 fatcat:u3ip3l24pfhsjpqyww5rl7hiiq

Prototyping Embedded Dsp Systems - From Specification To Implementation

Zoran Salcic
2004 Zenodo  
The approach enables very fast prototyping of the STR in a realistic testbed environment, where all STR functionalities are prototyped in FPGA device, and all system (plant) environment, as well as facilities  ...  Figure 1 illustrates complexity of embedded DSP systems design and implementation and issues involved in the design flow which influence final system implementation.  ... 
doi:10.5281/zenodo.38706 fatcat:navkxtet35ae7hpjep3xrbe6oi

FPGA prototyping of an amba-based windows-compatible SoC

Kan Huang, Junlin Lu, Jiufeng Pang, Yansong Zheng, Hao Li, Dong Tong, Xu Cheng
2010 Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays - FPGA '10  
For P86-Min, which is to verify the minimum set of PKUnity86, we implement the RTL code on two Xilinx Virtex-4 LX200 FPGA devices and emulate the full system on a single FPGA board.  ...  To overcome the limitations, we propose the PKUnity86 SoC architecture, which is based on AMBA bus architecture to support fast IP integration.  ...  The design goal of PKUnity86 is twofold: in hardware aspect, PKUnity86 keeps the scalability of AMBA-based SoCs to support fast IP integration and reuse the abundant IP resources [6] ; in software aspect  ... 
doi:10.1145/1723112.1723117 dblp:conf/fpga/HuangLPZLTC10 fatcat:nihprquh2zawvg4pfszuo773gy

Prototyping the recursive internet architecture: the IRATI project approach

Sander Vrijders, Dimitri Staessens, Didier Colle, Francesco Salvestrini, Eduard Grasa, Miquel Tarzan, Leonardo Bergesio
2014 IEEE Network  
A lot of these new architectures merely extend the current TCP/IP architecture and hence do not solve the fundamental cause for these problems.  ...  A first open source prototype of the IRATI implementation of RINA will be available in June 2014 for researchers, developers and early adopters. • the Alba prototype, jointly developed by i2CAT and TSSG  ...  ACKNOWLEDGMENT This work is partly funded by the European Commission through the IRATI project (Grant 317814), part of the Future Internet Research and Experimentation (FIRE) objective of the Seventh Framework  ... 
doi:10.1109/mnet.2014.6786609 fatcat:w5wpqj7lkrdyzg3cdsrp65k4hu

A Survey Of Virtual Prototyping Techniques For System Development And Validation

Shunan Mu, Guoqing Pan,
2015 Zenodo  
Hardware device, firmware and device driver development account for a significant portion of system development and validation effort.  ...  Third, the industry has built hybrid emulation and hybrid FPGA systems for system validation using virtual prototyping.  ...  If we can reuse them in a hybrid system, it can save time to develop a new virtual prototype. Use necessary RTL design.  ... 
doi:10.5281/zenodo.1211148 fatcat:7blkasonf5cezd5q5jltunqlwm

Syndex Executive Kernels For Fast Development Of Applications Over Heterogeneous Architectures

Mickael Raulet, Christophe Moy, Fabrice Urban, Jean Franois Nezan, O. Deforges
2005 Zenodo  
Compared with a manual approach, the use of our fast prototyping process ensures easy reuse, reduced time to market, design security, flexibility, virtual prototyping, efficiency and portability.  ...  For the first class of system (including signal, image and communication applications), DFG (Data Flow Graphs) have proven to be an efficient representation model.  ... 
doi:10.5281/zenodo.39025 fatcat:rkllmph4lnh4nl7efh3o5fw23m

D9.3.3: Report on prototypes evaluation

Lennart Johnsson, Gilbert Netzer
2013 Zenodo  
WP9 has carried out this task through evaluation of a number of prototypes targeting novel approaches to HPC server and system design with many prototypes having some degree of direct industry involvement  ...  Two prototypes focused on novel approaches to scalability of I/O systems in support of Exascale systems and their energy efficiency.  ...  D9.3.3 Report on prototypes evaluation PRACE-1IP -RI-261557 29.03.2013  ... 
doi:10.5281/zenodo.6553033 fatcat:nvxbrlq5jzdfhbkh5fde3kpl4e
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