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Facile

Eric C. Schnarr, Mark D. Hill, James R. Larus
2001 Proceedings of the ACM SIGPLAN 2001 conference on Programming language design and implementation - PLDI '01  
This paper describes Facile, a domain-specific language for writing detailed, accurate micro-architecture simulators.  ...  Facile and its compiler make this performance-enhancing technique accessible to computer architects.  ...  ACKNOWLEDGMENTS Many thanks to Ras Bodik, Charles Consel, Manuvir Das, Jakob Rehof, and Anne Rogers for their helpful comments.  ... 
doi:10.1145/378795.378864 dblp:conf/pldi/SchnarrHL01 fatcat:oculx5covzdktd7qr5r2pwxluy

Facile

Eric C. Schnarr, Mark D. Hill, James R. Larus
2001 SIGPLAN notices  
This paper describes Facile, a domain-specific language for writing detailed, accurate micro-architecture simulators.  ...  Facile and its compiler make this performance-enhancing technique accessible to computer architects.  ...  ACKNOWLEDGMENTS Many thanks to Ras Bodik, Charles Consel, Manuvir Das, Jakob Rehof, and Anne Rogers for their helpful comments.  ... 
doi:10.1145/381694.378864 fatcat:ayrl4c3d4vbdvatkrt2nzzzqla

A computer simulation facility for packet communication architecture

Clement K.C. Leung, David P. Misunas, Andrij Neczwid, Jack B. Dennis
1976 SIGARCH Computer Architecture News  
A simulation facility for evaluating the prograranability and potential performance of these proposed data processing and memory systems has been designed.  ...  The user of the facility will specify the system to be simulated in an architecture description language.  ...  Acknowledgements The authors wish to thank Bob Jacobsen and Dave Isaman for many helpful cormnents and suggestions.  ... 
doi:10.1145/633617.803550 fatcat:otqimz56sbcoddrnfths5txdly

A computer simulation facility for packet communication architecture

Clement K.C. Leung, David P. Misunas, Andrij Neczwid, Jack B. Dennis
1976 Proceedings of the 3rd annual symposium on Computer architecture - ISCA '76  
A simulation facility for evaluating the prograranability and potential performance of these proposed data processing and memory systems has been designed.  ...  The user of the facility will specify the system to be simulated in an architecture description language.  ...  Acknowledgements The authors wish to thank Bob Jacobsen and Dave Isaman for many helpful cormnents and suggestions.  ... 
doi:10.1145/800110.803550 dblp:conf/isca/LeungMND76 fatcat:sepshes6svanplasnff64o6zji

Evaluation of AMD's advanced synchronization facility within a complete transactional memory stack

Dave Christie, Patrick Marlier, Etienne Rivière, Jae-Woong Chung, Stephan Diestelhorst, Michael Hohmuth, Martin Pohlack, Christof Fetzer, Martin Nowack, Torvald Riegel, Pascal Felber
2010 Proceedings of the 5th European conference on Computer systems - EuroSys '10  
We have extended a C/C++ compiler to support language-level transactions and generate code that takes advantage of ASF.  ...  Our evaluation uses a cycle-accurate x86 simulator that we have extended with ASF support.  ...  Acknowledgments We are very grateful to Richard Henderson and Aldy Hernandez of Red Hat for working on and sharing gcc-tm.  ... 
doi:10.1145/1755913.1755918 dblp:conf/eurosys/ChristieCDHPFNRFMR10 fatcat:3wuibkdfjvg3dkzmgcpycitv54

A facility for the downward extension of a high-level language

Thomas N. Turba
1982 Proceedings of the 1982 SIGPLAN symposium on Compiler construction - SIGPLAN '82  
The way in which the facility was implemented calls for a minimum of user-visible language changes and is well suited for generating code sequences for any language.  ...  In essence, it is a facility that allows a user to make special purpose extensions to a language without requiring the compiler to be modified for each extension.  ...  Introduction Many high-level languages have facilities for upward extension by a user.  ... 
doi:10.1145/800230.806988 dblp:conf/sigplan/Turba82 fatcat:eiojy2vhe5gmdf6s33rnr5pfgq

JURECA: Modular supercomputer at Jülich Supercomputing Centre

Dorian Krause, Philipp Thörnig
2018 Journal of large-scale research facilities JLSRF  
With its novel architecture, it supports a wide variety of high-performance computing and data analytics workloads.  ...  and Dell EMC based on the Xeon Phi many-core processor.  ...  The processor package includes 16 GiB of high-bandwidth, multi-channel DRAM (MCDRAM) with a bandwidth of up to 500 GB/s. The peak performance of a Booster compute node is 3 TFlop/s.  ... 
doi:10.17815/jlsrf-4-121-1 fatcat:5d2lp2z2ijfvjgmgslxj56iqwe

Program locality of vectorized applications running on the IBM 3090 with Vector Facility

K. So, V. Zecca
1988 IBM Systems Journal  
3090 system.* These new and much more powerful processor (CPU) organiza- tions require a well-matched high-performance 436 so Ano zecca by K.  ...  The simu- lator, which models an IBM 3090 processor with Vector Facility and a cache, was developed to help a pro- grammer improve the performance of an application through better understanding and use  ... 
doi:10.1147/sj.274.0436 fatcat:sghmk4rh5reaxiy4ok6rufbnue

ASONIKA System – Radio-Electronic Facilities Developer Tool

A. S. Shalumov, E. O. Pershin, O. E. Kulikov
2014 Information Technologies and Control  
This article deals with issues and analysis tasks, electronic elements and radio-electronic facilities reliability simulation with due regard for thermal, mechanical, electro-magnetic and other exposures  ...  , also software analysis is performed.  ...  In this case reasons for system malfunctions can be detected and eliminated and high rate reliability of REF will be provided.  ... 
doi:10.1515/itc-2015-0009 fatcat:2g2txmocnbhdbema4qcs65rimy

Microprocessor uses in a timeshared facility

James L. Fox, Richard V. Wolf, Alan M. Lesgold
1979 Behavior Research Methods  
However, we fully intend to move to higher level languages for the micro as soon as reasonable systems for the processors become available.  ...  CROSS-COMPILERS AND CROSS-ASSEMBLERS Cross-compiling and cross-assembling are techniques of using one computer system (host) to produce machine code for another (usually smaller) system.  ... 
doi:10.3758/bf03205663 fatcat:ssu2mzab65egxl6dlknhmvuzla

Development of a microprocessor support facility for large organizations

Bruce E. Stock, Miguel A. Ulloa
1980 Proceedings of the May 19-22, 1980, national computer conference on - AFIPS '80  
A user at a terminal on this expanded system can model system performance using a High Level Language, perform trade studies and run benchmarks on several different microprocessors using the simulators  ...  Evaluation kits, development systems, analyzers, high level languages, and software simulators are but a few of the available aids permitting more rapid design, integration, and debugging of systems incorporating  ... 
doi:10.1145/1500518.1500595 dblp:conf/afips/StockU80 fatcat:c2yy6ytw5jchvoyc7yhapxwo74

Networked object monitor – a distributed system for monitoring, diagnostics and control of complex industrial facilities

Zdzisław Kowalczuk, Jakub Wszołek
2012 Metrology and Measurement Systems  
The paper also describes a preliminary concept of a network description language (SMOL), which is designed to describe the functions, mechanisms, and network devices and to be a basis for simulation and  ...  The paper puts forward a method of designing and creating a complete computer system for monitoring and diagnosis of business and industrial facilities, as well as for control purposes.  ...  Using more powerful processors, we are able to solve a number of performance issues that arise during operation of these modules in complex and noisy environments.  ... 
doi:10.2478/v10178-012-0045-4 fatcat:swomb3nqfrbgrcuab54fprtevu

Report of the Snowmass 2013 Computing Frontier Working Group on Distributed Computing and Facility Infrastructures [article]

Kenneth Bloom, Richard Gerber
2013 arXiv   pre-print
This is the report of the Snowmass 2013 Computing Frontier Working Group on Distributed Computing and Facility Infrastructures.  ...  high-speed internal network, and sometimes a fast I/O subsystem. In recent years a need for HTC has quickly grown in the science community.  ...  Figure 1 - 4 . 14 Performance of the Top 500 supercomputers as compiled by Top500.org. Computational power doubles about every 14 months.  ... 
arXiv:1311.2208v1 fatcat:diy6yuxq7janbaemvfz535bxde

pF3D Simulations of Laser-Plasma Interactions in National Ignition Facility Experiments

Steven H. Langer, Abhinav Bhatele, Charles H. Still
2014 Computing in science & engineering (Print)  
The paper concludes with a comparison of the backscattered light measured in NIF experiments and computed in the pF3D simulation. !  ...  The laser-plasma interaction code, pF3D, is used to simulate laser-plasma interactions in National Ignition Facility experiments.  ...  His research interests include the physics of inertial confinement fusion, high performance computing, and adapting physics simulation codes to new architectures.  ... 
doi:10.1109/mcse.2014.79 fatcat:a3nq4vb2dng4xdz5kvlmj6k74a

Development of a Low-Cost, Multi-Disciplinary Rotorcraft Simulation Facility

Joseph F. Horn, Derek O. Bridges, Leonard V. Lopes, Kenneth S. Brentner
2005 Journal of Aerospace Computing Information and Communication  
A low-cost rotorcraft simulation facility was developed for use in university-based multidisciplinary research programs.  ...  The objective was to develop a flexible and effective research facility with a low initial cost and minimal recurring costs.  ...  The use of a low-cost engineering simulation facility can still be quite valuable for both education and graduate research.  ... 
doi:10.2514/1.13800 fatcat:7f6ru6ubdvgoxhvmne77bkoa4y
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