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Extending list scheduling to consider execution frequency

M.J. Bourke, P.H. Sweany, S.J. Beaty
1996 Proceedings of HICSS-29: 29th Hawaii International Conference on System Sciences  
Frequency-Based List Scheduling (FBLS) extends standard List Scheduling by considering execution frequencies within a schedule.  ...  FBLS provides an answer to this problem by considering the differing execution frequencies within meta-blocks when scheduling operations.  ...  Frequency-Based List Scheduling is an instruction scheduling technique based upon list scheduling that considers execution frequency of instructions when placing operations.  ... 
doi:10.1109/hicss.1996.495463 dblp:conf/hicss/BourkeSB96 fatcat:rvqhi7knezerrb2baifwcqoopq

Towards Energy Aware Scheduling for Precedence Constrained Parallel Tasks in a Cluster with DVFS

Lizhe Wang, Gregor von Laszewski, Jay Dayal, Fugang Wang
2010 2010 10th IEEE/ACM International Conference on Cluster, Cloud and Grid Computing  
This paper aims to develop scheduling heuristics and to present application experience for reducing power consumption of parallel tasks in a cluster with the Dynamic Voltage Frequency Scaling (DVFS) technique  ...  By increasing task execution time within an affordable limit, this paper develops scheduling heuristics to reduce energy consumption of a tasks execution and discusses the relationship between energy consumption  ...  The scheduled task graph is shown in Algorithm 2 The ETF scheduling algorithm 1 job n .level: priority of task job n ∈ J 2 ready job list: list of jobs that are ready to be executed 3 P E list: list of  ... 
doi:10.1109/ccgrid.2010.19 dblp:conf/ccgrid/WangLDW10 fatcat:kiu5oibsjjaphedihykmeeuiwa

Combined dynamic voltage scaling and adaptive body biasing for heterogeneous distributed real-time embedded systems

Le Yan, Jiong Luo, N.K. Jha
2003 ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No.03CH37486)  
Previous system-level real-time scheduling approaches use DVS alone to optimize power consumption without considering leakage power.  ...  Based on this expression, we compute the optimal energy consumption at a given clock frequency and analyze the tradeoff between energy consumption and execution time for a set of tasks with precedence  ...  The frequency scalings of some tasks might influence the validity of the new schedule. For each scheduled event, its LFT is updated based on its extended execution time WCET.  ... 
doi:10.1109/iccad.2003.159667 fatcat:udltf3cla5e2hha4lwukt6wsgq

Parcus: Energy-Aware and Robust Parallelization of AUTOSAR Legacy Applications

Sebastian Kehr, Eduardo Quinones, Dominik Langen, Bert Boddeker, Gunter Schafer
2017 2017 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS)  
The parallel schedule quality (PSQ) metric quantifies the success of the parallelization, for which it takes the latency and the processor frequency into account.  ...  Parcus explicitly models the traversal of data from sensor to actuator through task instances, enabling to consider the latency imposed by parallelization techniques.  ...  The needed processor frequency goes down to 17.5 % compared to the processor frequency of task execution in a serial.  ... 
doi:10.1109/rtas.2017.4 dblp:conf/rtas/KehrQLBS17 fatcat:tlxy7kco5nh5bpbowmmrbyhhvu

Joint dynamic voltage scaling and adaptive body biasing for heterogeneous distributed real-time embedded systems

L. Yan, Jiong Luo, N.K. Jha
2005 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
We first derive an energy consumption model to determine the optimal supply voltage and body bias voltage under a given clock frequency.  ...  Previous system-level approaches focus on reducing power consumption without considering leakage power consumption.  ...  to its execution time (18) Energy gradient , which is a function of clock frequency , indicates the energy reduction rate if the execution time of task at clock frequency is extended by time unit.  ... 
doi:10.1109/tcad.2005.850895 fatcat:3t2lbqw3qbd43jgyk3qqokkwkm

Power-Efficient Scheduling for Heterogeneous Distributed Real-Time Embedded Systems

Jiong Luo, Niraj K. Jha
2007 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
The scheduling algorithm performs execution order optimization of scheduled events to increase the chances of scaling down voltages and frequencies of these voltage-scalable PEs in the distributed embedded  ...  Then, we present a power-efficient variable-voltage scheduling algorithm to address these implications.  ...  , in which the execution times of the tasks are extended according to their new execution clock frequencies.  ... 
doi:10.1109/tcad.2006.885736 fatcat:tsgimimjfjedloprqhiyswr2oa

Efficient task scheduling for runtime reconfigurable systems

Mahmood Fazlali, Mojtaba Sabeghi, Ali Zakerolhosseini, Koen Bertels
2010 Journal of systems architecture  
The proposed on-line task scheduling algorithm outperforms previous algorithms and accelerates task execution from 4% up to 20 percent.  ...  To do so, a new task replacement parameter, called Time-Improvement, is proposed for compiler assisted scheduling algorithms.  ...  ACKNOWLEDGEMENTS The authors would like to thank the reviewers for the insightful suggestions on improving this paper.  ... 
doi:10.1016/j.sysarc.2010.07.016 fatcat:k6vbr7zu2banxmbwlkkobe25gq

An Efficient Fault-Tolerant Scheduling Approach with Energy Minimization for Hard Real-Time Embedded Systems

Barkahoum Kada, Hamoudi Kalla
2019 Cybernetics and Information Technologies  
Fault tolerance is achieved via both checkpointing technique and active replication strategy to tolerate multiple transient faults, whereas energy minimization is achieved by adapting Dynamic Voltage Frequency  ...  DVFS_FTS is based on a list scheduling heuristics, it satisfies real-time constraints and minimizes energy consumption even in the presence of faults by exploring the multiprocessor architecture.  ...  Our scheduling algorithm is a list scheduling based heuristics, which uses the concept of ready task and ready list. By ready task , we mean that all 's predecessors have been scheduled.  ... 
doi:10.2478/cait-2019-0035 fatcat:qvdkm3g6mzdpxnhsv4kjrjvfsa

A Scalable and Reproducible System-on-Chip Simulation for Reinforcement Learning [article]

Tegg Taekyong Sung, Bo Ryu
2021 arXiv   pre-print
The simulation corroborates to schedule hierarchical jobs onto heterogeneous System-on-Chip (SoC) processors and bridges the system to reinforcement learning research.  ...  By extending the conventional interaction scheme, this paper proffers gym-ds3, a scalable and reproducible open environment tailored for a high-fidelity Domain-Specific System-on-Chip (DSSoC) application  ...  ACKNOWLEDGMENT The authors would like to thank Hanbum Ko for experiment setup and Jeewoo Kim for valuable discussions.  ... 
arXiv:2104.13187v1 fatcat:kxp3rm26c5a65ni2kwv7rm6euy

Considering power variations of DVS processing elements for energy minimisation in distributed systems

Marcus T. Schmitz, Bashir M. Al-Hashimi
2001 Proceedings of the 14th international symposium on Systems synthesis - ISSS '01  
However, they achieve the energy savings solely by scaling the system task with respect to the timing constraints, while neglecting that power varies among the tasks executed by DVS processing elements  ...  In this paper we investigate the problem of considering DVS-PE power variations dependent on the executed tasks, during the synthesis of distributed embedded systems and its impact on the energy savings  ...  They also wish to acknowledge EPSRC for funding this research project.  ... 
doi:10.1145/500001.500060 fatcat:2l5pup5f2jbbzcqljwguhkbt54

Considering power variations of DVS processing elements for energy minimisation in distributed systems

Marcus T. Schmitz, Bashir M. Al-Hashimi
2001 Proceedings of the 14th international symposium on Systems synthesis - ISSS '01  
However, they achieve the energy savings solely by scaling the system task with respect to the timing constraints, while neglecting that power varies among the tasks executed by DVS processing elements  ...  In this paper we investigate the problem of considering DVS-PE power variations dependent on the executed tasks, during the synthesis of distributed embedded systems and its impact on the energy savings  ...  They also wish to acknowledge EPSRC for funding this research project.  ... 
doi:10.1145/500058.500060 fatcat:5rhrlg34gje4bpkxu4rre35jci

Page 7646 of Mathematical Reviews Vol. , Issue 95m [page]

1995 Mathematical Reviews  
They consider a logic program proof tree as a parse tree of some grammar and try to extend results and methods established for grammars to logic programs. The book consists of 8 chapters.  ...  The scheduling strategy may have dramatic effect on the executive time of a parallel program.  ... 

Optimization of Processor Clock Frequency for Sensor Network Nodes Based on Energy Use and Timing Constraints

Youngmin Kim, Heeju Joo, Chan-Gun Lee
2014 International Journal of Distributed Sensor Networks  
However, most power-aware scheduling algorithms are designed to deal with only those cases in which the task execution time is determined solely by the clock frequency of the processor.  ...  Dynamic voltage frequency scaling (DVFS) and dynamic power management (DPM) have been proposed to enable energy-efficient scheduling for real-time and embedded systems.  ...  The task execution model is designed to consider the different clock frequencies of the processor and the device.  ... 
doi:10.1155/2014/617346 fatcat:rlzkfkgu4fbunovozzpnck2uae

A reconfigurable framework for compositional schedulability and power analysis of hierarchical scheduling systems with frequency scaling

Abdeldjalil Boudjadar, Alexandre David, Jin Hyun Kim, Kim G. Larsen, Marius Mikučionis, Ulrik Nyman, Arne Skou
2015 Science of Computer Programming  
According to the CPU frequency scaling, each task has a set of different execution times. Thus, the energy consumption of the whole system varies from an execution to another.  ...  We consider both schedulability and energy consumption of individual components, while analyzing a single core setting with a voltage frequency scaling CPU.  ...  Energy Model To reflect the CPU frequency scaling on the task execution, we consider different execution times for each task.  ... 
doi:10.1016/j.scico.2015.10.003 fatcat:lynwm2ojwzdmbndgsus7j6lxvu

Energy-Efficient Reliability-Aware Scheduling Algorithm on Heterogeneous Systems

Xiaoyong Tang, Weizhen Tan
2016 Scientific Programming  
Thirdly, we establish a task execution reliability model and formulate this reliability and energy aware scheduling problem as a linear programming.  ...  Lastly, we propose a heuristic Reliability-Energy Aware Scheduling (REAS) algorithm to solve this problem, which can get good tradeoff among system performance, reliability, and energy consumption with  ...  In our previous work [8] , we propose a scheduling algorithm which considers the task's execution reliability.  ... 
doi:10.1155/2016/9823213 fatcat:nvmnabprtrdbhafbc4lxnbvfai
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