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Including Systematic Faults into Fault Tree Analysis [chapter]

Israel Barragan Santiago, Jean-Marc Faure, Yiannis Papadopoulos
2007 Fault Detection, Supervision and Safety of Technical Processes 2006  
This paper proposes an extension to the basic Fault Trees construction process which takes into account this category of faults and advocates the use of dynamic and temporal gates to model it.  ...  Fault Tree Analysis (FTA) is a technique widely used for fault forecasting of physical systems.  ...  Further development of the systematic fault Once the potential systematic faults have been identified, the conditions that confirm their presence are then described using an extended fault tree vocabulary  ... 
doi:10.1016/b978-008044485-7/50129-9 fatcat:k75r46pcszey7nepbcmyfhmiwu

INCLUDING SYSTEMATIC FAULTS INTO FAULT TREE ANALYSIS

Israel BARRAGAN SANTIAGO, Jean-Marc FAURE, Yiannis PAPADOPOULOS
2006 IFAC Proceedings Volumes  
This paper proposes an extension to the basic Fault Trees construction process which takes into account this category of faults and advocates the use of dynamic and temporal gates to model it.  ...  Fault Tree Analysis (FTA) is a technique widely used for fault forecasting of physical systems.  ...  Further development of the systematic fault Once the potential systematic faults have been identified, the conditions that confirm their presence are then described using an extended fault tree vocabulary  ... 
doi:10.3182/20060829-4-cn-2909.00127 fatcat:kleu2bsvj5fkji7wrbzud44kza

Obtaining temporal and timed properties of logic controllers from fault tree analysis [chapter]

Israel Barragan Santiago, Matthias Roth, Jean-Marc Faure
2006 Information Control Problems in Manufacturing 2006  
The method developed here extends the traditional FTA with event ordering and timed information by introducing specific gates which model logic and physical time constraints.  ...  The work presented in this paper proposes a method to elaborate the formal properties of a logic controller from a Fault Tree Analysis (FTA).  ...  The inclusion of controller faults in fault trees requires an extended FTA vocabulary, in which the notions of events ordering and physical time exist and can be used to describe relationships among input  ... 
doi:10.1016/b978-008044654-7/50174-6 fatcat:jbnor6avmfea5eisw6wpzfclrq

OBTAINING TEMPORAL AND TIMED PROPERTIES OF LOGIC CONTROLLERS FROM FAULT TREE ANALYSIS

Israel BARRAGAN SANTIAGO, Matthias ROTH, Jean-Marc FAURE
2006 IFAC Proceedings Volumes  
The method developed here extends the traditional FTA with event ordering and timed information by introducing specific gates which model logic and physical time constraints.  ...  The work presented in this paper proposes a method to elaborate the formal properties of a logic controller from a Fault Tree Analysis (FTA).  ...  The inclusion of controller faults in fault trees requires an extended FTA vocabulary, in which the notions of events ordering and physical time exist and can be used to describe relationships among input  ... 
doi:10.3182/20060517-3-fr-2903.00137 fatcat:dezpmv7e5zfj5avcp2ojat4g6q

PANDORA 2: THE TIME OF PRIORITY-OR GATES

Martin Walker, Yiannis Papadopoulos
2007 IFAC Proceedings Volumes  
In this paper, we extend the conceptual foundation of Pandora with a new Priority-OR (POR) gate and we introduce the concept of a Temporal Truth Table as a mechanism that can be used to prove equivalence  ...  Pandora is a recently proposed technique that extends classical Fault Tree Analysis to incorporate the effects of the temporal ordering of failure events.  ...  and derive timing requirements for real-time systems rather than to extend the logic of the fault tree.  ... 
doi:10.3182/20070613-3-fr-4909.00007 fatcat:b7tbmk2g5nbk7iip7nix6ei7m4

A Novel Methodology For Synthesis Of Fault Trees From Matlab-Simulink Model

F. Tajarrod, G. Latif-Shabgahi
2008 Zenodo  
Fault tree analysis is a well-known method for reliability and safety assessment of engineering systems.  ...  This paper presents a new methodology for the construction of static and dynamic fault trees from a system Simulink model.  ...  The Extended model is then used to generate the FAULT TREE diagram of the system. The tree is then analyzed by using the failure probability (P) or failure-rate probability ( ) of basic events.  ... 
doi:10.5281/zenodo.1079607 fatcat:yio2juirlbhpnhcqut6ry6ejqe

Timing Aspects of Fault Tree Analysis of Safety Critical Systems [chapter]

Janusz Górski, Andrzej Wardziński
1997 Safer Systems  
The proposed method assumes that a (conventional) Fault Tree is first formalised and then is subjected to various analyses which aim at discovering if, with the given time dependencies among events, the  ...  In the paper we present a new approach to the analysis of Fault Trees with a particular stress on the timing aspects.  ...  He would take a conventional Fault Tree as an input and then extend it with a formal definition and perform the timing analysis by invoking the corresponding algorithms.  ... 
doi:10.1007/978-1-4471-0975-4_14 fatcat:djk3rlin6ra2demdpnkzpeqv5a

Validating Safety Models with Fault Trees [chapter]

Glenn Bruns, Stuart Anderson
1993 SAFECOMP '93  
An important practical feature of the technique is that it allows models and fault trees to be compared even if some events in the fault tree are not found in the system model.  ...  To do this, the meaning of fault trees are formalised in temporal logic and a consistency relation between models and fault trees is defined.  ...  We will let +(in 1 , in 2 , out) stand for an or-gate with inputs in 1 and in 2 and output out. Similarly, •(in 1 , in 2 , out) stands for an and-gate.  ... 
doi:10.1007/978-1-4471-2061-2_3 dblp:conf/safecomp/BrunsA93 fatcat:h7hdgahex5hgfgvgujic5x4izu

A Novel Simulation Approach to Extended Dynamic Fault Trees Analysis for Highly-reliable Satellite OBDH Subsystem

Mingliang Wang, Zhencai Zhu, Zui Chen, Liang Chang
2017 DEStech Transactions on Engineering and Technology Research  
For satellite OBDH subsystem, we present an extended dynamic fault tree model (eDFT).  ...  On-board data handling (OBDH) subsystem is the critical subsystem of satellite which is supplied with hot/warm/cold spare backups, also uses triplicated bus and redundant memories for high reliability.  ...  DFT extends static fault tree (such as OR gate, AND gate, k/m gate, etc.) to six basic types of gates: priority AND gate (PAND); functional dependency gate (FDEP); sequence enforcing gate (SEQ); cold spare  ... 
doi:10.12783/dtetr/iceta2016/6966 fatcat:vsowgu45tneonchocc6yhqwerq

Non-coherent Modelling in Compositional Fault Tree Analysis

Septavera Sharvia, Yiannis Papadopoulos
2008 IFAC Proceedings Volumes  
and analysis of noncoherent fault trees.  ...  We then describe an extension to HiP-HOPS (Hierarchically Performed Hazard Origin and Propagation Studies), a recently proposed compositional safety analysis method, that enables model-based synthesis  ...  To achieve this, HiP-HOPS was extended with an algorithm for qualitative analysis of non-coherent fault trees. 1.  ... 
doi:10.3182/20080706-5-kr-1001.00696 fatcat:dq4m7pcx5bekxbbaiu4jmjzi7i

Integrating Existing Safety Analyses into SysML [chapter]

Kester Clegg, Mole Li, David Stamp, Alan Grigg, John McDermid
2019 Lecture Notes in Computer Science  
analysis by exporting model entities and relationships from the SysML fault trees.  ...  We demonstrate a lightweight profile that minimally captures the fault logic for a Rolls-Royce gas turbine engine controller and provides specific in-house extensions for both fault tree and engine dispatch  ...  An example of additional functionality is to enable them to create new branches of the fault tree by double clicking on a gate with no inputs.  ... 
doi:10.1007/978-3-030-32872-6_5 fatcat:hx2a2u22sbc5vaq7qcr55p3zvy

An overview of fault tree analysis and its application in model based dependability analysis

Sohag Kabir
2017 Expert systems with applications  
Firstly, this paper reviews the standard fault tree with its limitations. Secondly, different extensions of standard fault trees are reviewed.  ...  Thirdly, this paper reviews a number of prominent MBDA techniques where fault trees are used as a means for system dependability analysis and provides an insight into their working mechanism, applicability  ...  If the gate in an AND gate, then insert each of its input in a new column. b. If the gate is an OR gate, then insert each of its input in a new row. 4.  ... 
doi:10.1016/j.eswa.2017.01.058 fatcat:ovurt2fc3fes3ebws2oimkmabu

Qualitative temporal analysis: Towards a full implementation of the Fault Tree Handbook

Martin Walker, Yiannis Papadopoulos
2009 Control Engineering Practice  
In this paper, we propose extensions to the logical foundation of fault trees that enable use of these dynamic gates in an extended and more powerful FTA.  ...  Although the Handbook proposes two dynamic gates that could remedy this, a Priority-AND and an Exclusive-OR gate, these gates were never accurately defined.  ...  DFTs date back to the early 1990s, and their goal is to extend fault trees to be able to work with Markov chains so that fault tolerant computer systems can be better analysed; DFTs are also included in  ... 
doi:10.1016/j.conengprac.2008.10.003 fatcat:krzwlpn7pvafjosyt73q45vrda

The Extended Dynamic Fault Tree Model for Fault-tolerant OBDH Software of Microsatellite

2016 Revista de la Facultad de Ingeniería  
This paper presents the extended dynamic fault tree (eDFT) model for fault-tolerant Onboard Data Handling (OBDH) software used in microsatellite.  ...  Memory with triple-modular redundancy and communication bus with spare are frequently employed in OBDH subsytem design.  ...  DFT extends traditional fault tree (such as OR gate, AND gate, k/m gate, etc.) to six basic gates: priority AND gate (PAND); functional dependency gate (FDEP);sequence enforcing gate(SEQ);cold spare gate  ... 
doi:10.21311/002.31.5.23 fatcat:4r5b2bhvzvacnchybuk25leo2m

A SysML Profile for Fault Trees—Linking Safety Models to System Design [chapter]

Kester Clegg, Mole Li, David Stamp, Alan Grigg, John McDermid
2019 Lecture Notes in Computer Science  
Unlike traditional fault trees that can be difficult to validate against a system design, associating failure modes with system functions and hardware components means that consistency checks between the  ...  two models are possible, and changes to the SysML design are easier to identify against the corresponding fault tree model.  ...  This has one "level" in a branch of the fault tree defined as an AND gate, with failure modes describing the junction point above and below.  ... 
doi:10.1007/978-3-030-26601-1_6 fatcat:anz7tlo63bf2hizadv46tmhxyq
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