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Using partial reconfiguration for SoC design and implementation

Yana E. Krasteva, Jorge Portilla, Félix Tobajas Guerrero, Eduardo de la Torre, Teresa Riesgo, Eduardo de la Torre, Leandro Soares Indrusiak
<span title="2009-05-20">2009</span> <i title="SPIE"> VLSI Circuits and Systems IV </i> &nbsp;
The main goal of these applications is to test several architectures with different flexibility and, to search for the partial reconfiguration "killing application", that is, the application that better  ...  Among these ones, those which permit dynamic and partial reconfiguration, offer added benefits in flexibility, in-field device upgrade, improved design and manufacturing time, and even, in some cases,  ...  A lot of area is wasted due to partial reconfiguration. This has not permitted to fully exploit reconfigurable systems and to demonstrate the applications real value.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1117/12.821718">doi:10.1117/12.821718</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/rublmsvf4jhwrps3onfvv2rqxi">fatcat:rublmsvf4jhwrps3onfvv2rqxi</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20120413125355/http://oa.upm.es/5511/1/INVE_MEM_2009_64562.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/79/ad/79ad0879f1bb0d5249f8bdda8cd9be3897573dea.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1117/12.821718"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> Publisher / doi.org </button> </a>

Hardware-Software Monitoring Techniques for Dynamic Partial Reconfigurable Embedded Systems

Xiao-Wei Wang, Wei-Nan Chen, Cheng-Lian Peng, Hong-jun You
<span title="">2008</span> <i title="IEEE"> 2008 International Conference on Embedded Software and Systems Symposia </i> &nbsp;
Dynamic partial reconfigurable embedded system includes at least one reconfigurable device, which is emerging as the new paradigm for satisfying the simultaneous demand for application performance and  ...  flexibility.  ...  Monitoring is an effective way for debugging and testing complex systems such as distribute parallel and distributed system, dynamic partial reconfigurable embedded system.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/icess.symposia.2008.10">doi:10.1109/icess.symposia.2008.10</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/z5mgaogypvflfpnlz4rgohkt24">fatcat:z5mgaogypvflfpnlz4rgohkt24</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170812042640/http://es.sdu.edu.cn/project/doc/papers/Hardware-Software%20Monitoring%20Techniques%20for%20Dynamic%20Partial%20Reconfigurable%20Embedded%20Systems.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/a3/60/a36059169609525a2c67f82d70a5550e0469c735.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/icess.symposia.2008.10"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

PR-HMPSoC: A versatile partially reconfigurable heterogeneous Multiprocessor System-on-Chip for dynamic FPGA-based embedded systems

Tuan D. A. Nguyen, Akash Kumar
<span title="">2014</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/plojvu5mhreuxnue5ey7fivkbi" style="color: black;">2014 24th International Conference on Field Programmable Logic and Applications (FPL)</a> </i> &nbsp;
Those have yet to fully provide a versatile framework to exploit the flexibility of PR such as hardware/software task migration and bitstream relocation; more importantly, the on-chip debug features to  ...  However, with the insatiable demands of supporting an extensive range of applications beyond the limited resources of FPGA chip and shorter time-to-market, many research works on partially reconfigurable  ...  The bitstream relocation method will also be developed to increase the system flexibility and reduce the partial bitstream storage. VI.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/fpl.2014.6927492">doi:10.1109/fpl.2014.6927492</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/fpl/NguyenK14.html">dblp:conf/fpl/NguyenK14</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/yjmmo75nebhn3cices7grjd3ba">fatcat:yjmmo75nebhn3cices7grjd3ba</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170829015548/https://www.ece.nus.edu.sg/stfpage/eleak/pdf/fpl2014a.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/01/b7/01b74696fa3bf80a04545b7190ad1a3931b72798.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/fpl.2014.6927492"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures

Dirk Stroobandt, Ana Lucia Varbanescu, Catalin Bogdan Ciobanu, Muhammed Al Kadi, Andreas Brokalakis, George Charitopoulos, Tim Todman, Xinyu Niu, Dionisios Pnevmatikatos, Amit Kulkarni, Elias Vansteenkiste, Wayne Luk (+7 others)
<span title="">2016</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/lvvjhbqmhjfwnht2tzxtiddybe" style="color: black;">2016 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)</a> </i> &nbsp;
In the EXTRA project, we create a new and flexible exploration platform for developing reconfigurable architectures, design tools and HPC applications with run-time reconfiguration built-in as a core fundamental  ...  EXTRA covers the entire stack from architecture up to the application, focusing on the fundamental building blocks for run-time reconfigurable exascale HPC systems: new chip architectures with very low  ...  , thus bringing hardware debugging flexibility to the level of software debugging flexibility.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/recosoc.2016.7533896">doi:10.1109/recosoc.2016.7533896</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/recosoc/StroobandtVCKBC16.html">dblp:conf/recosoc/StroobandtVCKBC16</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/3hjjgwqrdzf5notzalewyjdybm">fatcat:3hjjgwqrdzf5notzalewyjdybm</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20180724025951/http://spiral.imperial.ac.uk/bitstream/10044/1/43205/2/recosoc16extra-spiral.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/0f/15/0f150e077149593da8bd3cfcdb68aeb875ef8a11.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/recosoc.2016.7533896"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Multi-purpose systems: A novel dataflow-based generation and mapping strategy

J.-F. Nezan, N. Siret, M. Wipliez, F. Palumbo, L. Raffo
<span title="">2012</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/kucxvipvevedfgtsl3pnvxorse" style="color: black;">2012 IEEE International Symposium on Circuits and Systems</a> </i> &nbsp;
This paper tackles both problems, leveraging on the combination of the DPN MoC with a coarse-grained reconfigurable approach to hardware design and on the exploitation of the DPN MoC for the synthesis  ...  The development of such systems presents mainly two problems: (1) the manual creation of the multi-purpose specialized hardware infrastructures is quite error-prone and may take a lot of time for debugging  ...  Angermeier et al. in [12] propose a datafloworiented approach to reconfigurable systems design specifically addressing Partial Reconfiguration on FPGAs.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/iscas.2012.6271969">doi:10.1109/iscas.2012.6271969</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/iscas/NezanSWPR12.html">dblp:conf/iscas/NezanSWPR12</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/3gpsr36il5civil46awadf64le">fatcat:3gpsr36il5civil46awadf64le</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20130701192748/http://hal-univ-rennes1.archives-ouvertes.fr/docs/00/76/38/12/PDF/2012_ISCAS_Palumbo.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/e9/40/e940a87cea4f69c53c001f136be9902ee561d98f.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/iscas.2012.6271969"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

RTL Simulation of High Performance Dynamic Reconfiguration: A Video Processing Case Study

Lingkan Gong, Oliver Diessel, Johny Paul, Walter Stechele
<span title="">2013</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/t3x4vqewrncrfgn2wu7cafsbsq" style="color: black;">2013 IEEE International Symposium on Parallel &amp; Distributed Processing, Workshops and Phd Forum</a> </i> &nbsp;
Dynamically Reconfigurable Systems (DRS) allow hardware logic to be partially reconfigured while the rest of the design continues to operate.  ...  However, the architectural flexibility of DRS also introduces challenges for verifying system functionality.  ...  Dynamically Reconfigurable Systems (DRS) extend the flexibility of FPGAs by allowing partial reconfiguration of hardware modules at run time.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/ipdpsw.2013.79">doi:10.1109/ipdpsw.2013.79</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/ipps/GongDPS13.html">dblp:conf/ipps/GongDPS13</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/kcyd5xnbijhghdhdw4kftgez5q">fatcat:kcyd5xnbijhghdhdw4kftgez5q</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20160331105221/http://www.cse.unsw.edu.au/~lingkang/raw11_auto.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/e5/3a/e53a0e05b7187251ee42857e36ac501ea00a32da.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/ipdpsw.2013.79"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

A Methodology for Wireless Sensor Network Prototyping with Sophisticated Debugging Support

Heiko Hinkelmann, Andreas Reinhardt, Manfred Glesner
<span title="">2008</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/vpx5dudvcrc7rbhkaxvb3bhjoi" style="color: black;">2008 The 19th IEEE/IFIP International Symposium on Rapid System Prototyping</a> </i> &nbsp;
for runtime debugging without interfering with the primary radio link.  ...  We achieve this goal by combining two fundamental concepts: the use of a reconfigurable sensor node prototype platform, and an auxiliary network structure for granting a reliable communication channel  ...  Host PC Software for Debugging In order to manage the monitoring and debugging of a WSN, a user-friendly software tool has been created in Java.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/rsp.2008.13">doi:10.1109/rsp.2008.13</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/rsp/HinkelmannRG08.html">dblp:conf/rsp/HinkelmannRG08</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/tfflbdhlvzgm7adrfxnvt6v7xi">fatcat:tfflbdhlvzgm7adrfxnvt6v7xi</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170829174244/http://www.areinhardt.de/wp-content/uploads/2012/09/Hinkelmann_RSP_2008.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/35/7e/357edfd60b77baf2a3e9abb684c246040ca3defc.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/rsp.2008.13"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Effective Reconfigurable Design: The FASTER Approach [chapter]

D. N. Pnevmatikatos, T. Becker, A. Brokalakis, G. N. Gaydadjiev, W. Luk, K. Papadimitriou, I. Papaefstathiou, D. Pau, Oliver Pell, C. Pilato, M. D. Santambrogio, D. Sciuto (+1 others)
<span title="">2014</span> <i title="Springer International Publishing"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/2w3awgokqne6te4nvlofavy5a4" style="color: black;">Lecture Notes in Computer Science</a> </i> &nbsp;
To exploit opportunities for flexible and adaptable run-time exploitation of fine grain reconfigurable resources (as implemented currently in dynamic, partial reconfiguration), better tool support is needed  ...  The FASTER project aims to provide a methodology and a tool-chain that will enable designers to efficiently implement a reconfigurable system on a platform combining software and reconfigurable resources  ...  We believe that in order to exploit the opportunities presented by flexible and adaptable exploitation of fine grain reconfigurable resources, better analysis and implementation tool-chains are needed.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/978-3-319-05960-0_35">doi:10.1007/978-3-319-05960-0_35</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/i5nrb6qbtnf5fbgtc42m5vrkdu">fatcat:i5nrb6qbtnf5fbgtc42m5vrkdu</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170705104033/http://users.isc.tuc.gr/%7Ekpapadimitriou/publications/2014arc-EffecRecDesFasterApproach.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/85/1a/851a924800b9ee4a3438c68efabcc8d816737af4.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/978-3-319-05960-0_35"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> springer.com </button> </a>

A Reconfigurable Prototyping Platform for Smart Sensor Networks

Heiko Hinkelmann, Andreas Reinhardt, Sameer Varyani, Manfred Glesner
<span title="">2008</span> <i title="IEEE"> 2008 4th Southern Conference on Programmable Logic </i> &nbsp;
In this paper, a new concept for a very flexible and modular prototype platform for rapid prototyping of wireless sensor networks is presented.  ...  The FPGA is utilized to attain 3 major goals for the prototype platform: to emulate arbitrary mote architectures even including smart motes with high system complexity, to realize flexible interfaces to  ...  Hardware functionality may be even altered on demand during run-time by using partial dynamic reconfiguration [14] .  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/spl.2008.4547743">doi:10.1109/spl.2008.4547743</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/bucpbmfnszfnxa5tj2thw3iso4">fatcat:bucpbmfnszfnxa5tj2thw3iso4</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170809065253/http://www.areinhardt.de/wp-content/uploads/2012/09/Hinkelmann_SPL_2008.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/57/b4/57b4c380eb6bc2038374e870d2ed79d564fffd6f.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/spl.2008.4547743"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Opportunities and challenges for dynamic FPGA reconfiguration in electronic measurement and instrumentation

Oliver Diessel
<span title="">2013</span> <i title="IEEE"> 2013 IEEE 11th International Conference on Electronic Measurement &amp; Instruments </i> &nbsp;
Dynamic reconfiguration, the ability to partially modify a circuit implementation at run-time, has the potential to extend the flexibility, utilization, and resilience of FPGA-based systems even further  ...  Reconfigurable systems based on Field-Programmable Gate Arrays (FPGAs) can offer performance and power advantages over processor-based systems as well as cost and flexibility advantages over custom integrated  ...  Exploiting DR thereby enhances the flexibility and capability of the instrument. VLSI testing can involve use of a large number of high-speed custom controllers.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/icemi.2013.6743028">doi:10.1109/icemi.2013.6743028</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/mrl5dbgoevfcjnwunc42tue5mu">fatcat:mrl5dbgoevfcjnwunc42tue5mu</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170309144935/http://www.cse.unsw.edu.au/~odiessel/papers/icemi13diessel.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/78/ad/78ad4de6d293d170e4c07d3fa75a23626eb0e3f0.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/icemi.2013.6743028"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Prototyping environment for dynamically reconfigurable logic [chapter]

Patrick Lysaght, Hugh Dick, Gordon McGregor, David McConnell, Jonathan Stockwood
<span title="">1995</span> <i title="Springer Berlin Heidelberg"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/2w3awgokqne6te4nvlofavy5a4" style="color: black;">Lecture Notes in Computer Science</a> </i> &nbsp;
The system provides for the rapid prototyping of designs which exploit the intrinsic dynamic reconfigurability of certain types of FPGAs.  ...  A prototyping environment specifically designed for research into dynamically reconfigurable logic is presented.  ...  Eric Pirie for suggesting the term "hardware device driver" to describe the operation of the universal interface.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/3-540-60294-1_135">doi:10.1007/3-540-60294-1_135</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/vg6dvwev2nd7vek2qzku27ntxq">fatcat:vg6dvwev2nd7vek2qzku27ntxq</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20030629041656/http://oak.eee.strath.ac.uk:80/papers/pl_fpl95.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/fa/f1/faf1d9adc49c419377e2ff2ef9fc16b3139051ac.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/3-540-60294-1_135"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> springer.com </button> </a>

FPGA Technology and Dynamic Reconfiguration [chapter]

<span title="2009-02-17">2009</span> <i title="CRC Press"> Reconfigurable System Design and Verification </i> &nbsp;
the time sharing capability offered by partial dynamic reconfiguration for an increased flexibility of the system.  ...  In this sense the Rebit framework fills the gaps in the Xilinx software for developing Partial Dynamic Reconfigurable systems, by enabling a low level debugging facility that replaces many manual processes  ...  A second opportunity for future works is given by the exploitation of the data model created in this framework for the constraint checking of new partial dynamic reconfiguration flows, and in general to  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1201/9781420062670.ch2">doi:10.1201/9781420062670.ch2</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/gx7k4xvydvhkboa7rodcburqia">fatcat:gx7k4xvydvhkboa7rodcburqia</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170922011444/http://www.dresd.org/files/UIC_Candiloro_Thesis.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/d0/79/d079aee6fb01deaf594b1c5f97cbe9663f4e47e6.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1201/9781420062670.ch2"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> Publisher / doi.org </button> </a>

ZipStream: Improving dependability in dynamic partial reconfiguration

Stefano Di Carlo, Giulio Gambardella, Trong Huynh Bao, Paolo Prinetto, Daniele Rolfo, Pascal Trotta
<span title="">2013</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/ovfzvdk7fve7fgvpzz5mcymbn4" style="color: black;">2013 8th IEEE Design and Test Symposium</a> </i> &nbsp;
Since modern Systems-on-Programmable-Chips (SoPCs) make extensive use of this feature, many reconfigurable area are placed in the device, with several configurations for each area.  ...  Dynamic Partial Reconfiguration allows to dynamically change the behaviour of a portion of the FPGAs by downloading new information in the configuration memory of the device.  ...  ACKNOWLEDGMENT The authors would like to express their sincere thanks to the whole design team of Ansaldo STS for their helpful hints and guidelines.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/idt.2013.6727128">doi:10.1109/idt.2013.6727128</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/idt/CarloGBPRT13.html">dblp:conf/idt/CarloGBPRT13</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/pyxzveljgrc6bi3cv2f2a2axw4">fatcat:pyxzveljgrc6bi3cv2f2a2axw4</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20180724044126/https://iris.polito.it/retrieve/handle/11583/2504958/58915/2012-IDT-ZIPSTREAM-AuthorVersion.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/81/5e/815e09e5ffe5518d527b067d3ba8d76ca27bf231.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/idt.2013.6727128"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Partial Dynamic Reconfiguration in a Multi-FPGA Clustered Architecture Based on Linux

Vincenzo Rana, Marco Santambrogio, Donatella Sciuto, Boris Kettelhoit, Markus Koester, Mario Porrmann, Ulrich Ruckert
<span title="">2007</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/t3x4vqewrncrfgn2wu7cafsbsq" style="color: black;">2007 IEEE International Parallel and Distributed Processing Symposium</a> </i> &nbsp;
All FPGAs can be partially and dynamically reconfigured to integrate user-defined IP-Cores into the system at run-time.  ...  Dynamically reconfigurable hardware allows for implementing systems that can be adapted at run-time according to the needs of the user.  ...  Support for dynamic reconfiguration in operating systems The need for a run-time infrastructure in operating systems to manage and exploit reconfigurable logic is discussed in [9] .  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/ipdps.2007.370363">doi:10.1109/ipdps.2007.370363</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/ipps/RanaSSKKPR07.html">dblp:conf/ipps/RanaSSKKPR07</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/canu4oipnrdshml6yjwtle5kgu">fatcat:canu4oipnrdshml6yjwtle5kgu</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170706114002/http://www.cecs.uci.edu/%7Epapers/ipdps07/pdfs/RAW-46-paper-2.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/6b/aa/6baa61dcb54bcdf52539423683c97d92d3069d9f.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/ipdps.2007.370363"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Design of a flexible reconfigurable mobile robot localization system using FPGA technology

Agnès Ghorbel, Nader Ben Amor, Mohamed Jallouli
<span title="2020-06-07">2020</span> <i title="Springer Science and Business Media LLC"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/wxtpc7l3qzds3ojx4uwv4dvlr4" style="color: black;">SN Applied Sciences</a> </i> &nbsp;
With their high flexibility, reconfigurable architectures are a suitable choice to design such dynamic system.  ...  In this paper, we presented a generic and a flexible platform based on FPGA technology, for studying and prototyping complete unified robot navigation system.  ...  The partial reconfiguration process demands separate Netlist files for the static (top level) design and for reconfigurable modules.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/s42452-020-2960-4">doi:10.1007/s42452-020-2960-4</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/m3j3ntvwcjcrlaqxw4xczmi57q">fatcat:m3j3ntvwcjcrlaqxw4xczmi57q</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20201108164626/https://link.springer.com/content/pdf/10.1007/s42452-020-2960-4.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/7c/dd/7cdd4258c60404faaa7195f96408687ef2a47aa8.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/s42452-020-2960-4"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="unlock alternate icon" style="background-color: #fb971f;"></i> springer.com </button> </a>
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