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Exploiting storage redundancy to speed up randomized shared memory simulations

Friedhelm Meyer auf der Heide, Christian Scheideler, Volker Stemann
1996 Theoretical Computer Science  
Efficient implementations are presented, implying _ a simulation of an n-processor PRAM on an n-processor optical crossbar DMM with delay O(log log n), _ a simulation as above on an arbitrary-DMM with  ...  Assume that a set U of memory locations is distributed among n memory modules, using some number a of hash functions /II,. , h" randomly and independently drawn from a highperformance universal class of  ...  Dictionaries and shared memory simulations Shared memory simulations on a DMM based on hashing begin with a preprocessing phase.  ... 
doi:10.1016/0304-3975(96)00032-1 fatcat:5dujwgv2g5hoflhie4dajd2j4a

Exploiting storage redundancy to speed up randomized shared memory simulations [chapter]

Friedhelm Meyer, Christian Scheideier, Volker Stemann
1995 Lecture Notes in Computer Science  
E cient implementations are presented, implying a simulation of an n-processor PRAM on an n-processor optical crossbar DMM with delay O(log log n), a simulation as above on an arbitrary-DMM with delay  ...  Assume that a set U of memory locations is distributed among n memory modules, using some number a of hash functions h1 : : : h a, randomly and independently drawn from a high performance universal class  ...  The processors work synchronously and have random access to the shared memory cells.  ... 
doi:10.1007/3-540-59042-0_79 fatcat:5sqooymf2rd7nak4ymzbk2hzau

Run-Time Data-Dependent Defect Tolerance for Hybrid CMOS/Nanodevice Digital Memories

Fei Sun, Lu Feng, Tong Zhang
2008 IEEE transactions on nanotechnology  
The basic idea is to reduce the memory redundancy overhead by exploiting the run-time matching between the data to be stored and the memory defects.  ...  Computer simulation results demonstrate that the proposed method can achieve much higher storage capacity compared with conventional data-independent defect tolerance at small memory operation overhead  ...  The basic idea is to exploit the run-time data-defect matching to reduce the required ECC coding redundancy and hence improve the effective memory storage capacity.  ... 
doi:10.1109/tnano.2007.914972 fatcat:lb5zmk3guncorowvawztqdc77u

QMD

Sean M. Snyder, Shimin Chen, Panos K. Chrysanthis, Alexandros Labrinidis
2011 Proceedings of the Seventh International Workshop on Data Management on New Hardware - DaMoN '11  
In this work, we propose QMD (Quasi Mirrored Disks) that exploit flash as a write buffer to complement RAID systems consisting of hard disks.  ...  QMD exhibits significant energy savings of up 31%, as per our evaluation study using real workloads.  ...  ACKNOWLEDGMENTS The QMD simulator was initially developed by Katlyn Daniluk as part of her research experience for undergraduates.  ... 
doi:10.1145/1995441.1995447 dblp:conf/damon/SnyderCCL11 fatcat:bxrtiohkyfajzhpzcjcv67c3y4

Client-side Flash Caching for Cloud Systems

Dulcardo Arteaga, Ming Zhao
2014 Proceedings of International Conference on Systems and Storage - SYSTOR 2014  
Client-side flash-based caching has the potential to improve the performance of cloud VM storage by employing flash storage available on the client-side of the storage system to exploit the locality inherent  ...  As the size of cloud systems and the number of hosted VMs rapidly grow, the scalability of shared VM storage systems becomes a serious issue.  ...  speed up its IOs.  ... 
doi:10.1145/2611354.2611372 dblp:conf/systor/ArteagaZ14 fatcat:43i3xpwdbnfxhnlez2d4kjcr2m

Last-level cache deduplication

Yingying Tian, Samira M. Khan, Daniel A. Jiménez, Gabriel H. Loh
2014 Proceedings of the 28th ACM international conference on Supercomputing - ICS '14  
Caches are essential to the performance of modern microprocessors. Much recent work on last-level caches has focused on exploiting reference locality to improve e ciency.  ...  Rather than exploit specific value redundancy with compression, as in previous work, our scheme detects duplicate data blocks and stores only one copy of the data in a way that can be accessed through  ...  In future work, we will extend cache deduplication to core caches and exploit redundant information-elimination techniques in other storage units.  ... 
doi:10.1145/2597652.2597655 dblp:conf/ics/TianKJL14 fatcat:csm2wuew6bdz7lmry3x6yynfvu

D12.4: Performance Optimized Lustre

Ernest Artiaga, Alberto Miranda
2012 Zenodo  
Data handling deals with the storage of file contents and management data; this includes, in particular, techniques for automatic (self-tuned) placement of data on a system with many heterogeneous devices  ...  This clearly shows that the problem needs to be addressed. After our mechanism has been added to the [...]  ...  (with speed-up factors up to 10, as shown in Figure 11 .  ... 
doi:10.5281/zenodo.6572353 fatcat:nkqucavqavapzabifinzn6ucxq

Exploiting Heat-Accelerated Flash Memory Wear-Out Recovery to Enable Self-Healing SSDs

Qi Wu, Guiqiang Dong, Tong Zhang
2011 USENIX Workshop on Hot Topics in Storage and File Systems  
The key is to make each NAND flash memory chip self-healable by stacking an extra heater die, and to employ system-level redundancy to ensure SSD data storage integrity when one memory chip is being self-heated  ...  This paper proposes a self-healing solid-state drive (SSD) design strategy that exploits heat-accelerated recovery of NAND flash memory cell wear-out to improve SSD lifetime.  ...  Since most SSDs contain multiple NAND flash memory chips and one dedicated controller, we can add system-level redundancy to ensure data storage integrity, i.e., the SSD contains at least one backup (or  ... 
dblp:conf/hotstorage/WuD011 fatcat:pivamnglkjcunetsm4mm27fus4

A Loop-Based Methodology for Reducing Computational Redundancy in Workload Sets [article]

Elie M. Shaccour, Mohammad M. Mansour
2017 arXiv   pre-print
To reduce simulation time, several techniques in the literature have exploited the internal program repetitiveness to extract and execute only representative code segments.  ...  Existing so- lutions are based on reducing cross-program computational redundancy or on eliminating internal-program redundancy to decrease execution time.  ...  Memory is the other crucial part to characterize. The virtual memory system (VMS) starts with cache and goes up to the disk storage.  ... 
arXiv:1801.00094v1 fatcat:togbmdrjlfcxdizmxqt6hycqdy

CARAM: A Content-Aware Hybrid PCM/DRAM Main Memory System Framework [article]

Yinjin Fu
2020 arXiv   pre-print
In this paper, we introduce a novel Content Aware hybrid PCM/DRAM main memory system framework - CARAM, which exploits deduplication to improve line sharing with high memory efficiency.  ...  A naturally inspired design is the hybrid memory architecture that fuses DRAM and PCM, so as to exploit the positive aspects of both types of memory.  ...  We would like to thank Prof. Patrick P.C. Lee and Dr. Yang Wu for their help on the initial design of the system.  ... 
arXiv:2007.13661v1 fatcat:pkwbsjdt4nfztaoaatofocrb6a

Performance evaluation of a peer-to-peer backup system using buffering at the edge

Anne-Marie Kermarrec, Erwan Le Merrer, Nicolas Le Scouarnec, Romaric Ludinard, Patrick Maillé, Gilles Straub, Alexandre Van Kempen
2014 Computer Communications  
The availability of end devices of peer-to-peer storage and backup systems has been shown to be critical for usability and for system reliability in practice.  ...  Results show that the time required to backup data in the network is substantially improved, as it drops from days to a few hours.  ...  of exploitable resources [1, 2] .  ... 
doi:10.1016/j.comcom.2014.06.002 fatcat:l5zxp4lefjaz3ai24d2a7ipu24

RIMAC

Xiaoyu Yao, Jun Wang
2006 Proceedings of the 2006 EuroSys conference on - EuroSys '06  
We evaluated RI-MAC by augmenting a validated storage system simulator, disksim.  ...  by up to 30%.  ...  We also thank Hewlett-Packard Labs Storage Systems Department for providing storage traces used in this paper.  ... 
doi:10.1145/1217935.1217959 dblp:conf/eurosys/YaoW06 fatcat:rkox5rnd4vgkxksmoqrtzvfa7a

RIMAC

Xiaoyu Yao, Jun Wang
2006 ACM SIGOPS Operating Systems Review  
We evaluated RI-MAC by augmenting a validated storage system simulator, disksim.  ...  At both cache and disk levels, RIMAC dynamically transforms accesses toward standby disks by exploiting parity redundancy in parity-based redundant disk arrays.  ...  We also thank Hewlett-Packard Labs Storage Systems Department for providing storage traces used in this paper.  ... 
doi:10.1145/1218063.1217959 fatcat:kcc4gxw2pzezrlgo6savaort7u

On the exploitation of the inherent error resilience of wireless systems under unreliable silicon

Georgios Karakonstantis, Christoph Roth, Christian Benkeser, Andreas Burg
2012 Proceedings of the 49th Annual Design Automation Conference on - DAC '12  
In this paper, we investigate the impact of circuit misbehavior due to parametric variations and voltage scaling on the performance of wireless communication systems.  ...  We further show how selective application of more robust circuit design techniques is sufficient to deal with high defect rates at low overhead and improve energy efficiency with negligible system performance  ...  Having set the above parameters in our simulation framework we use the approach discussed in Section 4 for injecting errors at random locations of the LLR storage (assuming a medium sized 6T based memory  ... 
doi:10.1145/2228360.2228451 dblp:conf/dac/KarakonstantisRBB12 fatcat:p7vy7nxwrngvbi6235ldnsoe4m

Page 4567 of Mathematical Reviews Vol. , Issue 98G [page]

1998 Mathematical Reviews  
storage redundancy to speed up randomized shared memory simulations.  ...  Efficient implementations are presented, implying a simulation of an n-processor PRAM on an n-processor optical crossbar DMM with delay O(loglogn), a simulation as above on an arbitrary-DMM with delay  ... 
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