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WebFrame: a multi-phase reconfigurable middleware platform
<span title="">2004</span>
<i title="IEEE">
<a target="_blank" rel="noopener" href="https://fatcat.wiki/container/zlnwsi4sefbkvlcgv2zcupjqum" style="color: black;">37th Annual Hawaii International Conference on System Sciences, 2004. Proceedings of the</a>
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In this paper, a middleware architecture (WebFrame) that supports multi-phase adaptation using computational reflection, microkernel, and component techniques is proposed for web application servers. ...
Unfortunately, most of the mainstream web application servers adopt a monolithic architecture and "black box" philosophy to their design, and fail to properly address such requirements. ...
The hardware consists of a dedicated application server with 1 Intel CPU 1.70 GHz and 780 MB of RAM and one client with 1 Intel CPU 1.70 GHz and 512 MB of RAM, interconnected in a 100Mbit LAN. ...
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Operating System Structures for Multiprocessor Systems on Programmable Chip
<span title="">2010</span>
<i title="IEEE">
<a target="_blank" rel="noopener" href="https://fatcat.wiki/container/ek7djgoan5ehpihkol2k4a7rm4" style="color: black;">2010 International Conference on Reconfigurable Computing and FPGAs</a>
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We also show through these results the potential scalability of a hardware kernel based microkernel with new lightweight invocation mechanisms. ...
We present experimental results as well as a new queuing model to show how both monolithic and microkernels that rely historical interrupt mechanisms cannot support scalability beyond small numbers of ...
Figure 5 (a) shows experimentally measured latencies due to the invocation mechanisms for the monolithic kernel-RPC and the hthreads microkernel. ...
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Mini-NOVA: A Lightweight ARM-based Virtualization Microkernel Supporting Dynamic Partial Reconfiguration
<span title="">2015</span>
<i title="IEEE">
<a target="_blank" rel="noopener" href="https://fatcat.wiki/container/t3x4vqewrncrfgn2wu7cafsbsq" style="color: black;">2015 IEEE International Parallel and Distributed Processing Symposium Workshop</a>
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In this paper, we propose a low-complexity design of system virtualization running on the Zynq platform. Virtualization of software and hardware resources are managed by a custom microkernel. ...
In this context, adding a run-time reconfigurable FPGA device to the ARM processor into a single chip makes it possible to combine high performance and flexibility. ...
VERIFICATION & EVALUATION In this section, we present the methodology and the experimental results of the Mini-NOVA microkernel. ...
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Reconfigurable Microkernel-based RTOS: Mechanisms and Methods for Run-Time Reconfiguration
<span title="">2006</span>
<i title="IEEE">
<a target="_blank" rel="noopener" href="https://fatcat.wiki/container/ek7djgoan5ehpihkol2k4a7rm4" style="color: black;">2006 IEEE International Conference on Reconfigurable Computing and FPGA's (ReConFig 2006)</a>
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In this paper, we present our approach towards a reconfigurable RTOS that is able to distribute itself over a hybrid architecture (comprising FPGA and CPU). ...
Moreover, a single architecture must be able to support different applications with dynamical requirements (changing environments). ...
Figure 3 . 3 Proposed microkernel based architecture. ...
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Configuring a Context-Aware Middleware for Wireless Sensor Networks
<span title="2012-06-25">2012</span>
<i title="MDPI AG">
<a target="_blank" rel="noopener" href="https://fatcat.wiki/container/taedaf6aozg7vitz5dpgkojane" style="color: black;">Sensors</a>
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In the Future Internet, applications based on Wireless Sensor Networks will have to support reconfiguration with minimum human intervention, depending on dynamic context changes in their environment. ...
The contexts for these applications will be specified using ContextUML, and by means of the defined mapping between ContextUML and FamiWare a new augmented version of the FamiWare family with the incorporation ...
The set of actions corresponds with the tasks of a reconfiguration plan used by FamiWare to reconfigure the system [29] . ...
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<a target="_blank" rel="external noopener" href="https://www.ncbi.nlm.nih.gov/pubmed/23012505">pmid:23012505</a>
<a target="_blank" rel="external noopener" href="https://pubmed.ncbi.nlm.nih.gov/PMC3444063/">pmcid:PMC3444063</a>
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The Study and Evaluation of ARM-Based Mobile Virtualization
<span title="">2015</span>
<i title="SAGE Publications">
<a target="_blank" rel="noopener" href="https://fatcat.wiki/container/snvb3djywzbhvjtue42hxtjery" style="color: black;">International Journal of Distributed Sensor Networks</a>
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full virtualization, and microkernel. ...
At last, we carry out a series of performance comparisons among these solutions and make some suggestions for further research. ...
It shares no code with the early commercially deployed version of the L4 microkernel (but shares code modules with the presently shipping OKL4 microkernel). ...
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Efficient Embedded Software Migration towards Clusterized Distributed-Memory Architectures
<span title="2016-08-01">2016</span>
<i title="Institute of Electrical and Electronics Engineers (IEEE)">
<a target="_blank" rel="noopener" href="https://fatcat.wiki/container/5jlmyrayyrdazh5awdlsoec77q" style="color: black;">IEEE transactions on computers</a>
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However with the growing number of cores in modern manycore embedded architectures, they present a bottleneck related to their centralized memory accesses. ...
This paper proposes a solution tailored for an efficient execution of applications defined with shared-memory programming models onto on-chip distributed-memory multicore architectures. ...
EXPERIMENTAL RESULTS We evaluate the performance and energy consumption gains of the DSM architecture design proposed in previous sections in comparison with a CSM design. ...
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Creating HW/SW co-designed MPSoPC's from high level programming models
<span title="">2011</span>
<i title="IEEE">
<a target="_blank" rel="noopener" href="https://fatcat.wiki/container/hfatt7tua5aatozu2id5rdeuti" style="color: black;">2011 International Conference on High Performance Computing & Simulation</a>
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We show how OpenCL API's are easily translated to hthreads, a hardware-based microkernel operating system to provide pthreads compliant run time services within the MPSoPC architecture. ...
In this paper we outline a new approach that allows users to drive the generation of a complete hardware/software co-designed multiprocessor system on programmable chip from an unaltered standard high ...
Hthreads: A Hardware Microkernel This work builds on our prior hthreads hardware microkernel infrastructure. ...
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Composable and Predictable Dynamic Loading for Time-Critical Partitioned Systems
<span title="">2014</span>
<i title="IEEE">
<a target="_blank" rel="noopener" href="https://fatcat.wiki/container/6nxn3oxzcveorfagbcbilem2ay" style="color: black;">2014 17th Euromicro Conference on Digital System Design</a>
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However dynamic loading can be useful or even necessary for scenarios such as on-board software updates, dynamic reconfiguration or re-loading applications in case of a fault. ...
In this paper we propose a software architecture to dynamically create and manage partitions and a method for composable dynamic loading which ensures that loading applications do not affect the running ...
A. Experimental Setup The hardware platform instance used in our experimental setup is shown in Figure 1 . We implemented the hardware platform instance on a Xilinx ML605 FPGA board. ...
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Specifying and Verifying the SYNERGY Reconfiguration Protocol with LOTOS NT and CADP
[chapter]
<span title="">2011</span>
<i title="Springer Berlin Heidelberg">
<a target="_blank" rel="noopener" href="https://fatcat.wiki/container/2w3awgokqne6te4nvlofavy5a4" style="color: black;">Lecture Notes in Computer Science</a>
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As an illustration of this trend, this paper reports on our experience with the co-design and specification of the reconfiguration protocol of a component-based platform, intended as the foundation for ...
Dynamic software systems that provide the ability to reconfigure themselves seem to be reaching a complexity that suggests the use of formal methods in the design process, helping system designers master ...
The author would like to thank Frédéric Lang and the anonymous reviewers for their comments on a former version of this paper. ...
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Constraint-based self-adaptation of wireless sensor networks
<span title="">2012</span>
<i title="ACM Press">
Proceedings of the 2nd International Workshop on Adaptive Services for the Future Internet and 6th International Workshop on Web APIs and Service Mashups on - WAS4FI-Mashups '12
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In particular, the reconfiguration of the WSN requires a trade-off between critical dimensions for this kind of networks and devices, such as resource consumption or reconfiguration cost. ...
Therefore, self-adaptations for WSNs have special requirements comparing with traditional information systems. ...
The internal architecture of FamiWare is composed by a microkernel and several provided services. The microkernel is responsible for the composition of the application and the services. ...
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Armada Middleware and Communication Services
[chapter]
<span title="">1999</span>
<i title="Springer US">
Operating Systems and Services
</i>
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This philosophy advocates the use of a real-time microkernel equipped with basic real-time support such as priority-based scheduling and real-time communication, in addition to a reconfigurable set of ...
API APPLICATIONS MIDDLEWARE SERVICES TOOLS EVALUATION CHANNELS REAL-TIME Microkernel Figure 1. Overview of ARMADA Environment. computing, and radar data processing. ...
Section 2 describes the general approach for integrating ARMADA services into a microkernel framework. It also presents the experimental testbed and implementation environment of this project. ...
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FFMK: A Fast and Fault-Tolerant Microkernel-Based System for Exascale Computing
[chapter]
<span title="">2020</span>
<i title="Springer International Publishing">
<a target="_blank" rel="noopener" href="https://fatcat.wiki/container/4rhte7roibctnbr7jz7mi4vyw4" style="color: black;">Lecture Notes in Computational Science and Engineering</a>
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The FFMK OS platform is built upon a multi-kernel architecture, which combines the L4Re microkernel and a virtualized Linux kernel into a noise-free, yet feature-rich execution environment. ...
We further achieved promising results with regard to oversubscribing of cores, which can improve throughput for some applications [62] . ...
Our UCXbased library can be used with any MPI implementation, and provides a foundation for further experimental results and optimizations. ...
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The HACMS program: using formal methods to eliminate exploitable bugs
<span title="2017-09-04">2017</span>
<i title="The Royal Society">
<a target="_blank" rel="noopener" href="https://fatcat.wiki/container/ercgg4vn2fenngurcnadfzdfri" style="color: black;">Philosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences</a>
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One contribution of 8 to a discussion meeting issue 'Verified trustworthy software systems' . ...
or reconfigured hardware. ...
This structure created a workflow in which researchers developed tools and techniques and demonstrated them on the experimental platforms. ...
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A Study of Security Isolation Techniques
<span title="2016-10-12">2016</span>
<i title="Association for Computing Machinery (ACM)">
<a target="_blank" rel="noopener" href="https://fatcat.wiki/container/eiea26iqqjcatatlgxdpzt637y" style="color: black;">ACM Computing Surveys</a>
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We apply our classification to a set of representative papers that cover a breadth of security isolation techniques and discuss trade-offs among different design choices and limitations of existing approaches ...
Security isolation is a foundation of computing systems that enables resilience to different forms of attacks. ...
However, a configuration file is not a prerequisite for reconfigurability. It is useful to describe reconfigurability with respect to how the configuration change occurs: automatic or manual. ...
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