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Exact and heuristic algorithms for the minimization of incompletely specified state machines

June-Kyung Rho, G.D. Hachtel, F. Somenzi, R.M. Jacoby
1994 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
In this paper we present two exact algorithms for state minimization of FSM's.  ...  We also present heuristic algorithms, that can handle large, machine-generated, FSM's. The possibly many different reduced machines with the same number of states have different implementation costs.  ...  EXACT STATE MINIMIZATION We first discuss the methods for solving the problem of finding a machine with the smallest number of states which covers the specified machine.  ... 
doi:10.1109/43.259940 fatcat:eqzbdwxilvhpjdo6dtmrpqo33u

Exact and heuristic algorithms for the minimization of incompletely specified state machines

G.D. Hachtel, J.-K. Rho, F. Somenzi, R. Jacoby
Proceedings of the European Conference on Design Automation.  
In this paper we present two exact algorithms for state minimization of FSM's.  ...  We also present heuristic algorithms, that can handle large, machine-generated, FSM's. The possibly many different reduced machines with the same number of states have different implementation costs.  ...  EXACT STATE MINIMIZATION We first discuss the methods for solving the problem of finding a machine with the smallest number of states which covers the specified machine.  ... 
doi:10.1109/edac.1991.206387 fatcat:uzzw3mprxba3ljon4o2366f3ia

An implicit formulation for exact BDD minimization of incompletely specified functions [chapter]

Arlindo L. Oliveira, Luca P. Carloni, Tiziano Villa, Alberto Sangiovanni-Vincentelli
1997 VLSI: Integrated Systems on Silicon  
Specifically, given an incompletely specified function g and a fixed ordering of the variables, we propose an exact algorithm for selecting f such that f is a cover for g and the binary decision diagram  ...  specified finite state machines.  ...  using exact algorithms for the reduction of incompletely specified finite state machines (ISFSM) (Kam, Villa, Brayton & Vincentelli 1994 ).  ... 
doi:10.1007/978-0-387-35311-1_26 fatcat:q3h3jn5fvfes7jheuq5m3uia6y

A fast state reduction algorithm for incompletely specified finite state machine

Hiroyuki Higuchi, Yusuke Matsunaga
1996 Proceedings of the 33rd annual conference on Design automation conference - DAC '96  
This paper proposes a state reduction algorithm for incompletely specified FSMs. The algorithm is based on iterative improvements.  ...  Experimental results are given to demonstrate that the algorithm described here is faster and obtains better solutions than conventional methods.  ...  Introduction Reducing the number of states in incompletely specified finite state machines(ISFSMs) is an important step in FSM synthesis.  ... 
doi:10.1145/240518.240606 dblp:conf/dac/HiguchiM96 fatcat:hpgdlyulargalfwylxkzkgipue

Heuristic minimization of BDDs using don't cares

Thomas R. Shiple, Ramin Hojati, Alberto L. Sangiovanni-Vincentelli, Robert K. Brayton
1994 Proceedings of the 31st annual conference on Design automation conference - DAC '94  
We present heuristic algorithms for finding a minimum BDD size cover of an incompletely specified function, assuming the variable ordering is fixed.  ...  In some algorithms based on BDDs, incompletely specified functions arise for which any cover of the function will suffice.  ...  Acknowledgments We wish to thank Adnan Aziz, Sovarong Leang, Jean Christophe Madre, and Rajeev Murgai for their helpful comments. This work was supported by SRC grant 94-DC-008.  ... 
doi:10.1145/196244.196360 dblp:conf/dac/ShipleHSB94 fatcat:h4nije5y75cyjdcxm7jqlzpuum

Experiments on Minimization Method of Incompletely Specified Finite State Machines for Low Power Design [chapter]

Adam Klimowicz, Valery Solov'ev
2015 Lecture Notes in Computer Science  
This paper presents a heuristic method for minimization of incompletely specified finite state machine with unspecified values of output variables. The proposed method is based on two states merging.  ...  In addition to reduction of the finite state machine (FSM) states, the method also allows reducing the number of FSM transitions and FSM input variables.  ...  In [3] , a program called STAMINA that runs in exact and heuristic modes and uses explicit enumeration for the solution of state minimization problem is presented.  ... 
doi:10.1007/978-3-319-24369-6_31 fatcat:xcgxv2brnzhm7n7ukfnnrtshmi

Efficient state reduction methods for PLA-based sequential circuits

M.J. Avedillo, J.M. Quintana, J.L. Huertas
1992 IEE Proceedings E (Computers and Digital Techniques)  
H u e r t a s /combinational /PO logic -Abstract: Experiences with heuristics for the state reduction of finite-state machines are presented and two new heuristic algorithms described in detail.  ...  Results on machines from the literature and from the MCNC benchmark set are shown. The area of the PLA implemention of the combinational component and the design time are used as figures of merit.  ...  Finally, if the FSM is incompletely specified and the minimal cover is not the complete set of maximal compatibles, this minimal cover is expanded to obtain an optimal closed cover.  ... 
doi:10.1049/ip-e.1992.0070 fatcat:t5tma7ax55bphnavztag2arwia

On the complexity of minimizing the OBDD size for incompletely specified functions

M. Sauerhoff, I. Wegener
1996 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
The problem to construct an OBDD cover of minimal size for an incompletely speci ed Boolean function arises in several applications in the CAD domain, e. g. the veri cation of sequential machines and the  ...  construction of OBDDs for incompletely speci ed circuits.  ...  In order to construct the set of reachable states of a nite state machine Coudert, Berthet and Madre 5] have noted that one may search for new states from each set of states between the set of states  ... 
doi:10.1109/43.543775 fatcat:cbymapfhifc7npgndtzpseyqza

Symbolic reachability analysis of large finite state machines using don't cares

Youpyo Hong, Peter A. Beerel
1999 Proceedings of the conference on Design, automation and test in Europe - DATE '99  
Reachability analysis of finite state machines is essential to many computer-aided design applications.  ...  Second, we propose new techniques to use the final approximation to enhance the capability and efficiency of exact reachability analysis.  ...  Acknowledgments The authors would like to thank A Narayan for his help on our experimental setup and H. Cho, F. Somenzi, and G. Hachtel for constructive comments on our work.  ... 
doi:10.1145/307418.307430 fatcat:dcgmtex5qvelxnt4uerszh4qtm

Iterative minimization of partial finite state machines

Alex Alberto, Adenilso Simao
2013 Open Computer Science  
However, the minimization of partially specified finite state machines is a known NP-complete problem, and many heuristics to obtain feasible solutions have been proposed.  ...  In these applications, the size of the machine has a great impact on the complexity and quality of the results.  ...  Since our method takes advantage of a heuristic to optimize the minimization time, it is expected that the produced results are not exact for some FSMs.  ... 
doi:10.2478/s13537-013-0106-0 fatcat:qnw62s6k4zectg37qcxzcs2yra

Exact Minimization of FPRMs for Incompletely Specified Functions by Using MTBDDs

D. DEBNATH
2005 IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences  
This paper presents an exact minimization algorithm for FPRMs for incompletely specified functions.  ...  The effectiveness of the algorithm is demonstrated through experimental results for code converters, adders, and randomly generated functions. key words: AND-EXOR, Reed-Muller expression, FPRM, exact minimization  ...  Acknowledgement This work was supported in part by the Japan Society for the Promotion of Science and in part by the Ministry of Education, Science, Culture, and Sports of Japan.  ... 
doi:10.1093/ietfec/e88-a.12.3332 fatcat:fjsukafyfjhg5jmdocm7lig5te

Solving the quorumcast routing problem by constraint programming

Quang Dung Pham, Yves Deville
2012 Constraints  
Our complete approach (CP model + complete search) is better than the state of the art complete algorithm and our incomplete approach (CP model + incomplete search) is better than the state of the art  ...  It consists of finding a minimum cost tree that spans the source node r and at least q out of m specified nodes on a given undirected weighted graph.  ...  We re-implemented this state-of-the-art exact algorithm in C++ for the comparison 2 .  ... 
doi:10.1007/s10601-012-9125-z fatcat:3nw7af4aajhw3esqquyumxfkr4

Automatic synthesis of 3D asynchronous state machines

Yun, Dill
1992 IEEE/ACM International Conference on Computer-Aided Design  
We present an algorithm for constructing a three-dimensional next-state table, a heuristic for encoding states, and a procedure for generating necessary constraints for exact logic minimization.  ...  We demonstrate the effectiveness of the 3D implementation and the synthesis procedure on numerous designs including a large realistic example (Asynchronous Data Transfer Protocol of the SCSI Bus Controller  ...  Acknowledgement The authors would like to thank Steve Nowick of Stanford University for generously providing the logic minimizer and many helpful discussions.  ... 
doi:10.1109/iccad.1992.279310 dblp:conf/iccad/YunD92 fatcat:jwziitluzzhldd263g4y36ssmm

Sibling-substitution-based BDD minimization using don't cares

Youpyo Hong, P.A. Beerel, J.R. Burch, K.L. McMillan
2000 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
This paper presents heuristic algorithms to minimize the size of the BDD's representing incompletely specified functions by intelligently assigning don't cares to binary values.  ...  To increase the efficiency and capability of these tools, many algorithms have been developed to reduce the size of the BDD's.  ...  Drechsler of the Albert-Ludwigs-University Freiburg for valuable discussions and feedback on an earlier version of this work.  ... 
doi:10.1109/43.822619 fatcat:e73jj4u7hjgl3eicxlyze3mhti

Permissible observability relations in FSM networks

Huey-Yih Wang, Robert K. Brayton
1994 Proceedings of the 31st annual conference on Design automation conference - DAC '94  
We briefly discuss the exploitation of permissible observability relations in state minimization, circuit implementation and signal encoding.  ...  Previous attempts to capture the phenomenon of output don't care sequences for a component in an FSM network have been incomplete.  ...  Also special thanks to Szu-Tsung Cheng and Thomas Shiple for helpful discussions on the BDD package.  ... 
doi:10.1145/196244.196613 dblp:conf/dac/WangB94 fatcat:ukxqusfhbvfjnhhbvyuhevv25m
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