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Evolution of Digital Filters Using a Gate Array Model [chapter]

Julian F. Miller
1999 Lecture Notes in Computer Science  
In this paper it is shown how it is possible to evolve a small rectangular array of logic gates to perform low pass FIR filtering.  ...  The traditional paradigm for digital filter design is based on the concept of a linear difference equation with the output response being a weighted sum of signal samples with usually floating point coefficients  ...  Acknowledgements Especial thanks to Gary Robertson for many helpful discussions, and also, thanks to George Rae, Mohammed Yaminysharif, and Jay Hoy of the EE&CE Department, Napier University.  ... 
doi:10.1007/10704703_2 fatcat:555erciorzemphyrshqum6qkre

A Flexible Model of a CMOS Field Programmable Transistor Array Targeted for Hardware Evolution [chapter]

Ricardo Salem Zebulum, Adrian Stoica, Didier Keymeulen
2000 Lecture Notes in Computer Science  
This model and a first set of evolutionary experiments have been recently introduced; here, the objective is further illustrating its flexibility and versatility for the implementation of a variety of  ...  This article focuses on the properties of a fine grained reconfigurable transistor array currently under test at the Jet Propulsion Laboratory (JPL).  ...  In addition, this model gets the benefits of programmability at the transistor level. The authors feel encouraged to enhance the FPTA model in order to accomplish the evolution of complex systems.  ... 
doi:10.1007/3-540-46406-9_27 fatcat:xac3kaxlenactknsbpoxkouew4

Digital Filter Design Using Evolvable Hardware Chip for Image Enhancement [chapter]

A. Sumathi, R. S. D. Wahida Banu
2006 Lecture Notes in Computer Science  
Using evolutionary techniques on a digital filtersystem is a possible method for obtaining system adaptability.  ...  The EHW architecture evolves filters without any apriori information. Adaptability is accomplished by calculating a score for the results obtained by the system on a set of data.  ...  In function level evolution, hardware synthesis involves higher-level hardware functions than the primitive gates of gate-level evolution.  ... 
doi:10.1007/11816157_79 fatcat:hcxhi4k5jncotpqbygqpfvawuy

Hardware Implementation of Digital Signal Processing Algorithms

Ashkan Ashrafi, Antonio G. M. Strollo, Oscar Gustafsson
2013 Journal of Electrical and Computer Engineering  
In the paper "Holistic biquadratic IIR filter design for communication systems using differential evolution, " A.  ...  Advances in integrated circuits have provided high-performance and high-speed digital circuitries in the form of Application Specific Integrated Circuits (ASICs) and Field Programmable Gate Arrays (FPGAs  ...  In the paper "Holistic biquadratic IIR filter design for communication systems using differential evolution, " A.  ... 
doi:10.1155/2013/782575 fatcat:2askd2uynjbelnv5axxyvzgvky

Design and implementation of a virtual reconfigurable architecture for different applications of intrinsic evolvable hardware

J. Wang, Q.S. Chen, C.H. Lee
2008 IET Computers & Digital Techniques  
As examples, the proposed evolvable system is devoted to evolve two real-world applications: a character recogniser and an image operator by using gate level evolution and function level evolution, respectively  ...  The authors present a novel virtual reconfigurable architecture (VRA) for realising real-world applications of intrinsic evolvable hardware (EHW) on field programmable gate arrays (FPGAs).  ...  Gate level evolution of character recognition systems First, the proposed VRA is devoted to evolve a character recognition system using gate level evolution.  ... 
doi:10.1049/iet-cdt:20070124 fatcat:ox4tvqpnvneaxeh2qrmzdonhha

An Evolvable Hardware Tutorial [chapter]

Jim Torresen
2004 Lecture Notes in Computer Science  
For digital design, FPGAs (Field Programmable Gate Arrays) are very applicable. Thus, this technology is applied in much of the work with evolvable hardware.  ...  Evolvable Hardware (EHW) is a scheme -inspired by natural evolution, for automatic design of hardware systems.  ...  A major part of them are based on digital gate level technology using GA as the evolutionary algorithm.  ... 
doi:10.1007/978-3-540-30117-2_83 fatcat:gg3pjqhgdjhnlbnwud4llpmwpe

Real-world applications of analog and digital evolvable hardware

T. Higuchi, M. Iwata, D. Keymeulen, H. Sakanashi, M. Murakawa, I. Kajitani, E. Takahashi, K. Toda, N. Salami, N. Kajihara, N. Otsu
1999 IEEE Transactions on Evolutionary Computation  
hertz systems, a neural network EHW chip capable of autonomous reconfiguration, a data compression EHW chip for electrophotographic printers, and a gate-level EHW chip for use in prosthetic hands and  ...  This capacity for adaptation, achieved by employing efficient search algorithms based on the metaphor of evolution, has great potential for the development of innovative industrial applications.  ...  Much of the research on EHW has focused on gate-level evolution: the evolution of digital-hardware involving primitive hardware gates, such as AND-gates and OR-gates.  ... 
doi:10.1109/4235.788492 fatcat:vzjdsmu66farxmweuu2f3kb6py

Evolvable Embryonics: 2-in-1 Approach to Self-healing Systems

Elhadj Benkhelifa, Anthony Pipe, Ashutosh Tiwari
2013 Procedia CIRP  
The novelty of this research project addresses this compelling change in the traditional landscape of the associated research disciplines by seeking to provide a novel biologically inspired mechanism to  ...  This will be also presented in the context of biologically inspired systems where Evolvable Hardware is concerned with evolutionary synthesis of self-healing systems and potentially hardware capable of  ...  A respectable number of researchers in A-EE have concentrated their efforts on the evolution of passive filters; this provides the authors with the opportunity to compare the obtained results using the  ... 
doi:10.1016/j.procir.2013.07.029 fatcat:pfoqokxtanabrlxnrzsguf6zvu

Building Image Feature Kinetics for Cement Hydration Using Gene Expression Programming With Similarity Weight Tournament Selection

Lin Wang, Bo Yang, Shoude Wang, Zhifeng Liang
2015 IEEE Transactions on Evolutionary Computation  
1 Alsadoon A., Prasad P.W.C., Beg A.: Using software simulators to enhance the learning of digital logic design for the information technology students.  ...  Filters Using Fuzzy Noise Models.  ...  Hardware Image Filters Using Fuzzy Noise Models.  ... 
doi:10.1109/tevc.2014.2367111 fatcat:dsfdt3ngn5htfdg4ydmofrqznm

On the "Evolvable Hardware" Approach to Electronic Design Invention

Varun Aggarwal, Karl Berggren, Una-may O'reilly
2007 2007 IEEE Workshop on Evolvable and Adaptive Hardware (WEAH2007)  
Evolutionary Circuit Invention Today We can address our question by considering each of the three means, a) to c), being pursued:  ...  In this paper, we survey how the community currently tries to exploit the invention potential of evolvable hardware.  ...  Acknowledgements We would like to thank Rajeev Ram, MIT, for suggesting to us the idea of applying evolvable hardware methods to the arrayed photonic signal processing architecture.  ... 
doi:10.1109/weah.2007.361712 dblp:conf/weah/AggarwalBO07 fatcat:nqnwmyr2tvf37ga3kbh7bubqde

Image Filter Design with Evolvable Hardware [chapter]

Lukáš Sekanina
2002 Lecture Notes in Computer Science  
The paper introduces a new approach to automatic design of image filters for a given type of noise.  ...  If an image is available both with and without noise, the whole process of filter design can be done automatically, without influence of a designer.  ...  Acknowledgment The research was performed with the Grant Agency of the Czech Republic under No. 102/01/1531 Formal approach in digital circuit diagnostic -testable design verification.  ... 
doi:10.1007/3-540-46004-7_26 fatcat:vofi73y6ured3o5svfqm57nwqq

The alchemy of computation: designing with the unknown

Julian Francis Miller
2019 Natural Computing  
Modern computers allow a methodical search of possibly billions of experiments and the exploitation of interactions that are not known in advance.  ...  This enables a bottom-up process of design by assembling or configuring systems and testing the degree to which they fulfill the desired goal. We give two detailed examples of this process.  ...  Thompson demonstrated that unconstrained evolution on a silicon chip called a Field Programmable Gate Array (FPGA) could utilize the physical properties of the chip to solve computational problems.  ... 
doi:10.1007/s11047-019-09738-6 fatcat:xymdm6yhojbapkrfnxyfdje5uy

Challenges of evolvable hardware: past, present and the path to a promising future

Pauline C. Haddow, Andy M. Tyrrell
2011 Genetic Programming and Evolvable Machines  
Evolvable Hardware (EH) is a field of evolutionary computation (EC) that focuses on the embodiment of evolution in a physical media.  ...  Before the field of EH began, EC had already shown artificial evolution to be a highly competitive problem solver. EH thus started off as a new and exciting field with much promise.  ...  Digital devices Field programmable gate arrays (FPGA) The FPGA is a standard digital device and is organized as an array of logic blocks, as shown in Fig. 6 .  ... 
doi:10.1007/s10710-011-9141-6 fatcat:5jal32pzizc2pclgoqggchuiz4

Implementation of High performance DUC and DDC for Software Defined Radio Applications

Maruthi G.B, Saleem Malik S, S.P Prashanth Kumar, Pratap M.S
2015 International Journal of Computer Applications  
This paper deals with the implementation of high performance digital up converter and digital down converter for software defined radio application.  ...  Digital up converters are used at the transmitter side to up convert the baseband signal to intermediate frequency signal.  ...  a high performance Digital Signal Processor (DSP) and up conversion to Intermediate Frequency (IF) is performed by a Field Programmable Gate Array (FPGA) based design.  ... 
doi:10.5120/19320-0879 fatcat:2olquughdnfalfz5boxwpkgzcm

Initial Studies of a New VLSI Field Programmable Transistor Array [chapter]

Jörg Langeheine, Joachim Becker, Simon Fölling, Karlheinz Meier, Johannes Schemmel
2001 Lecture Notes in Computer Science  
The system is now ready to host a wide variety of evolution experiments.  ...  A system for intrinsic hardware evolution of analog electronic circuits is presented.  ...  Second, intrinsic evolution is expected to be faster than evolution using software models for the hardware.  ... 
doi:10.1007/3-540-45443-8_6 fatcat:hdzk7jxiwfcfvpeung5u5od24m
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