Filters








343 Hits in 7.5 sec

Error Detection via Online Checking of Cache Coherence with Token Coherence Signatures

Albert Meixner, Daniel J. Sorin
2007 2007 IEEE 13th International Symposium on High Performance Computer Architecture  
TCSC has negligible impact on system performance. • TCSC is the first signature-based scheme that completely checks cache coherence and can detect all types of coherence errors with arbitrarily high probability  ...  Recent research has explored dynamic checking of cache coherence as a comprehensive approach to memory system error detection.  ...  To provide comprehensive, end-to-end error detection, recent research has explored online (dynamic) checking of cache coherence.  ... 
doi:10.1109/hpca.2007.346193 dblp:conf/hpca/MeixnerS07 fatcat:lv5aegarnnafliwynqierlpgky

A mechanism to verify cache coherence transactions in multicore systems

Rance Rodrigues, Israel Koren, Sandip Kundu
2012 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)  
In this paper we present a centralized mechanism for online verification of cache coherence transactions in snoopy bus multicore systems.  ...  The correct operation of these applications thus depends on the correctness of the cache coherence transactions.  ...  Index Terms-Online error detection, cache coherence, verification, centralized mechanism I.  ... 
doi:10.1109/dft.2012.6378226 dblp:conf/dft/RodriguesKK12 fatcat:ozyn4aa4szaepi3iviedici6ci

Rerun

Derek R. Hower, Mark D. Hill
2008 SIGARCH Computer Architecture News  
with other threads.  ...  Multiprocessor deterministic replay has many potential uses in the era of multicore computing, including enhanced debugging, fault tolerance, and intrusion detection.  ...  The views expressed herein are not necessarily those of the NSF, Intel, or Sun Microsystems.  ... 
doi:10.1145/1394608.1382144 fatcat:q5hpmep2hve4bp5zav2mqtzwam

Rerun: Exploiting Episodes for Lightweight Memory Race Recording

Derek R. Hower, Mark D. Hill
2008 2008 International Symposium on Computer Architecture  
with other threads.  ...  Multiprocessor deterministic replay has many potential uses in the era of multicore computing, including enhanced debugging, fault tolerance, and intrusion detection.  ...  The views expressed herein are not necessarily those of the NSF, Intel, or Sun Microsystems.  ... 
doi:10.1109/isca.2008.26 dblp:conf/isca/HowerH08 fatcat:cl3joqnzyfhanjhs64fu4rcyvu

NUDA: A Non-Uniform Debugging Architecture and Nonintrusive Race Detection for Many-Core Systems

Chi-Neng Wen, Shu-Hsuan Chou, Chien-Chih Chen, Tien-Fu Chen
2012 IEEE transactions on computers  
The union of all the caches can serve as a race detection probe without disturbing execution ordering.  ...  Synchronization problems or bugs due to race conditions are particularly difficult to detect with existing debugging tools.  ...  However, it depends on the cache and cache coherence mechanisms. We believe that this implicit cost of cache coherence is too high and is infeasible in most many-core environments.  ... 
doi:10.1109/tc.2010.254 fatcat:6bcrurc6p5aenojnwikfsqhvcy

CacheKit: Evading Memory Introspection Using Cache Incoherence

Ning Zhang, He Sun, Kun Sun, Wenjing Lou, Y. Thomas Hou
2016 2016 IEEE European Symposium on Security and Privacy (EuroS&P)  
With the growing importance of networked embedded devices in the upcoming Internet of Things, new attacks targeting embedded OSes are emerging.  ...  We discuss potential countermeasures to detect this type of rootkit attack.  ...  CacheKit on Other Platforms One of the key enablers of CacheKit's evasion of Trust-Zone based detection is the cache coherency issue we observed in the experiments.  ... 
doi:10.1109/eurosp.2016.34 dblp:conf/eurosp/ZhangSSLH16 fatcat:clu3a2abprg7dgcampz7q4z3si

The gem5 Simulator: Version 20.0+ [article]

Jason Lowe-Power, Abdul Mutaal Ahmad, Ayaz Akram, Mohammad Alian, Rico Amslinger, Matteo Andreozzi, Adrià Armejach, Nils Asmussen, Brad Beckmann, Srikant Bharadwaj, Gabe Black, Gedare Bloom (+66 others)
2020 arXiv   pre-print
In this paper, we give and overview of gem5's usage and features, describe the current state of the gem5 simulator, and enumerate the major changes since the initial release of gem5.  ...  The open-source and community-supported gem5 simulator is one of the most popular tools for computer architecture research.  ...  This work was partially completed with funding from the European Union's Horizon 2020 research and innovation programme under project Mont-Blanc 2020, grant agreement 779877.  ... 
arXiv:2007.03152v2 fatcat:jsz5yhipxrfypg5yhhbwpb5sc4

SI-TM

Heiner Litz, David Cheriton, Amin Firoozshahian, Omid Azizi, John P. Stevenson
2014 Proceedings of the 19th international conference on Architectural support for programming languages and operating systems - ASPLOS '14  
Conventional transactional memory realizations not only pessimistically abort transactions on every read-write conflict but also because of false sharing, cache evictions, TLB misses, page faults and interrupts  ...  We show that snapshot isolation can reduce the number of aborts in some cases by three orders of magnitude and improve performance by up to 20x.  ...  We are grateful to Timothy Harris, Michael Chan, Ricardo Dias, Tor Aamodt, Stephan Diestelhorst and the anonymous reviewers for their useful feedback on earlier versions of this manuscript.  ... 
doi:10.1145/2541940.2541952 dblp:conf/asplos/LitzCFAS14 fatcat:er7rsyd4f5cs5i3irx6ijek6bq

Secure and Fault Tolerant Distributed Framework with Mobility Support [chapter]

Lukáš Hejtmánek
2008 Grid Middleware and Services  
Mutable data is provided via either file versioning or Redo Logs.  ...  In this paper, we propose an architecture of distributed data storage framework that incorporates fault tolerance, mobility support, and security.  ...  I would also like to thank to Luděk Matyska and to Petr Holub for stimulating discussions and help with the work described in this paper.  ... 
doi:10.1007/978-0-387-78446-5_19 fatcat:b3576zphbfg4zownbsbbjp55qi

A Modern Primer on Processing in Memory [article]

Onur Mutlu, Saugata Ghose, Juan Gómez-Luna, Rachata Ausavarungnirun
2020 arXiv   pre-print
The emergence of 3D-stacked memory plus logic, the adoption of error correcting codes inside the latest DRAM chips, proliferation of different main memory standards and chips, specialized for different  ...  of this trend.  ...  Whenever the CPU receives compressed signatures from the PIM core (e.g., when the PIM kernel finishes), the CPU performs coherence resolution ( 4 ), where it checks if any coherence conflicts occurred.  ... 
arXiv:2012.03112v1 fatcat:hq2i2xzq4nbszenq7rqmjzcjci

Cross-Tenant Side-Channel Attacks in PaaS Clouds

Yinqian Zhang, Ari Juels, Michael K. Reiter, Thomas Ristenpart
2014 Proceedings of the 2014 ACM SIGSAC Conference on Computer and Communications Security - CCS '14  
To the best of our knowledge, our attacks are the first granular, cross-tenant, side-channel attacks successfully demonstrated on state-of-the-art commercial clouds, PaaS or otherwise.  ...  ., the number of items in a shopping cart), to hijack user accounts, and to break SAML single sign-on.  ...  False sharing usually refers to a cache usage pattern in distributed, coherent cache systems that degrades the performance of the cache [7] .  ... 
doi:10.1145/2660267.2660356 dblp:conf/ccs/ZhangJRR14 fatcat:rhg3aw7qmbffdo2cf3rohqwvya

Public-Key Infrastructure [chapter]

2013 Wireless Mobile Internet Security  
In response to the EuroPKI 2008 call for papers, a total of 37 paper proposals were received.  ...  Preface This book contains the proceedings of the 5th European Public Key Infrastructure Workshop: Theory and Practice, EuroPKI 2008, which was held on the NTNU campus Gløshaugen in Trondheim, Norway,  ...  Stephen Kent of BBN, who developed the RPKI concept, and whose guidance was critical to the accomplishment of this project.  ... 
doi:10.1002/9781118512920.ch7 fatcat:hocfzfhi4rbuhmssop2hkwbc64

PAIR: Planning and Iterative Refinement in Pre-trained Transformers for Long Text Generation [article]

Xinyu Hua, Lu Wang
2020 arXiv   pre-print
Evaluation with automatic metrics shows that adding planning consistently improves the generation quality on three distinct domains, with an average of 20 BLEU points and 12 METEOR points improvements.  ...  In addition, human judges rate our system outputs to be more relevant and coherent than comparisons without planning.  ...  We thank three anonymous reviewers for their constructive suggestions on many aspects of this work.  ... 
arXiv:2010.02301v1 fatcat:m6lyeu4b2jb67brpr6id2onow4

Butterfly analysis

Michelle L. Goodstein, Evangelos Vlachos, Shimin Chen, Phillip B. Gibbons, Michael A. Kozuch, Todd C. Mowry
2010 SIGARCH Computer Architecture News  
Online program monitoring is an effective technique for detecting bugs and security attacks in running applications.  ...  We prove that our approach does not miss errors, and sacrifices precision only due to the lack of a relative ordering among recent events.  ...  In [23] , the authors use epochs, combined with signatures, to detect data races.  ... 
doi:10.1145/1735970.1736050 fatcat:uaepoinvarhkdhf42mfyyv5mye

Butterfly analysis

Michelle L. Goodstein, Evangelos Vlachos, Shimin Chen, Phillip B. Gibbons, Michael A. Kozuch, Todd C. Mowry
2010 Proceedings of the fifteenth edition of ASPLOS on Architectural support for programming languages and operating systems - ASPLOS '10  
Online program monitoring is an effective technique for detecting bugs and security attacks in running applications.  ...  We prove that our approach does not miss errors, and sacrifices precision only due to the lack of a relative ordering among recent events.  ...  In [23] , the authors use epochs, combined with signatures, to detect data races.  ... 
doi:10.1145/1736020.1736050 dblp:conf/asplos/GoodsteinVCGKM10 fatcat:svizvmm32zadtpiuttyoclizq4
« Previous Showing results 1 — 15 out of 343 results