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Energy-efficient signal processing via algorithmic noise-tolerance

Rajamohana Hegde, Naresh R. Shanbhag
1999 Proceedings of the 1999 international symposium on Low power electronics and design - ISLPED '99  
This deliberate introduction of input-dependent errors leads to degradation in the algorithmic performance, which is compensated for via algorithmic noise-tolerance (ANT) schemes.  ...  ) over that achieved via conventional voltage scaling, with a maximum of 0:5dB degradation in the output signal-to-noise ratio (S NR o).  ...  Prediction-based algorithmic noise-tolerance.  ... 
doi:10.1145/313817.313834 dblp:conf/islped/HegdeS99 fatcat:cwyd3bneijf6zjxzsjnx5nhjdy

Energy-efficient signal processing via algorithmic noise-tolerance

R. Hegde, N.R. Shanbhag
Proceedings. 1999 International Symposium on Low Power Electronics and Design (Cat. No.99TH8477)  
This deliberate introduction of input-dependent errors leads to degradation in the algorithmic performance, which is compensated for via algorithmic noise-tolerance (ANT) schemes.  ...  ) over that achieved via conventional voltage scaling, with a maximum of 0:5dB degradation in the output signal-to-noise ratio (S NR o).  ...  Prediction-based algorithmic noise-tolerance.  ... 
doi:10.1109/lpe.1999.799405 fatcat:aprbecc5drh77pogrzcj47jwkm

Reliable and energy-efficient digital signal processing

N. Shanbhag
2002 Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324)  
This paper provides an overview of algorithmic noise-tolerance (ANT) for designing reliable and energy-efficient digital signal processing systems.  ...  Average energy-savings range from 67% to 71% over conventional systems. Fluid IP core generators are proposed as a means of encapsulating the benefits of an ANT-based low-power design methodology.  ...  This approach of error/noise-tolerance is fundamentally superior to mitigating noise and achieves energy-efficiencies beyond what is achievable via present day techniques.  ... 
doi:10.1109/dac.2002.1012737 fatcat:cfyp575zy5bwfctmmybu7p3jku

Reliable and energy-efficient digital signal processing

Naresh Shanbhag
2002 Proceedings - Design Automation Conference  
This paper provides an overview of algorithmic noise-tolerance (ANT) for designing reliable and energy-efficient digital signal processing systems.  ...  Average energy-savings range from 67% to 71% over conventional systems. Fluid IP core generators are proposed as a means of encapsulating the benefits of an ANT-based low-power design methodology.  ...  This approach of error/noise-tolerance is fundamentally superior to mitigating noise and achieves energy-efficiencies beyond what is achievable via present day techniques.  ... 
doi:10.1145/514122.514124 fatcat:3asxmhcldbb3rethvoyls7gmgi

Reliable and energy-efficient digital signal processing

Naresh Shanbhag
2002 Proceedings - Design Automation Conference  
This paper provides an overview of algorithmic noise-tolerance (ANT) for designing reliable and energy-efficient digital signal processing systems.  ...  Average energy-savings range from 67% to 71% over conventional systems. Fluid IP core generators are proposed as a means of encapsulating the benefits of an ANT-based low-power design methodology.  ...  This approach of error/noise-tolerance is fundamentally superior to mitigating noise and achieves energy-efficiencies beyond what is achievable via present day techniques.  ... 
doi:10.1145/513918.514124 dblp:conf/dac/Shanbhag02 fatcat:lgo6wntvtzf5zormvhwd2w62i4

Energy-efficiency bounds for deep submicron VLSI systems in the presence of noise

Lei Wang, N.R. Shanbhag
2003 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
Index Terms-CDMA communications, deep submicron noise, energy-efficiency bounds, low power, noise-tolerance. I.  ...  In this paper, we present an algorithm for computing the bounds on energy-efficiency of digital very large scale integration (VLSI) systems in the presence of deep submicron noise.  ...  communications and digital signal processing systems spanning the algorithmic, architectural and circuit domains.  ... 
doi:10.1109/tvlsi.2003.810783 fatcat:xujbjrbsqndjxmjhmzy77nkxpa

Energy-efficient Machine Learning in Silicon: A Communications-inspired Approach [article]

Naresh R. Shanbhag
2016 arXiv   pre-print
employing information-based metrics, statistical error compensation (SEC), and retraining-based methods to implement ML systems on stochastic circuit/device fabrics operating at the limits of energy-efficiency  ...  energy-constrained platforms.  ...  This allows such receiver to operate with well-structured signal, channel and noise models, which lowers its complexity and energy consumption, while enhancing its accuracy.  ... 
arXiv:1611.03109v1 fatcat:qdnks33xmzcrdkez43z2kicxeq

Dynamic Wireless Energy Harvesting and Optimal Distribution in Multipair DF Relay Network with Nonlinear Energy Conversion Model

Syed Tariq Shah, Daniel B. da Costa, Kae Won Choi, Min Young Chung
2018 Wireless Communications and Mobile Computing  
Wireless energy harvesting has emerged as an efficient solution to prolong the lifetime of wireless networks composed of energy-constrained nodes.  ...  In this paper, we consider a multipoint-to-multipoint relay network, where multiple source nodes communicate with their respective destination nodes via intermediate energy-constrained decode-and-forward  ...  threshold power for signal processing and harvests the remaining signal power (see lines (5)-(6) of Algorithm 1).  ... 
doi:10.1155/2018/7638215 fatcat:uaiwafgtnzghrh5el2hgaiwzbq

Low-power filtering via adaptive error-cancellation

Lei Wang, N.R. Shanbhag
2003 IEEE Transactions on Signal Processing  
The AEC technique falls under the general class of algorithmic noise-tolerance (ANT) techniques proposed earlier for combating transient/soft errors.  ...  We employ the AEC technique in the context of a frequency-division multiplexed (FDM) communication system and demonstrate that up to 71% energy reduction can be achieved over present-day voltage-scaled  ...  Our past research [9] - [11] on energy-efficiency bounds of DSM VLSI systems in the presence of noise strongly suggests that design techniques based on noise-tolerance need to be developed if energy-efficiency  ... 
doi:10.1109/tsp.2002.806989 fatcat:pitwazeh2rf3lfw2c5dju3n7ki

Reliable and efficient system-on-chip design

N.R. Shanbhag
2004 Computer  
Table 1 . 1 Noise tolerance versus energy efficiency.  ...  Figure 5 . 5 Algorithmic noise tolerance.  ... 
doi:10.1109/mc.2004.1274003 fatcat:mudc4ryuxbdi7grtk67ttctyvi

Guest Editorial: System-on-a-Chip for Multimedia Systems

Yen-Kuang Chen, Stella Kuei-Ann Wen, Chen-Yi Lee
2005 Journal of VLSI Signal Processing Systems for Signal, Image and Video Technology  
paper "Efficiency Analysis for a Mixed-Signal Focal Plane Processing Architecture."  ...  The following three papers address the design of power-efficient and noise-tolerable architectures. • Beric et al. present an algorithm/architecture co-design methodology to keep the power dissipation  ... 
doi:10.1007/s11265-005-6246-2 fatcat:uzihq47fn5dcrfesdkmb6umy6y

Soft digital signal processing

R. Hegde, N.R. Shanbhag
2001 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
This deliberate introduction of input-dependent errors leads to degradation in the algorithmic performance, which is compensated for via algorithmic noise-tolerance (ANT) schemes.  ...  In this paper, we propose a framework for low-energy digital signal processing (DSP), where the supply voltage is scaled beyond the critical voltage imposed by the requirement to match the critical path  ...  The degradation in performance of the DSP algorithms is restored via algorithmic noise tolerance, where the signal statistics are exploited to develop low complexity error-control schemes.  ... 
doi:10.1109/92.974895 fatcat:mlq26omudzbx3cuixfy6vz5ctq

Minimum-Energy Operation Via Error Resiliency

Rami A. Abdallah, Naresh R. Shanbhag
2010 IEEE Embedded Systems Letters  
In this letter, we study the impact of error resiliency, in particular algorithmic-noise tolerance (ANT) (Hedge and Shanbhag, IEEE Trans.  ...  Index Terms-Algorithmic-noise tolerance, error resiliency, subthreshold operation, ultra low-power electronics, voltage overscaling.  ...  Error-resiliency for achieving energy-efficiency was first proposed in [2] where algorithmic-noise tolerance (ANT) was introduced to correct for voltage overscaling (VOS)-induced errors.  ... 
doi:10.1109/les.2010.2098330 fatcat:3nvkahy5dbcvpl6urnf3ei6yzq

Toward achieving energy efficiency in presence of deep submicron noise

R. Hegde, N.R. Shanbhag
2000 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
Presented in this paper are 1) information-theoretic lower bounds on energy consumption of noisy digital gates and 2) the concept of noise tolerance via coding for achieving energy efficiency in the presence  ...  We then propose noise tolerance via coding to approach the lower bounds on energy dissipation.  ...  efficiency via noise-tolerant coding in the presence of deep submicron noise.  ... 
doi:10.1109/92.863617 fatcat:zez4ayesrfabzbxbzc46mvrk5y

Reliable low-power digital signal processing via reduced precision redundancy

Byonghyo Shim, S.R. Sridhara, N.R. Shanbhag
2004 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
In this paper, we present a novel algorithmic noise-tolerance (ANT) technique referred to as reduced precision redundancy (RPR).  ...  When combined with voltage overscaling (VOS), the resulting soft digital signal processing system achieves up to 60% and 44% energy savings with no loss in the signal-to-noise ratio (SNR) for receive filtering  ...  In [9] , we proposed algorithmic noise-tolerance (ANT) as a technique for combating system level errors in digital signal processing systems.  ... 
doi:10.1109/tvlsi.2004.826201 fatcat:jydqujwp25hangmigsidsfn45m
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