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Energy-aware writes to non-volatile main memory

Jie Chen, Ron C. Chiang, H. Howie Huang, Guru Venkataramani
2012 ACM SIGOPS Operating Systems Review  
In this paper, we investigate new techniques that would perform writes to PCM with energy awareness.  ...  Scalability challenges of DRAM technology call for advances in emerging memory technologies, among which Phase Change Memory (PCM) has received considerable attention due to its non-volatility, storage  ...  The main goal of this work is to investigate new techniques that would perform writes to PCM with energy awareness. Write operations account for 10-40% of memory operations [8] .  ... 
doi:10.1145/2094091.2094104 fatcat:wsrgo7jiwva7pkbb4wgv73pxnu

Energy-aware writes to non-volatile main memory

Jie Chen, Ron C. Chiang, H. Howie Huang, Guru Venkataramani
2011 Proceedings of the 4th Workshop on Power-Aware Computing and Systems - HotPower '11  
In this paper, we investigate new techniques that would perform writes to PCM with energy awareness.  ...  Scalability challenges of DRAM technology call for advances in emerging memory technologies, among which Phase Change Memory (PCM) has received considerable attention due to its non-volatility, storage  ...  The main goal of this work is to investigate new techniques that would perform writes to PCM with energy awareness. Write operations account for 10-40% of memory operations [8] .  ... 
doi:10.1145/2039252.2039258 fatcat:w7lbe3xfv5bmxfaufavf5avh5i

Code Optimization Techniques to Reduce Energy Consumption of Multimedia Applications in Hybrid Memory

Thomas Haywood Dadzie, Seungpyo Cho, Hyunok Oh
2016 IEIE Transactions on Smart Processing and Computing  
This paper proposes code optimization techniques to reduce energy consumption of complex multimedia applications in a hybrid memory system with volatile dynamic random access memory (DRAM) and non-volatile  ...  Based on the profile, variables with a high read operation are allocated to STT-MRAM, and variables with a high write operation are allocated to DRAM to reduce energy consumption.  ...  Basic Science Research Programs through the National Research Foundation of Korea(NRF) funded by the MSIP (2013R1A1A1013384) and by IT R&D program MKE/KEIT (No. 10041608, Embedded system Software for New-memory  ... 
doi:10.5573/ieiespc.2016.5.4.274 fatcat:zj734nrdyzaxzdft36yqs35c3a

Efficient memory management of a hierarchical and a hybrid main memory for MN-MATE platform

Kyu Ho Park, Sung Kyu Park, Hyunchul Seok, Woomin Hwang, Dong-Jae Shin, Jong Hun Choi, Ki-Woong Park
2012 Proceedings of the 2012 International Workshop on Programming Models and Applications for Multicores and Manycores - PMAM '12  
In an attempt to mitigate the energy and memory wall, we propose a new architecture with a hierarchical and a hybrid main memory for manycore system, termed MN-MATE.  ...  On the top of the system, we designed and evaluated efficient management techniques to achieve the high performance and the low energy usage, including hierarchical memory management, power-aware hybrid  ...  non-volatile memory.  ... 
doi:10.1145/2141702.2141712 dblp:conf/ppopp/ParkPSHSCP12 fatcat:rd2fhrxqenaplaxbl275mxbupm

Leveraging Data Lifetime for Energy-Aware Last Level Non-Volatile SRAM Caches using Redundant Store Elimination

Hsiang-Jen Tsai, Chien-Chih Chen, Keng-Hao Yang, Ting-Chin Yang, Li-Yue Huang, Ching-Hao Chung, Meng-Fan Chang, Tien-Fu Chen
2014 Proceedings of the The 51st Annual Design Automation Conference on Design Automation Conference - DAC '14  
In this context, a promising memory technology, Non-volatile SRAM (nvSRAM), enables normal and standby operation modes which can be used to store various types of data.  ...  NVM has commonly been used to address increasingly large last-level caches (LLCs) requirements by reducing leakage. However, frequent data-writing operations result in increased energy consumption.  ...  Furthermore, the non-volatile associative memory cell and architecture was presented to achieve symmetric read/write access and have the non-volatility [8] .  ... 
doi:10.1145/2593069.2593153 dblp:conf/dac/TsaiCYYHCCC14 fatcat:rv7ypqp6hnfehf6jiyfoidpyqa

Utilizing PCM for Energy Optimization in Embedded Systems

Zili Shao, Yongpan Liu, Yiran Chen, Tao Li
2012 2012 IEEE Computer Society Annual Symposium on VLSI  
However, to achieve this, systemlevel software optimization techniques are required in order to solve problems caused by the three disadvantages of PCM: namely, long write latency, large write energy and  ...  In this paper, we present a hybrid memory system architecture in which PCM is used to replace DRAM as much as possible so the system energy can be reduced by utilizing the lower standby power of PCM.  ...  Improving [10] , [11] , [12] , [13] and energy [14] in the hybrid DRAM/NVM(Non-Volatile Memory) main memory.  ... 
doi:10.1109/isvlsi.2012.81 dblp:conf/isvlsi/ShaoLCL12 fatcat:kd7tzfyhuvfe7bwzudwxfvf5f4

Low-Energy Heterogeneous Non-Volatile Memory Systems for Mobile Systems

Hyung Gyu Lee, Naehyuck Chang
2005 Journal of Low Power Electronics  
In this paper, we introduce an energy-aware memory allocation in heterogeneous non-volatile memory systems to maximize the battery life.  ...  Semiconductor non-volatile memory is indispensable for hand-held devices that cannot afford magnetic disks due to excessive space, weight, cost and energy consumption.  ...  Volatile memory devices are generally superior to non-volatile memory devices in terms of read and write performance.  ... 
doi:10.1166/jolpe.2005.001 fatcat:tgyntgcy3rcb3bki7dllx4qsza

An Energy-Efficient and Fast Scheme for Hybrid Storage Class Memory in an AIoT Terminal System

Hao Sun, Lan Chen, Xiaoran Hao, Chenji Liu, Mao Ni
2020 Electronics  
Moreover, the efficiency is decreased due to the swapping of data between the main memory and storage.  ...  Conventional main memory can no longer meet the requirements of low energy consumption and massive data storage in an artificial intelligence Internet of Things (AIoT) system.  ...  Acknowledgments: The authors would like to thank anonymous reviewers for their special effort. Conflicts of Interest: The authors declare no conflict of interest.  ... 
doi:10.3390/electronics9061013 fatcat:pzqb5c2mxjaolewur6ae57ti5u

CAM-based retention-aware DRAM (CRA-DRAM) for refresh power reduction

Yong Ye, Yuan Du, Weiliang Jing, Xiaoyun Li, Zhitang Song, Bomy Chen
2017 IEICE Electronics Express  
As the main component for modern main memory system, DRAM stores data by capacitors, which must be refreshed periodically to keep the charges.  ...  In this paper, we proposed a CAM (content-addressable memory)-based Retention-Aware DRAM (CRA-DRAM) system, a hardware implementation that uses CAM and RAM to locate and replace the leaky cells at the  ...  I Summary of recently published volatile and non-volatile CAMs Energy challenges to CRA-DRAM The additional energy consumption caused by CAM/RAM is inevitable in our memory system.  ... 
doi:10.1587/elex.14.20170053 fatcat:2v4pwkznrvglrlris5gjtqj6kq

HaVOC

Luis Angel Bathen, Nikil Dutt
2012 Proceedings of the 49th Annual Design Automation Conference on - DAC '12  
Hybrid on-chip memories that combine Non-Volatile Memories (NVMs) with SRAMs promise to mitigate the increasing leakage power of traditional on-chip SRAMs.  ...  We define a data volatility metric used by our hybrid memoryaware compilation flow to generate memory allocation policies that are enforced at run-time by a filter-inspired dynamic memory algorithm.  ...  In order to reduce leakage power in SRAM-based memories, designers have proposed emerging Non-Volatile Memories (NVMs) as alternatives to SRAM for on-chip memories [27, 15, 24] .  ... 
doi:10.1145/2228360.2228438 dblp:conf/dac/BathenD12 fatcat:x2vm3ilqtfa6pfdcs7x7qpyjha

A Survey of Non-Volatile Main Memory Technologies: State-of-the-Arts, Practices, and Future Directions [article]

Haikun Liu, Di Chen, Hai Jin, Xiaofei Liao, Bingsheng He, Kan Hu, Yu Zhang
2020 arXiv   pre-print
Non-Volatile Main Memories (NVMMs) have recently emerged as promising technologies for future memory systems.  ...  Generally, NVMMs have many desirable properties such as high density, byte-addressability, non-volatility, low cost, and energy efficiency, at the expense of high write latency, high write power consumption  ...  NOVA: A log-structured file system for hybrid volatile/non-volatile main memories.  ... 
arXiv:2010.04406v1 fatcat:jna5pb7lizhvllmhfle4yikife

A Survey of Hybrid Main Memory Architectures

Zerrin YILDIZ ÇAVDAR, İsa AVCI, Murat KOCA, Ahmet SERTBAŞ
2019 Sakarya University Journal of Science  
Another study to address this increasing demand is the development of hybrid main memory architectures. Hybrid Main Memory is one of the most recent studies on RAM.  ...  In this research, we investigate hybrid main memory systems for a more efficient main memory architecture.  ...  In the second section of our work, we briefly mention non-volatile main memory types. In the third section, we examine hybrid main memory architectures.  ... 
doi:10.16984/saufenbilder.334645 fatcat:r36y2uh5azenxg6pj2n5c74a7i

Energy-aware demand paging on NAND flash-based embedded storages

Chanik Park, Jeong-Uk Kang, Seon-Yeong Park, Jin-Soo Kim
2004 Proceedings of the 2004 international symposium on Low power electronics and design - ISLPED '04  
We also propose a flash memory-aware page replacement policy that can reduce the number of write and erase operations in NAND flash memory.  ...  In this paper, we present energy-aware demand paging technique to lower the energy consumption of embedded systems considering the characteristics of interactive embedded applications with large memory  ...  [8] presented energy-aware memory allocation schemes in heterogeneous non-volatile memory systems.  ... 
doi:10.1145/1013235.1013317 dblp:conf/islped/ParkKPK04 fatcat:h7hsmdtjhjex5dsxg6m4dgcfu4

A dual-phase compression mechanism for hybrid DRAM/PCM main memory architectures

Seungcheol Baek, Hyung Gyu Lee, Chrysostomos Nicopoulos, Jongman Kim
2012 Proceedings of the great lakes symposium on VLSI - GLSVLSI '12  
Introducing the non-volatile storage devices in memory hierarchy is considered to reduce the energy consumption since non-volatile memories have got no power leakage in memory cells.  ...  The present DRAM based main memory has reached its energy limits.  ...  non-volatile with no energy leakage.  ... 
doi:10.1145/2206781.2206865 dblp:conf/glvlsi/BaekLNK12 fatcat:2q7eacaccjcsflzwifbx4o3ede

FPGA-based prototyping systems for emerging memory technologies

Taemin Lee, Dongki Kim, Hyunsun Park, Sungjoo Yoo, Sunggu Lee
2014 2014 25nd IEEE International Symposium on Rapid System Prototyping  
Compared to DRAM, the new memories have two major differences, non-volatility and write overhead in terms of endurance, latency and power.  ...  We built two different FPGA-based evaluation boards to evaluate hardware and software designs for new-memory based main memory; one with a DRAM subsystem having parameterizable latency and non-volatility  ...  show that the energy efficiency of STT-RAM main memory is 60% better than that of DRAM [3] . Software-based studies mostly target non-volatility.  ... 
doi:10.1109/rsp.2014.6966901 dblp:conf/rsp/LeeKPYL14 fatcat:zzjltv4zabhfnfqgicpzphopqa
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