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SACR: Scheduling-Aware Cache Reconfiguration for Real-Time Embedded Systems

Weixun Wang, Prabhat Mishra, Ann Gordon-Ross
2009 2009 22nd International Conference on VLSI Design  
To the best of our knowledge, this is the first attempt to integrate dynamic cache reconfiguration in real-time scheduling techniques.  ...  This paper presents a novel approach for implementing cache reconfiguration in soft real-time systems by efficiently leveraging static analysis during execution to both minimize energy and maximize performance  ...  The contribution of this paper is a novel scheduling aware dynamic cache reconfiguration technique for soft real-time embedded systems.  ... 
doi:10.1109/vlsi.design.2009.66 dblp:conf/vlsid/WangMG09 fatcat:57q64l374zfy5ecghajrchpmpu

REHLib: New Optimal Implementation of Reconfigurable Energy Harvesting Multiprocessor Systems

Wiem Housseyni, Olfa Mosbahi, Mohamed Khalgui
2017 Proceedings of the 12th International Conference on Software Technologies  
Energy management has long been a limiting factor in real-time embedded systems.  ...  The proposed approach is assessed from two aspects, energy management and real-time scheduling.  ...  By the same token, the literature has revealed a substantial interest in scheduling research for energy aware and power management scheduling for real-time systems.  ... 
doi:10.5220/0006432203460354 dblp:conf/icsoft/HousseyniMK17 fatcat:strldcfeq5gn3ewzypcz2yypom

Dynamic Cache Reconfiguration for Soft Real-Time Systems

Weixun Wang, Prabhat Mishra, Ann Gordon-Ross
2012 ACM Transactions on Embedded Computing Systems  
To the best of our knowledge, this is the first attempt to integrate dynamic cache reconfiguration in real-time scheduling techniques.  ...  This article presents a novel approach for implementing cache reconfiguration in soft real-time systems by efficiently leveraging static analysis during runtime to minimize energy while maintain the same  ...  The contribution of this article is a novel scheduling aware dynamic cache reconfiguration technique for soft real-time systems.  ... 
doi:10.1145/2220336.2220340 fatcat:gdgovatdfnaorg7scliudjoa4y

Dynamic Reconfiguration of Two-Level Cache Hierarchy in Real-Time Embedded Systems

Weixun Wang, Prabhat Mishra
2011 Journal of Low Power Electronics  
While cache reconfiguration is successful in desktop-based and embedded systems, it is not directly applicable in real-time systems due to timing constraints.  ...  This paper efficiently integrates cache reconfiguration in real-time systems with a unified two-level cache hierarchy.  ...  RELATED WORK Energy-aware Real-Time Scheduling Techniques Dynamic Power Management (DPM) [12] and Dynamic Voltage Scaling (DVS) [13] are the most prominent techniques used in energy-aware scheduling  ... 
doi:10.1166/jolpe.2011.1113 fatcat:qayer6yilfgurl3feyyutkwdyi

Leakage-Aware Energy Minimization Using Dynamic Voltage Scaling and Cache Reconfiguration in Real-Time Systems

Weixun Wang, Prabhat Mishra
2010 2010 23rd International Conference on VLSI Design  
In this paper, we efficiently integrate processor voltage scaling and cache reconfiguration together that is aware of leakage power to minimize overall system energy consumption.  ...  Dynamic voltage scaling (DVS) is acknowledged to be successful in reducing processor energy consumption.  ...  Our proposed research in this paper integrates DVS and DCR in hard real-time systems to reduce both dynamic and static energy consumption.  ... 
doi:10.1109/vlsi.design.2010.22 dblp:conf/vlsid/WangM10 fatcat:tngukotczjcpljreauezhbofti

Transition-aware task scheduling and configuration selection in reconfigurable embedded systems

Hessam Kooti, Eli Bozorgzadeh
2013 ACM SIGBED Review  
schemes such as FPGA-like reconfiguration or dynamic voltage/frequency scaling (DVFS).  ...  This paper presents a novel graph representation that captures the transition overhead due to runtime configuration of underlying hardware in reconfigurable embedded systems resulting from various configuration  ...  While hardware configurations such as dynamic voltage/frequency scaling are mainly aimed for energy-aware and battery-aware runtime adaptation of the system [1, 2, 3, 4] , runtime reconfiguration of programmable  ... 
doi:10.1145/2583687.2583696 fatcat:jzv6dwpsibcqjkqxocu5vn3sta

Reliability and energy-aware cache reconfiguration for embedded systems

Yuanwen Huang, Prabhat Mishra
2016 2016 17th International Symposium on Quality Electronic Design (ISQED)  
We propose two heuristic approaches for reliability-and energy-aware dynamic cache reconfiguration.  ...  This paper studies the trade-off between energy efficiency improvement and reduction in cache vulnerability during cache reconfiguration.  ...  [3] studied scheduling-aware cache reconfiguration for energy saving in real-time systems. Cai et al. [7] showed that cache size could impact performance, energy and reliability.  ... 
doi:10.1109/isqed.2016.7479220 dblp:conf/isqed/HuangM16 fatcat:xryybbdhbre4pni2k24onegpfe

Dynamic Reconfiguration of Two-Level Caches in Soft Real-Time Embedded Systems

Weixun Wang, Prabhat Mishra
2009 2009 IEEE Computer Society Annual Symposium on VLSI  
While cache reconfiguration is successful in desktop-based systems, it is not directly applicable in real-time systems due to timing constraints.  ...  This paper efficiently integrates cache reconfiguration in soft real-time systems with a unified two-level cache hierarchy.  ...  Hence optimizations in real-time systems must be aware of the task schedulability in order to guarantee that the system's service quality does not get tampered.  ... 
doi:10.1109/isvlsi.2009.22 dblp:conf/isvlsi/WangM09 fatcat:etkmuy7kwvddpahxatub2b4cwq

Energy efficient mapping on manycore with dynamic and partial reconfiguration: Application to a smart camera

Robin Bonamy, Sébastien Bilavarn, Fabrice Muller, François Duhem, Simon Heywood, Philippe Millet, Fabrice Lemonnier
2018 International journal of circuit theory and applications  
FPGAs are increasingly being used in cameras owing to their suitability for real-time image processing with intensive, highperformance tasks, and to the recent advances in dynamic reconfiguration that  ...  Energy efficient mapping on manycore with dynamic and partial reconfiguration: Application to a smart camera.  ...  ACKNOWLEDGMENTS This work was carried out under the BENEFIC project (CA505), a project labeled within the framework of CATRENE, the EUREKA cluster for Application and Technology Research in Europe on NanoElectronics  ... 
doi:10.1002/cta.2508 fatcat:edswp7sf3bh5pmzwtc5pvq2pqy

Energy-aware dynamic reconfiguration algorithms for real-time multitasking systems

Weixun Wang, Sanjay Ranka, Prabhat Mishra
2011 Sustainable Computing: Informatics and Systems  
In this paper, we propose a general and flexible algorithm for energy optimization based on dynamic reconfiguration in multitasking systems.  ...  System optimization techniques based on dynamic reconfiguration are widely adopted for energy conservation.  ...  Acknowledgment This work was partially supported by NSF grant CCF-0903430 and SRC grant 2009-HJ-1979.  ... 
doi:10.1016/j.suscom.2010.10.006 fatcat:5wnvzpcutvhuhh5cjp4dqfo2de

A General Algorithm for Energy-Aware Dynamic Reconfiguration in Multitasking Systems

Weixun Wang, S Ranka, P Mishra
2011 2011 24th Internatioal Conference on VLSI Design  
In this paper, we propose a general and flexible algorithm for energy optimization based on dynamic reconfiguration in multitasking systems.  ...  System optimization techniques based on dynamic reconfiguration are widely adopted for energy conservation.  ...  Recent efforts [6] tried to combine DCR and DVS together in hard real-time systems.  ... 
doi:10.1109/vlsid.2011.17 dblp:conf/vlsid/WangRM11 fatcat:5tkxvczoajc6fmhg2ddozvo6um

An energy-aware scheduler for dynamically reconfigurable multi-core systems

Robin Bonamy, Sebastien Bilavarn, Fabrice Muller
2015 2015 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)  
This paper describes an energy-aware scheduling approach intended for use in heterogeneous multiprocessors supporting hardware acceleration with Dynamic and Partial Reconfiguration.  ...  Scheduler decisions rely on pragmatic power and energy models to map the load across cores and reconfigurable regions with regards to the actual power costs.  ...  ACKNOWLEDGMENTS This work is carried out under the BENEFIC project (CA505), a project labelled within the framework of CATRENE, the EUREKA cluster for Application and Technology Research in Europe on NanoElectronics  ... 
doi:10.1109/recosoc.2015.7238084 dblp:conf/recosoc/BonamyBM15 fatcat:s5qsva6dizhqfnrenrk7u2ur3u

A fuzzy logic based dynamic reconfiguration scheme for optimal energy and throughput in symmetric chip multiprocessors

Muhammad Yasir Qadri, Klaus D. McDonald-Maier
2010 2010 NASA/ESA Conference on Adaptive Hardware and Systems  
Embedded systems architectures have traditionally often been investigated and designed in order to achieve a greater throughput combined with minimum energy consumption.  ...  With the advent of reconfigurable architectures it is now possible to support algorithms to find optimal solutions for an improved energy and throughput balance.  ...  Applying dynamic voltage and frequency scaling (DVFS) techniques Li [9] has proposed energy efficient task scheduling algorithm for real-time multiprocessor systems.  ... 
doi:10.1109/ahs.2010.5546239 dblp:conf/ahs/QadriM10 fatcat:jba6t5io2bcqjig2lgdpg5xcda

System-level power-performance tradeoffs for reconfigurable computing

J. Noguera, R.M. Badia
2006 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
In this paper, we propose a configuration-aware datapartitioning approach for reconfigurable computing. We show how the reconfiguration overhead impacts the data-partitioning process.  ...  Finally, we have applied our methodology and algorithms to the case study of image sharpening, which is required nowadays in digital cameras and mobile phones.  ...  A review of design techniques for system-level dynamic power management can be found in [1] . In addition, a survey on power-aware design techniques for real-time systems is given in [22] .  ... 
doi:10.1109/tvlsi.2006.878343 fatcat:2blfbpudnbf7zdhc67uele3fai

Execution modeling in self-aware FPGA-based architectures for efficient resource management

Alfonso Rodriguez, Juan Valverde, Cesar Castanares, Jorge Portilla, Eduardo de la Torre, Teresa Riesgo
2015 2015 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)  
Index Terms-Self-awareness, dynamic and partial reconfiguration, dynamic resource management, FPGAs.  ...  System self-awareness enables the use of strategies to enhance system performance and power optimization taking into account run-time metrics.  ...  This work was also partially supported by the Spanish Ministry of Economy and Competitiveness under the project REBECCA (Resilient EmBedded Electronic systems for Controlling Cities under Atypical situations  ... 
doi:10.1109/recosoc.2015.7238086 dblp:conf/recosoc/RodriguezVCPTR15 fatcat:f4dx46ekybanbfa2hiyf3hvkwa
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