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Energy characterization of filesystems for diskless embedded systems

Siddharth Choudhuri, Rabi N. Mahapatra
2004 Proceedings of the 41st annual conference on Design automation - DAC '04  
Energy consumption due to processor and flash for such devices is critical to embedded system design.  ...  The need for low power, small form-factor, secondary storage devices in embedded systems has led to the widespread use of flash memory.  ...  The design of embedded operating system can greatly affect the performance of the overall system both in terms of performance and energy consumption.  ... 
doi:10.1145/996566.996722 dblp:conf/dac/ChoudhuriM04 fatcat:ymqkh24w5zhtxof3xutj6hdmym

Automated Energy/Performance Macromodeling of Embedded Software

Anish Muttreja, Anand Raghunathan, Srivaths Ravi, Niraj K. Jha
2007 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
Efficient energy and performance estimation of embedded software is a critical part of any system-level design flow.  ...  Macromodeling involves pre-characterizing reusable software components to construct high-level models, which express the execution time or energy consumption of a sub-program as a function of suitable  ...  An analysis of the dynamic execution traces of embedded programs reveals that a large fraction of the time consumption arises from reused software components (including embedded operating systems, middleware  ... 
doi:10.1109/tcad.2006.883914 fatcat:mpinpzpmkfckzllh6znmsagrum

Automated energy/performance macromodeling of embedded software

Anish Muttreja, Anand Raghunathan, Srivaths Ravi, Niraj K. Jha
2004 Proceedings of the 41st annual conference on Design automation - DAC '04  
Efficient energy and performance estimation of embedded software is a critical part of any system-level design flow.  ...  Macromodeling involves pre-characterizing reusable software components to construct high-level models, which express the execution time or energy consumption of a sub-program as a function of suitable  ...  An analysis of the dynamic execution traces of embedded programs reveals that a large fraction of the time consumption arises from reused software components (including embedded operating systems, middleware  ... 
doi:10.1145/996566.996599 dblp:conf/dac/MuttrejaRRJ04 fatcat:qo32z7xozrdipjpr73czha3rau

Estimation of Power Consumption at Behavioral Modeling Level Using SystemC

Robertas Damaševičius, Vytautas Štuikys
2007 EURASIP Journal on Embedded Systems  
A successful embedded system design requires thorough domain analysis and design space exploration.  ...  Here, we present a framework for power estimation at the modeling level of a design using macromodels.  ...  The complexity of the modern embedded systems is a significant challenge for the creation and use of macromodels.  ... 
doi:10.1155/2007/68673 fatcat:6bomkmn3rnbcnapko2jikdmmhy

Estimation of Power Consumption at Behavioral Modeling Level Using SystemC

Robertas Damaševičius, Vytautas Štuikys
2007 EURASIP Journal on Embedded Systems  
A successful embedded system design requires thorough domain analysis and design space exploration.  ...  Here, we present a framework for power estimation at the modeling level of a design using macromodels.  ...  The complexity of the modern embedded systems is a significant challenge for the creation and use of macromodels.  ... 
doi:10.1186/1687-3963-2007-068673 fatcat:fnfcit4kcraudepudt5mlmmfgu

Hybrid simulation for embedded software energy estimation

Anish Muttreja, Anand Raghunathan, Srivaths Ravi, Niraj K. Jha
2005 Proceedings of the 42nd annual conference on Design automation - DAC '05  
Software energy estimation is a critical step in the design of energyefficient embedded systems.  ...  Previously developed techniques for software energy macromodeling are utilized to estimate energy consumption for natively executed sub-programs.  ...  INTRODUCTION The most widely used technique for embedded system energy estimation is to simulate the execution of embedded software on a model of the underlying hardware platform.  ... 
doi:10.1145/1065579.1065590 dblp:conf/dac/MuttrejaRRJ05 fatcat:qlwvzbdv5zdubgsozwzadqfy6e

Hybrid simulation for embedded software energy estimation

A. Muttreja, A. Raghunathan, S. Ravi, N.K. Jha
2005 Proceedings. 42nd Design Automation Conference, 2005.  
Software energy estimation is a critical step in the design of energyefficient embedded systems.  ...  Previously developed techniques for software energy macromodeling are utilized to estimate energy consumption for natively executed sub-programs.  ...  INTRODUCTION The most widely used technique for embedded system energy estimation is to simulate the execution of embedded software on a model of the underlying hardware platform.  ... 
doi:10.1109/dac.2005.245623 fatcat:lh4nxpeeong2xf6ox6wipujuza

Weighting Strategies for Passivity Enforcement Schemes

A. Ubolli, S. Grivet-Talocia
2007 2007 IEEE Electrical Performance of Electronic Packaging  
We present a general class of frequency-selective weighting schemes, allowing for a drastic accuracy improvement when embedded in passivity enforcement algorithms for linear lumped macromodels.  ...  The proposed technique minimizes the in-band model perturbation while achieving global passivity, even in the difficult case of large out-of-band passivity violations.  ...  During system operation, only one path is active, with the other paths being switched off in a sleep mode. The exampleFigure 2: Macromodel of a circuit block in a RF transceiver.  ... 
doi:10.1109/epep.2007.4387122 fatcat:acbsegluczf3zmin7fazgq3nri

CAPPS: A Framework for Power–Performance Tradeoffs in Bus-Matrix-Based On-Chip Communication Architecture Synthesis

Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi, Nikil Dutt
2010 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
First, we develop energy models for system-level exploration of bus matrix communication architectures.  ...  Experimental results show that our energy macromodels incur less than 5% average cycle energy error across 180-65 nm technology libraries.  ...  operating conditions.  ... 
doi:10.1109/tvlsi.2008.2009304 fatcat:b2t6nxn32je7ndgu6bucm24c6e

Efficient power co-estimation techniques for system-on-chip design

Marcello Lajolo, Anand Raghunathan, Sujit Dey
2000 Proceedings of the conference on Design, automation and test in Europe - DATE '00  
The acceleration techniques are energy caching, software power macromodeling, and statistical sampling.  ...  for control-intensive and reactive embedded systems.  ...  The user is allowed to specify the mapping of each process to hardware or embedded software, set Real-Time Operating System (RTOS) parameters such as scheduling policy and priorities, map the communication  ... 
doi:10.1145/343647.343691 fatcat:awtvgl3ojzgtfk2l5twpecdwwi

Parametric timing and power macromodels for high level simulation of low-swing interconnects

D. Bertozzi, L. Benini, B. Ricco
2002 Proceedings of the International Symposium on Low Power Electronics and Design  
These SPICE-derived power and timing macromodels transfer electrical-level information to the RTL simulation in an event-driven fashion, as transitions occur at the input of the interconnect driver.  ...  The impact of global on-chip interconnections on power consumption and speed of integrated circuits is becoming a serious concern.  ...  At the end of the VHDL simulation, a routine reports the total energy consumption associated with that line, as estimated from the embedded power macromodels during application runtime.  ... 
doi:10.1109/lpe.2002.146760 fatcat:ia5j7n3alnd27m3m7mju3yjhda

Parametric timing and power macromodels for high level simulation of low-swing interconnects

Davide Bertozzi, Luca Benini, Bruno Ricco'
2002 Proceedings of the 2002 international symposium on Low power electronics and design - ISLPED '02  
These SPICE-derived power and timing macromodels transfer electrical-level information to the RTL simulation in an event-driven fashion, as transitions occur at the input of the interconnect driver.  ...  The impact of global on-chip interconnections on power consumption and speed of integrated circuits is becoming a serious concern.  ...  At the end of the VHDL simulation, a routine reports the total energy consumption associated with that line, as estimated from the embedded power macromodels during application runtime.  ... 
doi:10.1145/566408.566488 dblp:conf/islped/BertozziBR02 fatcat:umv3uz7vizf35pk22mblszap4q

Parametric timing and power macromodels for high level simulation of low-swing interconnects

Davide Bertozzi, Luca Benini, Bruno Ricco'
2002 Proceedings of the 2002 international symposium on Low power electronics and design - ISLPED '02  
These SPICE-derived power and timing macromodels transfer electrical-level information to the RTL simulation in an event-driven fashion, as transitions occur at the input of the interconnect driver.  ...  The impact of global on-chip interconnections on power consumption and speed of integrated circuits is becoming a serious concern.  ...  At the end of the VHDL simulation, a routine reports the total energy consumption associated with that line, as estimated from the embedded power macromodels during application runtime.  ... 
doi:10.1145/566487.566488 fatcat:r2kxgj2e5nbohlmyy6wq5bhgjy

An energy-aware framework for dynamic software management in mobile computing systems

Yunsi Fei, Lin Zhong, Niraj K. Jha
2008 ACM Transactions on Embedded Computing Systems  
We have designed and implemented a DSOM module in user space, independent of the operating system (OS), which explores quality-of-service (QoS) adaptation to reduce system energy and employs a priority-based  ...  Software energy macromodels for mobile applications are employed to predict energy demand at each QoS level, so that the DSOM module is able to select the best possible trade-off between energy conservation  ...  Johan Pouwelse from Delft University of Technology, The Netherlands, for his kind offer of the source code for the client-server communication mechanism.  ... 
doi:10.1145/1347375.1347380 fatcat:r5mavm6to5ah3k7f7l3gxr7nay

Accurate Modeling of the Delay and Energy Overhead of Dynamic Voltage and Frequency Scaling in Modern Microprocessors

Sangyoung Park, Jaehyun Park, Donghwa Shin, Yanzhi Wang, Qing Xie, M. Pedram, Naehyuck Chang
2013 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
We also present DVFS transition overhead macromodel for use by highlevel DVFS schedulers. Index Terms-Delay and energy overhead, dynamic voltage and frequency scaling (DVFS), macromodel.  ...  Incorrect and/or inaccurate DVFS transition overhead models prevent one from determining the precise break-even time and thus forfeit some of the energy saving that is ideally achievable.  ...  The energy and delay overhead is comparable to the scheduling overhead and context switching overhead of operating systems, which take about 0.4% to 1.6% in general purpose operating systems [32] .  ... 
doi:10.1109/tcad.2012.2235126 fatcat:p5o4mwshwzbirn3nw5b3bip6gq
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