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Energy consumption analysis of software polar decoders on low power processors

Adrien Cassagne, Olivier Aumage, Camille Leroux, Denis Barthou, Bertrand Le Gal
2016 2016 24th European Signal Processing Conference (EUSIPCO)  
A special emphasis is given on the energy consumption on low power embedded processors for software defined radio (SDR) systems.  ...  This fully generic SC decoder is used to perform comparisons of the different configurations in terms of throughput, latency and energy consumption.  ...  ACKNOWLEDGEMENTS This study has been carried out with financial support from the French State, managed by the French National Research Agency (ANR) in the frame of the "Investments for the future" Programme  ... 
doi:10.1109/eusipco.2016.7760327 dblp:conf/eusipco/CassagneALBG16 fatcat:ozz4wpazofftligx4ny6dkbbta

Power Analysis and Optimization Techniques for Energy Efficient Computer Systems [chapter]

Wissam Chedid, Chansu Yu, Ben Lee
2005 Advances in Computers  
Reducing power consumption has become a major challenge in the design and operation of today's computer systems.  ...  On the other hand, dynamic power management techniques are applied during run-time, and are used to monitor system workload and adapt the system's behavior dynamically to save energy.  ...  CPU-Level Energy Models Power consumed by the CPU is a major part of the total power consumption of a computer system and thus has been the main target of power consumption analysis [9, 10, 49, 65, 70  ... 
doi:10.1016/s0065-2458(04)63004-x fatcat:qqgqxgtgerh3dikj3khtzmysqe

Toward High-Performance Implementation of 5G SCMA Algorithms

Alireza Ghaffari, Mathieu Leonardon, Adrien Cassagne, Camille Leroux, Yvon Savaria
2019 IEEE Access  
The effects of forwarding error corrections such as polar, turbo, and LDPC codes, as well as different ways of accessing memory and improving power efficiency of modified MPAs are investigated.  ...  The results show that the throughput of an SCMA decoder can be increased by 3.1 to 21 times when compared to the original MPA on different computing platforms using the suggested improvements.  ...  Power consumption and energy used per decoded bit is lower on the ARM platform than on the Intel processors.  ... 
doi:10.1109/access.2019.2891597 fatcat:aqaqk3asurcjle6wixosw3nurq

Video Application Power Consumption on Low-Power Platforms [chapter]

Shahriar Akramullah
2014 Digital Video Concepts, Methods, and Metrics  
Video Application Power Consumption on Low-Power Platforms Some mobile applications, particularly those on low-power devices, unjustifiably use a lot of energy, causing unnecessary strain on the device  ...  The chapter starts with a discussion of the power-consumption priorities of low-power devices. Then, it presents typical media usages on these low-power devices.  ... 
doi:10.1007/978-1-4302-6713-3_7 fatcat:q77fa52rpjfjnbktrfkuztg6pu

Design and Architectures for Signal and Image Processing

Markus Rupp, Ahmet T. Erdogan, Bertrand Granado
2009 EURASIP Journal on Embedded Systems  
design flow including system level design and hardware/software codesign, RTOS, system modeling and rapid prototyping, system synthesis, design verification, and performance analysis and estimation.  ...  This Special Issue of the EURASIP Journal of embedded systems is intended to present innovative methods, tools, design methodologies, and frameworks for algorithm-architecture matching approach in the  ...  The energy model covers the per cycle energy consumption of the processor. The leakage energy statistics of the processor in the data sheet covers the cache and all peripherals of the chip.  ... 
doi:10.1155/2009/674308 fatcat:l2npgnxwavb3xgmedjdzwklv6y

Survey of Turbo, LDPC, and Polar Decoder ASIC Implementations

Shuai Shao, Peter Hailes, Tsang-Yi Wang, Jwo-Yuh Wu, Robert G. Maunder, Bashir M. Al-Hashimi, Lajos Hanzo
2019 IEEE Communications Surveys and Tutorials  
We show that the overall implementation complexity of turbo, LDPC and polar decoders depends on numerous other factors beyond their computational complexity.  ...  This paper summarises the factors that influenced this debate, with a particular focus on the Application Specific Integrated Circuit (ASIC) implementation of the decoders of these three codes.  ...  previous publications. 22 SURVEY AND COMPARISON OF TURBO, LDPC AND POLAR DECODER ASIC IMPLEMENTATIONS • Provide the power-or energy-consumption for a variety of block lengths and coding rates. • Quantify  ... 
doi:10.1109/comst.2019.2893851 fatcat:rv2p4a4ol5c2dneveopxsxwqqq

Evaluating the Efficiency of Physical and Cryptographic Security Solutions for Quantum Immune IoT

2018 Cryptography  
In particular, we consider NewHope and Frodo key exchange algorithms as well as novel physical layer secrecy coding approach that is based on polar codes.  ...  In this study, we explore and compare the feasibility and energy efficiency of selected cryptographic layer and physical layer approaches by applying an evaluation approach that is based on simulation  ...  Sami Lehtonen participated in the design of the work and supported the writing. Conflicts of Interest: The authors declare no conflict of interest.  ... 
doi:10.3390/cryptography2010005 fatcat:dngahpmopbgtxonuawmwiiiuky

A dynamic voltage scaled microprocessor system

T.D. Burd, T.A. Pering, A.J. Stratakos, R.W. Brodersen
2000 IEEE Journal of Solid-State Circuits  
This provides a throughput range of 6-85 MIPS with an energy consumption of 0.54-5.6 mW/MIP yielding an effective energy efficiency as high as 26 200 MIPS/W.  ...  presented in which the supply voltage and clock frequency can be dynamically varied so that the system can deliver high throughput when required while significantly extending battery life during the low  ...  more expensive in area and/or power (e.g., memory address decoder).  ... 
doi:10.1109/4.881202 fatcat:jfo3dxme25ckxegrlmv5chk5py

An Efficient, Portable and Generic Library for Successive Cancellation Decoding of Polar Codes [chapter]

Adrien Cassagne, Bertrand Le Gal, Camille Leroux, Olivier Aumage, Denis Barthou
2016 Lecture Notes in Computer Science  
As processors are becoming increasingly powerful and energy efficient, there is now a strong desire to perform this processing in software to reduce production costs and time to market.  ...  The recently introduced family of Successive Cancellation decoders for Polar codes has been shown in several research works to efficiently leverage the ubiquitous SIMD units in modern CPUs, while offering  ...  Acknowledgements This study has been carried out with financial support from the French State, managed by the French National Research Agency (ANR) in the frame of the "Investments for the future" Programme  ... 
doi:10.1007/978-3-319-29778-1_19 fatcat:6agthwrp7jeanlfu46tdzlndeq

Software Defined Radio – A High Performance Embedded Challenge [chapter]

Hyunseok Lee, Yuan Lin, Yoav Harel, Mark Woh, Scott Mahlke, Trevor Mudge, Krisztian Flautner
2005 Lecture Notes in Computer Science  
The computation demands and power limitations of approximately 60 Gops and 100∼300 mW, place extremely challenging goals on such a system.  ...  illustrate one of the protocols that would need to be accommodated in a programmable platform for software defined radio.  ...  The advantages of cache free memories are low power consumption and a deterministic operation time.  ... 
doi:10.1007/11587514_3 fatcat:y3zzuozqezdnjgb4lnfzz6l2za

Hardware-Software Codesign of Wireless Transceivers on Zynq Heterogeneous Systems

Benjamin Drozdenko, Matthew Zimmermann, Tuan Dao, Kaushik Chowdhury, Miriam Leeser
2017 IEEE Transactions on Emerging Topics in Computing  
As standards adapt to keep pace with hardware availability and user needs, the trend points towards systems that achieve high data rates with low energy consumption.  ...  We validate, profile, and analyze the models using metrics including frame time, resource utilization, and energy consumption.  ...  their donation of MATLAB software licenses and generous research funding.  ... 
doi:10.1109/tetc.2017.2651054 fatcat:7vzusjhz7zdv7lg7cgfnbpo5ku

Experimental Results and Performance Analysis of a 1 × 2 × 1 UHF MIMO Passive RFID System

Helio Augusto Muzamane, Hsin-Chin Liu
2021 Sensors  
The system modeling and theoretical performance analysis of these systems have been well investigated and revealed in many studies, yet the system prototype and the corresponding experimental results are  ...  In this study, measurements of a 1 × 2 × 1 UHF passive RFID system, including a MIMO UHF passive RFID tag prototype and its corresponding software-defined radio-based reader, taken in a microwave anechoic  ...  Digital Section and Power Consumption Considering the design of passive tags, power consumption minimization is always required.  ... 
doi:10.3390/s21186308 pmid:34577517 fatcat:rzac7jsa3ndqzg2lql275i7tuy

A Novel Byte-Substitution Architecture for the AES Cryptosystem

Fakir Sharif Hossain, Md. Liakot Ali, Ian McLoughlin
2015 PLoS ONE  
The performance of Advanced Encryption Standard (AES) mainly depends on speed, area and power. The S-box represents an important factor that affects the performance of AES on each of these factors.  ...  This paper proposes a new S-box architecture, defining it as ultra low power, robustly parallel and highly efficient in terms of area.  ...  Acknowledgments This material is based upon work supported by the Institute of Information and Communication Technology under Bangladesh University of Engineering and Technology.  ... 
doi:10.1371/journal.pone.0138457 pmid:26491967 pmcid:PMC4619588 fatcat:meb4skql7rewrbgfifsn3sujei

Design for Smaller, Lighter and Faster ICT Products: Technical Expertise, Infrastructures and Processes

Omer Aydin, Orhan Uçar
2017 Advances in Science, Technology and Engineering Systems  
As time goes by, new generation products designed by engineers are always expected to be smaller, lighter and faster, due to the increasing global competition and the application of hardware and software  ...  in every area of our lives.  ...  Energy Efficiency Total electric consumption of the world has reached 20567 TWh (Tera Watt hour) in 2015 [48] . ICT sector share is %4.6 of total power consumption [49] .  ... 
doi:10.25046/aj0203141 fatcat:yjlh7ixkjrhabjfnoppwd4tzbi

Complexity-Adjustable SC Decoding of Polar Codes for Energy Consumption Reduction [article]

Haotian Zheng, Bin Chen, Luis F. Abanto-Leon, Zizheng Cao, Ton Koonen
2019 arXiv   pre-print
Based on the fact that most mobile devices operate in environments with stringent energy budget to support diverse applications, the proposed scheme is a promising candidate for meeting requirements of  ...  In addition, a logarithmic likelihood ratio (LLR)-threshold based path extension scheme is designed to further reduce the memory consumption of stack decoding.  ...  Driven by the low decoding of polar codes’.  ... 
arXiv:1912.07649v1 fatcat:7axwp3yvana3hde7kmm7xq42xm
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