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Introduction to partial time composability for COTS multicores

Gabriel Fernandez, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Luca Fossati, Marco Zulianello, Francisco J. Cazorla
2015 Proceedings of the 30th Annual ACM Symposium on Applied Computing - SAC '15  
This stems from the fact that inter-task interference effects in a multicore are much more intricate in nature than what can be compositionally captured in response time analysis by widening the tasks'  ...  In singlecore processors timing analysis involves a step of Execution Time Analysis at task level that yields an Execution Time Bound (ETB) for the task, and one of schedulability analysis, where the scheduling  ...  , compositionally, during the Response Time Analysis (RTA) stage.  ... 
doi:10.1145/2695664.2695954 dblp:conf/sac/FernandezAQVFZC15 fatcat:l2otp33dc5cuph7zdqiifeupy4

Guest editorial: Special Issue on Predictable multi-core systems

Robert I. Davis
2020 Real-time systems  
Timing Compositionality is a key property required by much of the research on timing analysis and on integrated timing and schedulability analysis for multi-core platforms, and indeed by WCET analysis  ...  Three concepts that are useful in a discussion of the real-time behaviour of multicore systems are Timing Composability, Timing Compositionality, and Timing Predictability.  ...  Timing Compositionality is a key property required by much of the research on timing analysis and on integrated timing and schedulability analysis for multi-core platforms, and indeed by WCET analysis  ... 
doi:10.1007/s11241-020-09348-x fatcat:4tiy62twjvfozgehybg3pqatlu

Support for the logical execution time model on a time-predictable multicore processor

Florian Kluge, Martin Schoeberl, Theo Ungerer
2016 ACM SIGBED Review  
The logical execution time (LET) model increases the compositionality of real-time task sets. Removal or addition of tasks does not influence the communication behavior of other tasks.  ...  In this work, we extend a multicore operating system running on a timepredictable multicore processor to support the LET model.  ...  The NoC response time analysis can be combined with task schedulability analysis to produce an end-to-end schedulability test for multicores [16] .  ... 
doi:10.1145/3015037.3015047 fatcat:65x7ewyknjello7mmd7khnlmgy

Towards compositionality in execution time analysis

Sebastian Hahn, Jan Reineke, Reinhard Wilhelm
2015 ACM SIGBED Review  
For hard real-time systems, timeliness of operations has to be guaranteed. Static timing analysis is therefore employed to compute upper bounds on the execution times of a program.  ...  For current processors, timing analysis is a complex task mainly due to interdependencies of the processors' features that affect the overall timing behaviour.  ...  Acknowledgements We thank the anonymous reviewers for their comments.  ... 
doi:10.1145/2752801.2752805 fatcat:xbcfcm4uvbcyth3bb3azkpah5q

Contention in Multicore Hardware Shared Resources: Understanding of the State of the Art

Gabriel Fernandez, Jaume Abella, Eduardo Quiñones, Christine Rochange, Tullio Vardanega, Francisco J. Cazorla, Marc Herbstritt
2014 Worst-Case Execution Time Analysis  
The relevance of this problem has been accentuated with the arrival of multicore processors.  ...  This sparseness makes it difficult for any reader to form a coherent picture of the problem and solution space.  ...  The research leading to this work has received funding from: COST Action IC1202, Timing Analysis On Code-Level (TACLe); and the parMERASA and PROX-IMA grant agreements (respectively no. 287519 and 611085  ... 
doi:10.4230/oasics.wcet.2014.31 dblp:conf/wcet/FernandezAQRVC14 fatcat:xfhpnrtmf5a65ek3upravfesca

The CONCERTO Methodology for Model-Based Development of Avionics Software [chapter]

Andrea Baldovin, Alessandro Zovi, Geoffrey Nelissen, Stefano Puri
2015 Lecture Notes in Computer Science  
Moreover, the increasing demand for computational power and the consequent interest in multicore HW architectures complicates system deployment.  ...  Moreover, the increasing demand for computational power and the consequent interest in multicore HW architectures complicates system deployment.For these reasons, appropriate methodologies and tools need  ...  The authors are grateful to the people at Barcelona Supercomputing Center for their supply of PROARTIS_sim.  ... 
doi:10.1007/978-3-319-19584-1_9 fatcat:eqzcds5hdfbwvgvennlg6wzawm

WCET analysis considering contention on memory bus in COTS-based multicores

Dakshina Dasari, Vincent Nelis, Bjorn Andersson
2011 ETFA2011  
Providing real-time guarantees at design-time is a pre-requisite to deploy real-time systems on these multicores.  ...  Providing realtime guarantees at design-time is a pre-requisite to deploy real-time systems on these multicores.  ...  Unfortunately, COTSbased multicores are designed to increase the average-case performance and not towards timing predictability or timing compositionality.  ... 
doi:10.1109/etfa.2011.6059176 dblp:conf/etfa/DasariNA11 fatcat:uyv4afmirjfupeybyerdbzw4h4

Seeking Time-Composable Partitions of Tasks for COTS Multicore Processors

Gabriel Fernandez, Jaume Abella, Eduardo Quinones, Luca Fossati, Marco Zulianello, Tullio Vardanega, Francisco J. Cazorla
2015 2015 IEEE 18th International Symposium on Real-Time Distributed Computing  
The timing verification of real-time singlecore systems involves a timing analysis step that yields an Execution Time Bound (ETB) for each task, followed by a schedulability analysis step, where the scheduling  ...  The much-sought property of time composability [28], [15] , when transposed to a multicore processor, stipulates that the timing behavior of an individual task is not affected by the activity of its co-runners  ...  Analysis On Code-Level (TACLe).  ... 
doi:10.1109/isorc.2015.43 dblp:conf/isorc/FernandezAQFZVC15 fatcat:zbxdavl4nnarze5frhrkyckf7e

Seeking Time-Composable Partitions Of Tasks For Cots Multicore Processors

Gabriel Fernandez, Jaume Abella, Eduardo Qui˜nones, Luca Fossati, Marco Zulianello, Tullio Vardanega, Francisco J. Cazorla
2015 Zenodo  
The timing verification of real-time single core systems involves a timing analysis step that yields an Execution Time Bound (ETB) for each task, followed by a schedulability analysis step, where the scheduling  ...  To help loosen this knot we present an approach that acknowledges different flavors of time compos ability, examining in detail the variant intended for partitioned scheduling, which we evaluate on two  ...  Analysis On Code-Level (TACLe).  ... 
doi:10.5281/zenodo.55525 fatcat:6xsqiwfjjjhvdjhxzskj7qkuby

Toward Streaming Synapse Detection with Compositional ConvNets [article]

Shibani Santurkar, David Budden, Alexander Matveev, Heather Berlin, Hayk Saribekyan, Yaron Meirovitch, Nir Shavit
2017 arXiv   pre-print
Recent studies have successfully demonstrated the use of convolutional neural networks (ConvNets) for segmenting cell membranes to individuate neurons.  ...  Instead of requiring a deep network to learn all natural combinations of this compositionality, we train lighter networks to model the simpler marginal distributions of membranes, clefts and vesicles from  ...  Such compositionality is also believed to be an intrinsic mechanism for object recognition in the visual cortex [41, 42] .  ... 
arXiv:1702.07386v1 fatcat:l3q6fkq2vrbsxkp3xvk7wqgyg4

WCET and Mixed-Criticality: What does Confidence in WCET Estimations Depend Upon?

Sebastian Altmeyer, Björn Lisper, Claire Maiza, Jan Reineke, Christine Rochange, Marc Herbstritt
2015 Worst-Case Execution Time Analysis  
One aspect of correctness is timing. Confidence in worst-case execution time (WCET) estimates depends on the process by which they have been obtained.  ...  In this paper, we refine this view by exploring sources of doubt in the correctness of both static and measurement-based WCET analysis.  ...  This paper has been initiated in the Dagstuhl Seminar 15121 -Mixed Criticality on Multicore/Manycore Platforms.  ... 
doi:10.4230/oasics.wcet.2015.65 dblp:conf/wcet/AltmeyerLMRR15 fatcat:cj4y66ubdrfdzkcmy3livaae7a

Challenges for Timing Analysis of Multi-Core Architectures

Jan Reineke
2017 Electronic Proceedings in Theoretical Computer Science  
time of a program under analysis, it is irrelevant for timing analysis.  ...  Design How to design microarchitectures that enable precise & efficient WCET analysis?  ...  Temporal Isolation ¢ Temporal isolation between cores = timing of program on one core is independent of activity on other cores ¢ Formally: ¢ Can be exploited in WCET analysis: e, cache (P ) = max p  ... 
doi:10.4204/eptcs.248.3 fatcat:kqwjoviw7jhe7ixjkxmj2p2hbq

Compositional Schedulability Analysis of Multicore Modular Avionic Architectures

Jalil Boudjadar
2018 Journal of Computers  
Boudjadar's research aims to develop advanced architecture description and analysis techniques for embedded real-time systems.  ...  In this paper, we introduce a model-based framework for fine grained modeling and formal schedulability analysis of multicore avionic (IMA-driven) systems with shared memories.  ...  Modeling of Multicore Avionic Architectures This section describes the architecture and behavior of the modular avionic systems we consider for analysis.  ... 
doi:10.17706/jcp.13.10.1202-1215 fatcat:o3w3usmksnajddhz5nb5bm2ugu

Compositional analysis for the Multi-Resource Server

Rafia Inam, Moris Behnam, Thomas Nolte, Mikael Sjodin
2015 2015 IEEE 20th Conference on Emerging Technologies & Factory Automation (ETFA)  
The Multi-Resource Server (MRS) technique has been proposed to enable predictable execution of memory intensive real-time applications on COTS multi-core platforms.  ...  In this paper we present a complete composable local and global schedulability analysis for the Multi-Resource Server technique.  ...  MRS enables predictable execution of real-time applications on multicore platforms through resource reservation approaches in the context of CPU-bandwidth reservation and memory-bus bandwidth reservation  ... 
doi:10.1109/etfa.2015.7301431 dblp:conf/etfa/InamBNS15 fatcat:j4myxph3zfcbreop6dwp37q5fm

Computing Safe Contention Bounds for Multicore Resources with Round-Robin and FIFO Arbitration

Gabriel Fernandez, Javier Jalle, Jaume Abella, Eduardo Quinones, Tullio Vardanega, Francisco J. Cazorla
2017 IEEE transactions on computers  
However, using ubdm to compute worst-case execution time values for programs running on COTS multicore processors requires qualification on the soundness of the result.  ...  Most of those studies seek to derive a tight and sound upper-bound for the worst-case delay with which a processor resource may serve an incoming request, when its access is arbitrated using time-predictable  ...  Analysis On Code-Level (TACLe).  ... 
doi:10.1109/tc.2016.2616307 fatcat:brz2wqgujzaj3jg6p53umt3tdy
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