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Architectural considerations for CPU and network interface integration

C.D. Cranor, R. Gopalakrishnan, P.Z. Onufryk
2000 IEEE Micro  
The conventional approach for designing communications processors is to start with a standard CPU core such as MIPS or ARM, add to this several network interfaces, and tie the whole system together with  ...  The integration of processing and networking into the same device offers an opportunity to rethink the way the CPU and network interface interact.  ...  In addition to transferring data, high performance, descriptor based, DMA controllers also transfer control and status information between DMA descriptors in memory and a network interface.  ... 
doi:10.1109/40.820048 fatcat:uilusghauvgudfb5gejpeckxki

An overview of the AURORA gigabit testbed

D.D. Clark, B.S. Davie, D.J. Farber, I.S. Gopal, B.K. Kadaba, W.D. Sincoskie, J.M. Smith, D.L. Tennenhouse
1992 [Proceedings] IEEE INFOCOM '92: The Conference on Computer Communications  
The emphasis of the Aurora testbed, distinct from the other four testbeds, is research into the supporting technologies for gigabit networking.  ...  Aurora is one of ve U.S. testbeds charged with exploring applications of, and technologies necessary for, networks operating at gigabit per second or higher bandwidths.  ...  The Sunshine \star" Sunshine will employ ATM interfaces in a star topology. The ATM cells will travel between hosts and switches over SONET STS-12 or STS-3c point-to-point links.  ... 
doi:10.1109/infcom.1992.263450 dblp:conf/infocom/ClarkTFSDSGK92 fatcat:enkq4larrnep7p73jtkhst33g4

The AURORA gigabit testbed

David D. Clark, Bruce S. Davie, David J. Farber, Inder S. Gopal, Bharath K. Kadaba, W. David Sincoskie, Jonathan M. Smith, David L. Tennenhouse
1993 Computer networks and ISDN systems  
For high-speed networks, RPC makes poor use of the available bandwidth. An alternative network abstraction is one in which the network is modeled as shared virtual memory.  ...  AURORA has been charged with research into networking technologies that will underpin future high-speed networks.  ...  The Sunshine "star" Sunshine will employ ATM interfaces in a star topology. The ATM cells will travel between hosts and switches over SONET STS-12 or STS-3c point-to-point links.  ... 
doi:10.1016/0169-7552(93)90056-a fatcat:6mc6vxelhnhphc4nsnkliejany

Networking and Performance Issues of Personal Mobile Communications

H. Ahmadi, R. Jain, P.J. Kuehn, V.O.K. Li
1997 IEEE Journal on Selected Areas in Communications  
On network architecture, Cheng and Holtzman propose a wireless ATM network architecture and related protocol design in their paper, "Wireless Intelligent ATM Network and Protocol Design for Future Personal  ...  The model is useful for determining the optimal number of logical CDPD channels for a given traffic setting.  ... 
doi:10.1109/jsac.1997.622904 fatcat:hsb2ymugcjcknlzlbvlsx3lyqm

Supercomputer Supernet (SSN): a high-speed electro-optic campus and metropolitan network

Nicholas Bambos, Joseph A. Bannister, Larry A. Bergman, Jason Cong, Eli Gafni, Mario Gerla, Leonard Kleinrock, Steve Monacos, Po-Chi Hu, B. Kannan, Bruce Kwan, Prasath Palnati (+3 others)
1996 Optical Interconnects in Broadband Switching Architectures  
The firsi networking level of The iwo-level SSN archiiecure is electronic and consists of crossbar meshes locally interconnecting workstations, supercomputers, peripheral devices and mass memory.  ...  The neiwork provides very high-speed integrated services, supporling connedion oriented, guaranteed bandwidth fraffic as well as daagram Iraffic.  ...  In SSN, for example, the high-speed electronic network provides a low-latency, high-bandwidth datagram service employing wormhole routing and backpressure flow control.  ... 
doi:10.1117/12.235857 fatcat:qji7cuctm5etpi7nxqp2no2x3q

Protocol architecture for multimedia applications over ATM networks

D.D. Kandlur, D. Saha, M. Willebeek-LeMair
1996 IEEE Journal on Selected Areas in Communications  
Although a considerable e ort is underway to tune these protocols for ATM networks, we believe that a new ATM speci c protocol stack i s e s s e n tial to e ectively exploit all the bene ts of ATM.  ...  The performance impact of the new protocol architecture is experimentally demonstrated on a video conferencing testbed built around IBM RS/6000s equipped with prototype hardware for video/audio processing  ...  Acknowledgement The authors would like to thank Tsipora Barzilai and Yakov R e k h ter for many useful discussions.  ... 
doi:10.1109/49.536484 fatcat:azluk6cqrrduxjo52vebp2woyi

The Design and Performance of a Pluggable Protocols Framework for Corba Middleware [chapter]

Fred Kuhns, Carlos O'Ryan, Douglas C. Schmidt, Ossama Othman, Jeff Parsons
2000 IFIP Advances in Information and Communication Technology  
Second, we describe how TAO, our high-performance, real-time COREAcompliant ORB, addresses these challenges in its pluggable protocols framework.  ...  This paper provides three contributions to research on pluggable protocols frameworks for performance-sensitive communication middleware.  ...  APIC is a high-performance ATM interface card that supports standard ATM host interface features, such as AAL5 (SAR).  ... 
doi:10.1007/978-0-387-35580-1_7 fatcat:lrzcfi2pqvav3exushe7iotvty

Protocol architecture for multimedia applications over ATM networks

Dilip D. Kandlur, Debanjan Saha, M. Willebeek-LeMair
1995 Computer communication review  
Although a considerable e ort is underway to tune these protocols for ATM networks, we believe that a new ATM speci c protocol stack i s e s s e n tial to e ectively exploit all the bene ts of ATM.  ...  The performance impact of the new protocol architecture is experimentally demonstrated on a video conferencing testbed built around IBM RS/6000s equipped with prototype hardware for video/audio processing  ...  Acknowledgement The authors would like to thank Tsipora Barzilai and Yakov R e k h ter for many useful discussions.  ... 
doi:10.1145/214299.214301 fatcat:7mhkkgzawrcjxbaqk73zcxpjau

Cost effectiveness of an adaptable computing cluster

Keith D. Underwood, Ron R. Sass, Walter B. Ligon
2001 Proceedings of the 2001 ACM/IEEE conference on Supercomputing (CDROM) - Supercomputing '01  
This paper presents the cost implications of an architectural extension that adds reconfigurable computing to the network interface of Beowulf clusters.  ...  With a focus on commodity PC systems, Beowulf clusters traditionally lack the cutting edge network architectures, memory subsystems, and processor technologies found in their more expensive supercomputer  ...  [15] seeks to employ reconfigurable computing in a high-performance parallel computing environment.  ... 
doi:10.1145/582034.582088 dblp:conf/sc/UnderwoodSL01 fatcat:pn5lgbkakrhlplldvkrzswtn7y

Experiences with a high-speed network adaptor

Peter Druschel, Larry L. Peterson, Bruce S. Davie
1994 Computer communication review  
It first identifies the problems we encountered while programming OSIRIS and optimizing network performance, and outlines how we either addressed them in the software, or had to modify the hardware.  ...  network data to application programs.  ...  Acknowledgements Special thanks to David Mosberger for porting the z-kernel to the DEC Alphas.  ... 
doi:10.1145/190809.190315 fatcat:y5vwsm5lmfgpdesiqamoxbzym4

Experiences with a high-speed network adaptor

Peter Druschel, Larry L. Peterson, Bruce S. Davie
1994 Proceedings of the conference on Communications architectures, protocols and applications - SIGCOMM '94  
It first identifies the problems we encountered while programming OSIRIS and optimizing network performance, and outlines how we either addressed them in the software, or had to modify the hardware.  ...  network data to application programs.  ...  Acknowledgements Special thanks to David Mosberger for porting the z-kernel to the DEC Alphas.  ... 
doi:10.1145/190314.190315 dblp:conf/sigcomm/DruschelPD94 fatcat:mt6zke5bx5bbxcpyvjkrpm3xkm

A novel network processor for security applications in high-speed data networks

Kyriakos G. Vlachos
2003 Bell Labs technical journal  
Using microcode profiling and simulation, we give performance results for a stateful-inspection firewall application with network address translation (NAT) support.  ...  In this way, significant performance enhancements can be achieved, such as making transport control protocol (TCP) and Internet protocol (IP) data transactions secure, and protecting and separating virtual  ...  Acknowledgments This work was performed within the framework of the PRO3 project, which is partially funded by the IST Program of the European Community.  ... 
doi:10.1002/bltj.10058 fatcat:y635livrurahxhedyfqc47hhke

Design of a high-performance ATM firewall

Jun Xu, Mukesh Singhal
1999 ACM Transactions on Privacy and Security  
In this paper we present the hardware design of a high-speed ATM firewall that does not require the termination of an end-to-end connection in the middle.  ...  Compared with the traditional firewalls, this ATM firewall performs exactly the same packet-level filtering without compromising the performance and has the same "look and feel" by sitting at the chokepoint  ...  ACKNOWLEDGMENTS We thank Ravi Sandhu, the editor-in-chief of ACM TISSEC, and William Cheswick, the shepherd for the conference version of the paper, and the anonymous referees for their constructive comments  ... 
doi:10.1145/322510.322520 fatcat:leyg4uucs5cm5og32fl3ia55qu

Context-agile encryption for high speed communication networks

Lyndon G. Pierson, Edward L. Witzke, Mark O. Bean, Gerry J. Trombley
1999 Computer communication review  
This paper discusses context-agile hardware for end-to-end encryption systems designed for use in high speed communications networks, such as those employing Asynchronous Transfer Mode (ATM) technology  ...  High-speed network resources are also often shared resources. Indeed, each session, through a common network interface, may require separate keys.  ...  Acknowledgements The work described in this paper was a joint effort performed by Sandia National Laboratories  ... 
doi:10.1145/505754.505757 fatcat:l6q5mu44mfb4lankrqkmq2lvmi

Parallel simulation techniques for large-scale networks

S. Bhatt, R. Fujimoto, A. Ogielski, K. Perumalla
1998 IEEE Communications Magazine  
Due to performance limitations of the majority of simulators, usually network simulations have been done for rather small network models and for short time scales.  ...  of network simulation.  ...  For the network sizes and time scales of interest, high-performance parallel and distributed simulation engines are essential.  ... 
doi:10.1109/35.707816 fatcat:gvugsjidurdprf4dwsio4pokd4
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