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Embedded Systems Design and Verification: Reuse Oriented Prototyping Methodologies [chapter]

S. Raimbault, G. Sassatelli, G. Cambon, M. Robert, S. Pillement, L. Torres
2000 IFIP Advances in Information and Communication Technology  
The verification is thus achieved through high-speed emulation and prototyping technologies. The scope of this paper is to present these new methodologies.  ...  However, while design reuse solves many design problems, it causes increased verification problems.  ...  TRENDS FOR PROTOTYPING METHODOLOGIES First, it allows providing the software team with more and more rapid and accurate proto types.  ... 
doi:10.1007/978-0-387-35498-9_36 fatcat:77w44aiehvdipmva52vgobsdpm

Design and Verification Environment for High-Performance Video-Based Embedded Systems [chapter]

Michael Mefenza, Franck Yonga, Christophe Bobda
2014 Distributed Embedded Smart Cameras  
In this dissertation, a method and a tool to enable design and verification of computation demanding embedded vision-based systems is presented.  ...  Starting with an executable specification in OpenCV, we provide subsequent refinements and verification down to a system-on-chip prototype into an FPGA-Based smart camera.  ...  In chapter III, our design methodology for rapid prototyping of embedded video applications is presented and the verification flow is described in chapter IV.  ... 
doi:10.1007/978-1-4614-7705-1_4 fatcat:wx73qh32mrekfg2poxusgkfwya

SCADE: Synchronous Design and Validation of Embedded Control Software [chapter]

Gérard Berry
2007 Next Generation Design and Verification Methodologies for Distributed Embedded Control Systems  
We describe the SCADE synchronous approach to modelbased embedded software design, validation, and implementation for avionics, automotive, railway, and industry applications.  ...  The SCADE tool has support for visual animation, test-suite coverage analysis, and formal verification.  ...  Acknowledgements: the author thanks the various people involved in the design, development, and usage of SCADE: P. Caspi and N. Halbwachs who created Lustre, J-L. Bergerand and E.  ... 
doi:10.1007/978-1-4020-6254-4_2 fatcat:r5krrlpycbaltlyexzhvzjem2u

Design, synthesis and verification of a smart imaging core using SystemC

Wido Kruijtzer, Victor Reyes, Winfried Gehrke
2005 Design automation for embedded systems  
A SystemC-based design flow is applied, comprising the design, synthesis and verification and synthesis of the two coprocessors, as well as the development and integration of the embedded software on the  ...  This virtual prototype is beneficially used during the embedded software development phase.  ...  Acknowledgments We like to thank Bruno Steux fromÉcole des Mines de Paris, Thomas Hinz from Philips Semiconductors Hamburg, Jörn Jachalsky from University of Hannover, Pablo Santos from University of Las Palmas GC and  ... 
doi:10.1007/s10617-006-0069-7 fatcat:77ro2kkrdfcgxf4hjf76ppq6cu

Modeling, Verification, and Testing Using Timed and Hybrid Automata [chapter]

Stavros Tripakis, Thao Dang
2009 Model-Based Design for Embedded Systems  
We hope that our overview will motivate embedded system designers to use these models in their applications, and that they will find them useful.  ...  Analysis of Real-time and Embedded Systems) profile for UML2.  ... 
doi:10.1201/9781420067859-c13 fatcat:ipdmb52ph5bjxir65x527fqj2u

A DESIGN FOR VERIFICATION APPROACH USING AN EMBEDDING OF PSL IN AsmL

AMJAD GAWANMEH, SOFIÈNE TAHAR, HAJA MOINUDEEN, ALI HABIBI
2007 Journal of Circuits, Systems and Computers  
the model checking of large systems at the early stages of the design process.  ...  In this paper, we propose to integrate an embedding of Property Specification Language (PSL) in Abstract State Machines Language (AsmL) with a top-down design for verification approach in order to enable  ...  Wang and Wen 27 proposed a Verification Methodology Our methodology is a top-down approach for verification of systems at the initial stages of the design process based on the design for verification  ... 
doi:10.1142/s0218126607004052 fatcat:xa6ffmc7jzgy7ky2upn2svmkje

A SystemC-only design methodology and the CINE-IP multimedia platform

Guido Araújo, Edna Barros, Elmar Melcher, Rodolfo Azevedo, Karina R. G. da Silva, Bruno Prado, Manoel E. de Lima
2005 Design automation for embedded systems  
Level (ESL) description languages, and IP-core modeling and reuse.  ...  The application of the IPP methodology in the design of CINE-IP, and its impact in design productivity is thoroughly analyzed. Keywords A based on SystemC design methodology .  ...  To keep these efforts in check, a design methodology that favors reuse and early error detection is essential.  ... 
doi:10.1007/s10617-006-9585-8 fatcat:cf5idt3zxzeobkxobf3mykkxrq

Teaching cross-platform design and testing methods for embedded systems using DICE

Shuvra S. Bhattacharyya, William Plishker, Ayush Gupta, Chung-Ching Shen
2011 Proceedings of the 6th Workshop on Embedded Systems Education - WESE '11  
The platform-and language-independent focus of DICE makes it an effective vehicle for teaching high-productivity, highreliability methods for design and implementation of embedded systems for a variety  ...  In this paper, we provide an overview of features of DICE -particularly as they relate to testing driven design practices -that are useful in embedded systems education, and discuss examples and experiences  ...  design and cross-platform methodologies into relevant contexts in advanced embedded systems education.  ... 
doi:10.1145/2077370.2077376 dblp:conf/esweek/BhattacharyyaPG11 fatcat:3c3qytkzfjh7thoi3awxju3w2e

Codesign of embedded systems: status and trends

R. Ernst
1998 IEEE Design & Test of Computers  
Software reuse and object-oriented design imply that critical system parts that the designer knows in detail will combine with less familiar legacy code. Memory optimization.  ...  EVER-INCREASING EMBEDDED-SYSTEM design complexity combined with a very tight time-to-market window has revolutionized the embedded-system design process.  ... 
doi:10.1109/54.679207 fatcat:7ghyeusfczbepg5adsbge3qvhu

Co-synthesis and co-simulation of control-dominated embedded systems

Alessandro Balboni, William Fornaciari, Donatella Sciuto
1996 Design automation for embedded systems  
The proposed methodology is oriented towards the application field of controldominated embedded systems implemented onto a single chip.  ...  This paper presents a methodology for hardware/software co-design with particular emphasis on the problems related to the concurrent simulation and synthesis of hardware and software parts of the overall  ...  embedded system co-design.  ... 
doi:10.1007/bf00133305 fatcat:i5yb6xbdyfevrfd4hqudpjxbv4

Rapid Industrial Prototyping and SoC Design of 3G/4G Wireless Systems Using an HLS Methodology

Yuanbin Guo, Dennis McCain, JosephR Cavallaro, Andres Takach
2006 EURASIP Journal on Embedded Systems  
We then present VLSI-oriented complexity reduction schemes and demonstrate how to interact these high-complexity algorithms with an HLS-based methodology for extensive design space exploration.  ...  In this paper, we present our industrial rapid prototyping experiences on 3G/4G wireless systems using advanced signal processing algorithms in MIMO-CDMA and MIMO-OFDM systems.  ...  Behnaam Aazhang and Gang Xu for their support in this work. J. R. Cavallaro was supported in part by NSF under Grants ANI-9979465, EIA-0224458, and EIA-0321266.  ... 
doi:10.1186/1687-3963-2006-014952 fatcat:qnhce2epuzdzthuouofqezgjha

Rapid Industrial Prototyping and SoC Design of 3G/4G Wireless Systems Using an HLS Methodology

Yuanbin Guo, Dennis McCain, Joseph R. Cavallaro, Andres Takach
2006 EURASIP Journal on Embedded Systems  
We then present VLSI-oriented complexity reduction schemes and demonstrate how to interact these high-complexity algorithms with an HLS-based methodology for extensive design space exploration.  ...  In this paper, we present our industrial rapid prototyping experiences on 3G/4G wireless systems using advanced signal processing algorithms in MIMO-CDMA and MIMO-OFDM systems.  ...  Behnaam Aazhang and Gang Xu for their support in this work. J. R. Cavallaro was supported in part by NSF under Grants ANI-9979465, EIA-0224458, and EIA-0321266.  ... 
doi:10.1155/es/2006/14952 fatcat:xz4vbqoaxvc4pgmmcsduqgujpy

A Hybrid Hardware and Software Component Architecture for Embedded System Design [chapter]

Hugo Marcondes, Antônio Augusto Fröhlich
2009 IFIP Advances in Information and Communication Technology  
Embedded systems are increasing in complexity, while several metrics such as time-to-market, reliability, safety and performance should be considered during the design of such systems.  ...  In this paper, we present an architecture for developing such components in order to construct a repository of components that can migrate between the hardware and software domains to meet the design system  ...  Related Work Several methodologies propose the integration of tools and design phases of embedded systems, to promote a rapid-prototyping and design of such systems.  ... 
doi:10.1007/978-3-642-04284-3_24 fatcat:e2tgwis63vcr3lw24y5xw3ou64

SW Annotation Techniques and RTOS Modelling for Native Simulation of Heterogeneous Embedded Systems [chapter]

Hctor Posadas, lvaro Daz, Eugenio Villar
2012 Embedded Systems - Theory and Design Methodology  
-Theory and Design Methodology  ...  Additionally, large designs rely on SW reuse and thus on legacy codes developed for different platforms and operating systems.  ... 
doi:10.5772/38000 fatcat:qjqui2gq4jbs7ltckomij3seci

Cloud-based Design and Virtual Prototyping Environment for Embedded Systems

Stephan Werner, Andreas Lauber, Martijn Koedam, Juergen Becker, Eric Sax, Kees Goossens
2016 International Journal of Online Engineering (iJOE)  
in today's system design.  ...  The design and test of Multi-Processor System-on-Chips (MPSoCs) and development of distributed applications and/or operating systems executed on those hardware platforms is one of the biggest challenges  ...  A way to reuse embedded hardware and software components to improve the system design process are outlined in [6] .  ... 
doi:10.3991/ijoe.v12i09.6142 fatcat:cr4ovsfmsnexzfiwaeavq6427i
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