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Model Checking Data Flows in Concurrent Network Updates [chapter]

Bernd Finkbeiner, Manuel Gieseking, Jesko Hecking-Harbusch, Ernst-Rüdiger Olderog
2019 Lecture Notes in Computer Science  
So far, bounded synthesis for distributed systems does not utilize their asynchronous nature.  ...  Bounded synthesis automatically generates an implementation for the specification of the distributed system if one exists.  ...  problem of asynchronous distributed systems and how true concurrency simplifies bounded synthesis for Petri games.  ... 
doi:10.1007/978-3-030-31784-3_30 fatcat:3muylgblcvcn3lkyedh5dl7mpq

Concurrency in Synchronous Systems

Dumitru Potop-Butucaru, Benoît Caillaud, Albert Benveniste
2006 Formal methods in system design  
The notion is useful in the synthesis of correct-by-construction communication protocols for globally asynchronous, locally synchronous (GALS) systems.  ...  In this paper we introduce the notion of weak endochrony, which extends to a synchronous setting the classical theory of Mazurkiewicz traces.  ...  This leads to inefficient synthesis for systems formed of more than 2 components.  ... 
doi:10.1007/s10703-006-7844-8 fatcat:plh4wnspijhszagoqabxvgzme4

Distributed PROMPT-LTL Synthesis

Swen Jacobs, Leander Tentrup, Martin Zimmermann
2016 Electronic Proceedings in Theoretical Computer Science  
As asynchronous distributed synthesis is already undecidable for LTL, we give a semi-decision procedure for the PROMPT-LTL assume-guarantee synthesis problem based on bounded synthesis.  ...  We consider the synthesis of distributed implementations for specifications in Prompt Linear Temporal Logic (PROMPT-LTL), which extends LTL by temporal operators equipped with parameters that bound their  ...  Asynchronous Distributed Synthesis The asynchronous system model is a generalization of the synchronous model discussed in the last section.  ... 
doi:10.4204/eptcs.226.16 fatcat:xme7rhk7zvgg5c4wuqp6u2swnm

Distributed Synthesis for Parameterized Temporal Logics [article]

Swen Jacobs, Leander Tentrup, Martin Zimmermann
2018 arXiv   pre-print
As asynchronous distributed synthesis is already undecidable for LTL, we give a semi-decision procedure for the PROMPT-LTL assume-guarantee synthesis problem based on bounded synthesis.  ...  We consider the synthesis of distributed implementations for specifications in parameterized temporal logics such as PROMPT-LTL, which extends LTL by temporal operators equipped with parameters that bound  ...  Asynchronous Distributed Synthesis The asynchronous system model is a generalization of the synchronous model discussed in the previous section.  ... 
arXiv:1705.08112v2 fatcat:k2efv7hz6zg7vlmfbu54u2bqfi

Synthesis of Self-Stabilising and Byzantine-Resilient Distributed Systems [chapter]

Roderick Bloem, Nicolas Braud-Santoni, Swen Jacobs
2016 Lecture Notes in Computer Science  
To solve the bounded synthesis problem with Byzantine failures more efficiently, we design an incremental, CEGIS-like loop.  ...  The synthesis approach for a fixed-size network of processes is complete for realisable specifications, and can optimise the solution for small implementations and short stabilisation time.  ...  We thank Igor Konnov, Ulrich Schmid, Josef Widder, and the late Helmut Veith for interesting discussions on formal methods for distributed systems.  ... 
doi:10.1007/978-3-319-41528-4_9 fatcat:uuytaq4gnrcthl32uumxcpggj4

Output-Determinacy and Asynchronous Circuit Synthesis

Victor Khomenko, Mark Schaefer, Walter Vogler
2007 Application of Concurrency to System Design  
Signal Transition Graphs (STG) are a formalism for the description of asynchronous circuit behaviour.  ...  For this, we introduce the concept of output-determinacy, which is a relaxation of determinism, and argue that it is reasonable and useful in the speed-independent context.  ...  ., contractions which do not destroy the safeness of the STG. (This kind of contraction is needed to combine decomposition with unfolding techniques for STG synthesis, see [KS07] .)  ... 
doi:10.1109/acsd.2007.57 dblp:conf/acsd/KhomenkoSV07 fatcat:xvmwozv3nncnffml2pzjohbnvq

Solving QBF by Abstraction

Jesko Hecking-Harbusch, Leander Tentrup
2018 Electronic Proceedings in Theoretical Computer Science  
The algorithm decomposes the given QBF into one propositional formula for every block of quantifiers that abstracts from assignments of variables not bound by this quantifier block.  ...  Further, we show the effectiveness of the certification approach using synthesis benchmarks and a case study for synthesizing winning strategies in Petri Games.  ...  Acknowledgments We thank Mikolás Janota for reporting a problem with an earlier formulation of the abstraction and the anonymous reviewers for their helpful comments.  ... 
doi:10.4204/eptcs.277.7 fatcat:grludwr5vbgtrfaraz6pcllfmq

Asynchronous Design—Part 2: Systems and Methodologies

Steven M. Nowick, Montek Singh
2015 IEEE design & test  
Part 2 focuses on methodologies for designing asynchronous systems, including basics of hazards, synthesis and optimization methods for both logic-level and high-level synthesis, and the development of  ...  h THIS TWO-PART article aims to provide both a short historical and technical overview of asynchronous design, as well as a snapshot of the state of the art.  ...  Acknowledgment The authors appreciate the funding support of the National Science Foundation under Grants CCF-1219013, CCF-0964606, and OCI-1127361.  ... 
doi:10.1109/mdat.2015.2413757 fatcat:bpxnljdkofh6ppyovk6sp4pknm

Asynchronous design methodologies: an overview

S. Hauck
1995 Proceedings of the IEEE  
Placement, routing, partitioning, logic synthesis, and most other CAD tools either need modifications for asynchronous circuits, or are not applicable at all.  ...  Unfortunately, asynchronous circuits in general cannot leverage off of existing CAD tools and implementation alternatives for synchronous systems.  ...  Acknowledgments This paper has been greatly improved by a number of patient readers, including Gaetano Borriello, John Brzozowski, Al Davis, David Dill, Carl Ebeling, Jo Ebergen, Henrik Hulgaard, Carl  ... 
doi:10.1109/5.362752 fatcat:2wtrcnhd3beeve2vzcuij6vydq

A Survey of Runtime Monitoring Instrumentation Techniques

Ian Cassar, Adrian Francalanza, Luca Aceto, Anna Ingólfsdóttir
2017 Electronic Proceedings in Theoretical Computer Science  
aim of determining whether the system satisfies or violates a correctness specification.  ...  This allows the same property to be converted into different types of monitors, which may apply different instrumentation techniques for checking whether the property was satisfied or not.  ...  permits the specification of lower bounds, upper bounds, and ranges for discrete-time and real-time properties.  ... 
doi:10.4204/eptcs.254.2 fatcat:537v3lxagjbn7h6gcjxdccpecm

Counterexample Guided Synthesis of Monitors for Realizability Enforcement [chapter]

Matthias Güdemann, Gwen Salaün, Meriem Ouederni
2012 Lecture Notes in Computer Science  
Many of today's software systems are built using distributed services, which evolve in different organizations.  ...  If the system is not synchronizable, the system is not realizable either.  ...  The authors would like to thank Samik Basu, Tevfik Bultan, Frédéric Lang, and Radu Mateescu for interesting discussions on the topics of this paper.  ... 
doi:10.1007/978-3-642-33386-6_20 fatcat:xn5gp2n62ndivjob2umcgqtzzy

Synthesis of Asynchronous Hardware from Petri Nets [chapter]

Josep Carmona, Jordi Cortadella, Victor Khomenko, Alex Yakovlev
2004 Lecture Notes in Computer Science  
This paper focuses on some of recent developments and new opportunities for Petri nets in designing asynchronous circuits such as synthesis of asynchronous control circuits from large Petri nets generated  ...  These new methods avoid using full reachability state space for logic synthesis.  ...  Acknowledgements We would like to thank Alex Bystrov, Michael Kishinevsky, Alex Kondratyev, Maciej Koutny, Luciano Lavagno and Agnes Madalinski for contributing to this research at various stages.  ... 
doi:10.1007/978-3-540-27755-2_9 fatcat:z4dgiwj54be5bacubhptl3uggq

Translating Asynchronous Games for Distributed Synthesis (Full Version) [article]

Raven Beutner, Bernd Finkbeiner, Jesko Hecking-Harbusch
2019 arXiv   pre-print
In distributed synthesis, we generate a set of process implementations that, together, accomplish an objective against all possible behaviors of the environment.  ...  For both directions, we show that a game of one type can be translated into an equivalent game of the other type. We provide exponential upper and lower bounds for the translations.  ...  Efficient trace encodings of bounded synthesis for asynchronous distributed systems. In Proceedings of ATVA, pages 369-386, 2019. doi:10.1007/978-3-030-31784-3\_22. 16 P. Madhusudan and P. S.  ... 
arXiv:1907.00829v2 fatcat:mhu24vmshfhk7ca66kmbsgcc74

RTL Synthesis: From Logic Synthesis to Automatic Pipelining

Jordi Cortadella, Marc Galceran-Oms, Mike Kishinevsky, Sachin S. Sapatnekar
2015 Proceedings of the IEEE  
The paper reviews the evolution of logic synthesis until the advent of techniques for automatic pipelining based on elastic timing, either synchronous or asynchronous.  ...  Design automation has been one of the main propellers of the semiconductor industry with logic synthesis being one of the core technologies in this field.  ...  There is no known efficient exact method to compute the throughput of a system with early evaluation. An upper bound method using linear programming is presented in [27] .  ... 
doi:10.1109/jproc.2015.2456189 fatcat:5h6hxq5revavjcdiytc4bosfgq

An analysis-based approach to composition of distributed embedded systems

Pai Chou, Gaetano Borriello
1998 Proceedings of the sixth international workshop on Hardware/software codesign - CODES/CASHE '98  
To help designers evaluate their choice, we propose a method for analyzing the properties of the composed system, including the detection of potential deadlock and livelock situations.  ...  The growing complexily in (he functionalily and system architecture of embedded systems has motivated designers to raise the level of abstraction by composing the system with a mix of reusable and system-specific  ...  both are impractical for distributed systems.  ... 
doi:10.1145/278241.278242 dblp:conf/codes/ChouB98 fatcat:z6kmmqr4mfe2jakjzcmifpphpu
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