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Memory System Optimization for FPGA-Based Implementation of Quasi-Cyclic LDPC Codes Decoders
2011
IEEE Transactions on Circuits and Systems Part 1: Regular Papers
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Designers are increasingly relying on field-programmable gate array (FPGA)-based emulation to evaluate the performance of low-density parity-check (LDPC) codes empirically down to bit-error rates of 10 ...
that maximizes the decoding throughput for the code on the given FPGA by selecting the appropriate degree of folding and/or vectorization. ...
Section II provides the necessary background on LDPC codes and the message passing algorithm to decode LDPC codes. ...
doi:10.1109/tcsi.2010.2055250
fatcat:2zc7gaotrrdlhl37ul52mp3bhi
Factor Graph Based Joint Detection/Decoding for LDPC Coded Large-MIMO Systems
2012
2012 IEEE 75th Vehicular Technology Conference (VTC Spring)
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We adopt a factor graph based technique to integrate the detection and decoding operations. A Gaussian approximation of spatial interference is used for detection. ...
This serves as a low complexity joint detection/decoding approach for large dimensional MIMO systems coded with LDPC codes of large block lengths. ...
Fig. 5 . 5 Coded BER performance of joint message passing based detection/decoding in 64 × 64 V-BLAST MIMO system for different LDPC code block sizes. ...
doi:10.1109/vetecs.2012.6240094
dblp:conf/vtc/NarasimhanCR12
fatcat:4wg3slfjebf4vahsrq6h52iuc4
Flexible LDPC decoder architecture for high-throughput applications
2008
APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems
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System flexibility is achieved by allowing the check node-based units and the memory banks to be configured according to the code rate and block size of the LDPC code of interest. I. ...
The proposed architecture is based on a block-parallel scheduling scheme using a layered decoding method. ...
LDPC codes are decoded using an iterative messagepassing algorithm, consisting of a row operation and a column operation (called the two-phase message passing algorithm), over a graph-based representation ...
doi:10.1109/apccas.2008.4745956
dblp:conf/apccas/KimSL08
fatcat:p4zk6mwtg5ddffzs46nhi7loiu
Implementation of Power Efficient Decoding Algorithm for LDPC Code
2015
International Journal of Computer Applications
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In this project work I have attempt to optimize power [batteries relate issues] at decoding. Stare of most efficient error control LDPC code which is being used. ...
In this work bit flipping decoder hard decision decoding is used which can be implemented by using 8 transistor by using XOR gate. ...
BIT FLIPPING ALGORITHM The bit-flipping algorithm is a hard-decision message-passing algorithm, which is used in LDPC codes. ...
doi:10.5120/21391-4434
fatcat:wrlxoqgdvfbq5iup4j5oykyvbe
Efficient LDPC Decoding Algorithm Using Node Monitoring
노드 모니터링에 의한 효율적인 LDPC 디코딩 알고리듬
2015
The Journal of the Korea institute of electronic communication sciences
노드 모니터링에 의한 효율적인 LDPC 디코딩 알고리듬
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In this paper, we proposed an efficient algorithm using Node monitoring (NM) and Piecewise Linear Function Approximation(: NP) for reducing the complexity of LDPC code decoding. ...
Proposed NM algorithm is based on a new node-threshold method together with message passing algorithm. Piecewise linear function approximation is used to reduce the complexity of the algorithm. ...
We introduce the message passing algorithm (MPA), the most popular decoding algorithm [2] , to make a our algorithm for the LDPC code decoding. ...
doi:10.13067/jkiecs.2015.10.11.1231
fatcat:w5pkwrsrhvg2bbngtgh76yhzry
Performance Analysis and Implementation for Nonbinary Quasi-Cyclic LDPC Decoder Architecture
2014
International Journal of Wireless & Mobile Networks
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Non-binary low-density parity check (NB-LDPC) codes are an extension of binary LDPC codes with significantly better performance. ...
In addition, the efficiency of the presented techniques is design to demonstrate for the (620, 310) NB-QC-LDPC decoder. ...
Instead of a single message (as for the binary codes), a vector of sub-messages are passed through each edge of the Tanner graph. ...
doi:10.5121/ijwmn.2014.6404
fatcat:xks6hvq6lrasrof4ao6g2acoh4
A Fully Parallel Nonbinary LDPC Decoder With Fine-Grained Dynamic Clock Gating
2015
IEEE Journal of Solid-State Circuits
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We present a 1.22 Gb/s fully parallel decoder of a GF(64) (160, 80) regular-(2, 4) NB-LDPC code in 65 nm CMOS. ...
Index Terms-Dynamic clock gating, LDPC code, LDPC decoder architecture, nonbinary LDPC code. 0018-9200 ...
The decoding of NB-LDPC codes follows the same belief propagation (BP) algorithm [17] that is used in the decoding of binary LDPC codes. ...
doi:10.1109/jssc.2014.2362854
fatcat:c3qldptdtbbizdkrbw4pp4rexq
Block-Circulant RS-LDPC Code: Code Construction and Efficient Decoder Design
2013
IEEE Transactions on Very Large Scale Integration (vlsi) Systems
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Experimental results show that various configurations of the multilevel framework achieve roughly the same level of performance. ...
Various multilevel schemes, including single-pass configurations (V and ) and two-pass configurations (VV, , V , and V), have been experimented, and the results are shown in Table V . ...
Fig. 3 . 3 BER performance of (2048, 1723) RS-LDPC code, QC-RS-LDPC code and BC-RS-LDPC code. 2) CN Computation: Messages from VNs that pass through the SN are used for comparison and product in CN block ...
doi:10.1109/tvlsi.2012.2210452
fatcat:rbpxkut775eqxndv5whjs4voxu
Partial-parallel decoder architecture for quasi-cyclic non-binary LDPC codes
2010
2010 IEEE International Conference on Acoustics, Speech and Signal Processing
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For the first time, this paper proposes a partial-parallel decoder architecture based on the Min-max algorithm for quasi-cyclic NB-LDPC codes. ...
Non-binary low-density parity-check (NB-LDPC) codes can achieve better error-correcting performance than binary LDPC codes when the code length is moderate. ...
For NB-LDPC codes, the messages passed through the edges of the associated Tanner graph are vectors instead of single values as in the case of binary codes. ...
doi:10.1109/icassp.2010.5495502
dblp:conf/icassp/ZhangC10
fatcat:iwn47rylynd4jiz6b5ckvvaq7q
A low-complexity joint detection-decoding algorithm for nonbinary LDPC-coded modulation systems
2010
2010 IEEE International Symposium on Information Theory
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2010 pre-print arXiv:1006.1024v1 fatcat:egfa2r5mynftfjqpnygjeqg6qq
The algorithm combines hard-decision decoding using the message-passing strategy with the signal detector in an iterative manner. ...
Compared to the q-ary sum-product algorithm (QSPA), it provides an attractive candidate for practical applications of q-ary LDPC codes. ...
The whole algorithm is a hard-decision based message-passing algorithm (MPA) operating on the factor graph. Assume that a (d v , d c )-regular q-ary LDPC code is used. ...
doi:10.1109/isit.2010.5513632
dblp:conf/isit/WangBM10
fatcat:uq4wkg44avaphjmdzgaehzjpgq
Low Density Parity Check Code (LDPC Codes) Overview
[article]
2020
arXiv
pre-print
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GALLAGER [1] on Low-Density Parity-Check (LDPC) codes and various parameters related to LDPC codes like, encoding and decoding of LDPC codes, code rate, parity check matrix, tanner graph. ...
We have simulated encoding and decoding of LDPC codes and have acquired results in terms of BER vs SNR graph in MATLAB software. This report was submitted as an assignment in Nirma University ...
Thus, they are also known as iterative decoding algorithms.
IV.A.1 A. Bit-flipping Decoding This is a hard-decision message-passing algorithm for LDPC codes. ...
arXiv:2009.08645v1
fatcat:5ppvlz37pjhhbgtrinvhdfrnue
Design and efficient hardware implementation schemes for non-Quasi-Cyclic LDPC codes
2017
Tsinghua Science and Technology
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Then, we propose a Modified Overlapped Message-Passing (MOMP) algorithm for the hardware implementation of NQC-LDPC codes. ...
This algorithm doubles the hardware utilization efficiency and supports a higher degree of parallelism than that used in the Overlapped Message Passing (OMP) technique proposed in previous works. ...
OMP Technique and the Modified OMP Algorithm
Overlapped message passing schedule To adopt the OMP algorithm for NQC semi-random LDPC codes, let us first review this technique. ...
doi:10.1109/tst.2017.7830899
fatcat:4vcttut6zvebfitrt7uczbyutq
Symbol Message Passing Decoding of Nonbinary Low-Density Parity-Check Codes
[article]
2019
arXiv
pre-print
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We present a novel decoding algorithm for q-ary low-density parity-check codes, termed symbol message passing. ...
The proposed algorithm can be seen as a generalization of Gallager B and the binary message passing algorithm by Lechner et al. to q-ary codes. ...
INTRODUCTION There is a large body of literature considering message passing algorithms for binary low-density parity-check (LDPC) codes. ...
arXiv:1906.02537v2
fatcat:vfasjw44qffqrdk7govmmiuuke
Adaptive Decoding of LDPC Codes with Binary Messages
[article]
2009
arXiv
pre-print
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A novel adaptive binary decoding algorithm for LDPC codes is proposed, which reduces the decoding complexity while having a comparable or even better performance than corresponding non-adaptive alternatives ...
To process the sequences of binary messages in each iteration, the variable node decoders employ pre-computed look-up tables. ...
INTRODUCTION Low-density parity-check (LDPC) codes together with message passing decoders are among the most powerful channel coding schemes known [1] , [2] . ...
arXiv:0902.3287v2
fatcat:qkwl3jcev5b7fkdonwk2uaf3aq
M-ary Detection and q-ary Decoding in Large-Scale MIMO: A Non-Binary Belief Propagation Approach
[article]
2013
arXiv
pre-print
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We first propose a message passing based symbol detection algorithm which computes vector messages using a scalar Gaussian approximation of interference, which results in a total complexity of just O(KN ...
We then design optimized q-ary LDPC codes by matching the EXIT charts of the proposed detector and the LDPC decoder. ...
The q-ary LDPC codewords are decoded by a message passing algorithm over a bipartite graph made of n variable nodes and k check nodes. ...
arXiv:1310.4347v1
fatcat:odqbpl5wfjdirkcel7zm6aqdz4
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