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Brain-Inspired Hardware Solutions for Inference in Bayesian Networks

Leila Bagheriye, Johan Kwisthout
2021 Frontiers in Neuroscience  
These efforts lead to several implementations ranging from digital circuits, mixed-signal circuits, to analog circuits by leveraging new emerging nonvolatile devices.  ...  This comprehensive review paper discusses different hardware implementations of Bayesian networks considering different devices, circuits, and architectures, as well as a more futuristic overview to solve  ...  -Constructing circuits for approximate inference in hierarchical Bayesian models is a challenging research field that can be via merging stochastic samplers with stack-structured memories and content-addressable  ... 
doi:10.3389/fnins.2021.728086 pmid:34924925 pmcid:PMC8677599 fatcat:tihogzl6tfbpjdybwpggllwd5u

A Survey of Machine Learning for Computer Architecture and Systems [article]

Nan Wu, Yuan Xie
2021 arXiv   pre-print
It has been a long time that computer architecture and systems are optimized to enable efficient execution of machine learning (ML) algorithms or models.  ...  For ML-based modelling, we discuss existing studies based on their target level of system, ranging from the circuit level to the architecture/system level.  ...  To shrink the gap in performance modeling of integrated circuits (ICs), ML techniques are widely applied for fast circuit evaluation.  ... 
arXiv:2102.07952v1 fatcat:vzj776a6abesljetqobakoc3dq

Author Index

2010 2010 IEEE Computer Society Conference on Computer Vision and Pattern Recognition  
as Feedback Cue in Human-Robot Interaction -A Comparison between Human and Automatic Recognition Performances Lashkari, Danial Workshop: Nonparametric Hierarchical Bayesian Model for Functional Brain  ...  to Model User Preferences in On-Line Shopping Scenarios Vul, Edward Workshop: Nonparametric Hierarchical Bayesian Model for Functional Brain Parcellation Author Index file:///L:/JOBS/45636%20IEEE%20CVPR  ... 
doi:10.1109/cvpr.2010.5539913 fatcat:y6m5knstrzfyfin6jzusc42p54

Dealing with Aging and Yield in Scaled Technologies [chapter]

Wei Ye, Mohamed Baker Alawieh, Che-Lun Hsu, Yibo Lin, David Z. Pan
2020 Embedded Systems  
The presented techniques vary from analytical approaches to machine learning, and often require cross-layer information feedback for robust design cycles.  ...  Different fundamental effects such as device aging, interconnect electromigration, and process variations are investigated with the state-of-the-art techniques for modeling and optimization.  ...  In practice, the hierarchical structure of many AMS circuits can be leveraged to incorporate unlabeled data via Bayesian co-learning [5] .  ... 
doi:10.1007/978-3-030-52017-5_17 fatcat:shivkxo2afchtexgievin4hotq

PoBO: A Polynomial Bounding Method for Chance-Constrained Yield-Aware Optimization of Photonic ICs [article]

Zichang He, Zheng Zhang
2021 arXiv   pre-print
This paper investigates an alternative yield-aware optimization for photonic ICs: we will optimize the circuit design performance while ensuring a high yield requirement.  ...  The proposed method enables a global optimum search for the design variables via polynomial optimization.  ...  Zeng, “Efficient yield optimization for analog and SRAM mization using geostatistics motivated performance modeling,” circuits via Gaussian process regression and adaptive yield in  ... 
arXiv:2107.12593v2 fatcat:3z7qbbkehnephlkylxpbyu6u7u

A computational cognitive framework of spatial memory in brains and robots

Tamas Madl, Stan Franklin, Ke Chen, Robert Trappl
2018 Cognitive Systems Research  
We tackle error accumulation during path integration by means of Bayesian localization, and loop closing with sequential gradient descent.  ...  Finally, we outline a method for structuring spatial representations using metric learning and clustering.  ...  Its operation can be summarized in three stages, which are performed iteratively at every time step: 1) movement (adding the current movement), 2) correction of the location estimate via Bayesian cue integration  ... 
doi:10.1016/j.cogsys.2017.08.002 fatcat:ubohygvimnd4xbjsjpyeoxzx5m

Editorial: Understanding and Bridging the Gap Between Neuromorphic Computing and Machine Learning

Lei Deng, Huajin Tang, Kaushik Roy
2021 Frontiers in Computational Neuroscience  
AUTHOR CONTRIBUTIONS All authors listed have made a substantial, direct and intellectual contribution to the work, and approved it for publication.  ...  Parsa et al. build a hierarchical pseudo agent-based multiobjective Bayesian hyperparameter optimization framework for both software and hardware.  ...  They integrate the models into the PyTorch-Kaldi Speech Recognition Toolkit for rapid development.  ... 
doi:10.3389/fncom.2021.665662 pmid:33815083 pmcid:PMC8010134 fatcat:l5frrkuzprbovpb4tf327mhmtq

Versatile emulation of spiking neural networks on an accelerated neuromorphic substrate [article]

Sebastian Billaudelle, Yannik Stradmann, Korbinian Schreiber, Benjamin Cramer, Andreas Baumbach, Dominik Dold, Julian Göltz, Akos F. Kungl, Timo C. Wunderlich, Andreas Hartel, Eric Müller, Oliver Breitwieser (+12 others)
2019 arXiv   pre-print
We present first experimental results on the novel BrainScaleS-2 neuromorphic architecture based on an analog neuro-synaptic core and augmented by embedded microprocessors for complex plasticity and experiment  ...  The PPU can thus be used for a vast array of applications such as near-arbitrary learning rules, on-line circuit calibration, structural network reconfiguration, or the co-simulation of an environment  ...  In [13] , it was shown how networks of LIF neurons can learn to perform Bayesian inference through sampling on high-dimensional data distributions [14] , [15] .  ... 
arXiv:1912.12980v1 fatcat:74gzvnkyorehdey3lt3yzogvw4

Tensor Methods for Generating Compact Uncertainty Quantification and Deep Learning Models [article]

Chunfeng Cui, Cole Hawkins, Zheng Zhang
2019 arXiv   pre-print
In this paper, we summarize the recent applications of tensor computation in obtaining compact models for uncertainty quantification and deep learning.  ...  small-size model from scratch via optimization or statistical techniques.  ...  COMPACT DEEP LEARNING MODELS Different from model-driven and data-expensive EDA problems, deep learning is suitable for data-driven and data-cheap applications such as computer vision and speech recognition  ... 
arXiv:1908.07699v1 fatcat:vq4grphvtfan5m2np3stsinp6m

Large-Scale Neuromorphic Spiking Array Processors: A quest to mimic the brain [article]

Chetan Singh Thakur, Jamal Molin, Gert Cauwenberghs, Giacomo Indiveri, Kundan Kumar, Ning Qiao, Johannes Schemmel, Runchun Wang, Elisabetta Chicca, Jennifer Olson Hasler, Jae-sun Seo, Shimeng Yu, Yu Cao, André van Schaik, Ralph Etienne-Cummings
2018 arXiv   pre-print
NE has two-way goals: one, a scientific goal to understand the computational properties of biological neural systems by using models implemented in integrated circuits (ICs); second, an engineering goal  ...  Thus, compared to conventional CPUs, these neuromorphic emulators are beneficial in many engineering applications such as for the porting of deep learning algorithms for various recognitions tasks.  ...  The synapses were enabled for STDP learning operation and initial learning experiments performed [106] . Figure 26 . Neuron IC built from transistor channel modeled components.  ... 
arXiv:1805.08932v1 fatcat:xqtzbpp5ubhfrpfhj6sjffi6ii

2020 Index IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Vol. 39

2020 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
., +, TCAD Nov. 2020 4252-4265 CMOS digital integrated circuits A Macromodeling Approach for Analog Behavior of Digital Integrated Circuits.  ...  Macromodeling Approach for Analog Behavior of Digital Integrated Circuits.  ...  Entropy-Directed Scheduling for FPGA High-Level Synthesis. Shen, M., +, TCAD Oct. 2020 2588 -2601 FLASH: Fast, Parallel, and Accurate Simulator for HLS.  ... 
doi:10.1109/tcad.2021.3054536 fatcat:wsw3olpxzbeclenhex3f73qlw4

Fast Bayesian Inference with Batch Bayesian Quadrature via Kernel Recombination [article]

Masaki Adachi, Satoshi Hayakawa, Martin Jørgensen, Harald Oberhauser, Michael A. Osborne
2022 arXiv   pre-print
Calculation of Bayesian posteriors and model evidences typically requires numerical integration.  ...  Bayesian quadrature (BQ), a surrogate-model-based approach to numerical integration, is capable of superb sample efficiency, but its lack of parallelisation has hindered its practical applications.  ...  for Battery analytics and sharing his codes on Single Particle Model with electrolyte dynamics, and hierarchical GPs.  ... 
arXiv:2206.04734v1 fatcat:4uxlo7tfnzbkbfyun3xvqgt4jm

Towards a Mathematical Theory of Cortical Micro-circuits

Dileep George, Jeff Hawkins, Karl J. Friston
2009 PLoS Computational Biology  
In this paper, we describe how Bayesian belief propagation in a spatio-temporal hierarchical model, called Hierarchical Temporal Memory (HTM), can lead to a mathematical model for cortical circuits.  ...  The theoretical setting of hierarchical Bayesian inference is gaining acceptance as a framework for understanding cortical computation.  ...  Conceived and performed the experiments: DG.  ... 
doi:10.1371/journal.pcbi.1000532 pmid:19816557 pmcid:PMC2749218 fatcat:at4tpxelnrdqjci4convyyipfy

A Bayesian data fusion based approach for learning genome-wide transcriptional regulatory networks

Elisabetta Sauta, Andrea Demartini, Francesca Vitali, Alberto Riva, Riccardo Bellazzi
2020 BMC Bioinformatics  
In this work, we propose a data fusion approach that exploits the integration of complementary omics-data as prior knowledge within a Bayesian framework, in order to learn and model large-scale transcriptional  ...  subsequently investigated, and it represents a promising learning approach suitable for multi-layered genomic data integration, given its robustness to noisy sources and its tailored framework for handling  ...  Acknowledgements We would like to acknowledge the University of Florida Research Computing (URL: http://researchcomputing.ufl.edu) for providing computational resources and support that have contributed  ... 
doi:10.1186/s12859-020-3510-1 pmid:32471360 fatcat:3v6orxxiyjaktmui6opbjebrxm

2020 Index IEEE Transactions on Power Systems Vol. 35

2020 IEEE Transactions on Power Systems  
., Assessing the Impact of VSC-HVDC on the Interdependence of Power System Dynamic Performance in Uncertain Mixed AC/DC Systems; TPWRS Jan. 2020 63-74 Moeini, A., see Rimorov, D., TPWRS Sept. 2020 3825  ...  Bayesian Learning Based Scheme for Online Dynamic Security Assessment and Preventive Control.  ...  Neves, L.S., +, TPWRS Using Bayesian Deep Learning to Capture Uncertainty for Residential Net Load Forecasting.  ... 
doi:10.1109/tpwrs.2020.3040894 fatcat:jjw2rnzr2re6fejvariekzr5uy
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