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Efficiency trends and limits from comprehensive microarchitectural adaptivity

Benjamin C. Lee, David Brooks
2008 ACM SIGOPS Operating Systems Review  
This 5.3x efficiency gain is derived from a 1.6x performance gain and 0.8x power reduction.  ...  For the first time, we are able to simultaneously consider high temporal and comprehensive spatial adaptivity.  ...  Acknowledgments This work is supported by NSF grant CCF-0048313 (CAREER), Intel, and IBM.  ... 
doi:10.1145/1353535.1346288 fatcat:msgv727m2zev3k34b3r67ij6xy

Efficiency trends and limits from comprehensive microarchitectural adaptivity

Benjamin C. Lee, David Brooks
2008 Proceedings of the 13th international conference on Architectural support for programming languages and operating systems - ASPLOS XIII  
This 5.3x efficiency gain is derived from a 1.6x performance gain and 0.8x power reduction.  ...  For the first time, we are able to simultaneously consider high temporal and comprehensive spatial adaptivity.  ...  Acknowledgments This work is supported by NSF grant CCF-0048313 (CAREER), Intel, and IBM.  ... 
doi:10.1145/1346281.1346288 dblp:conf/asplos/LeeB08 fatcat:5z7g56245rb43gdpyr4p36fhmi

Efficiency trends and limits from comprehensive microarchitectural adaptivity

Benjamin C. Lee, David Brooks
2008 SIGARCH Computer Architecture News  
This 5.3x efficiency gain is derived from a 1.6x performance gain and 0.8x power reduction.  ...  For the first time, we are able to simultaneously consider high temporal and comprehensive spatial adaptivity.  ...  Acknowledgments This work is supported by NSF grant CCF-0048313 (CAREER), Intel, and IBM.  ... 
doi:10.1145/1353534.1346288 fatcat:dwcyi42oyndaxekw35qkc5ubhu

Efficiency trends and limits from comprehensive microarchitectural adaptivity

Benjamin C. Lee, David Brooks
2008 SIGPLAN notices  
This 5.3x efficiency gain is derived from a 1.6x performance gain and 0.8x power reduction.  ...  For the first time, we are able to simultaneously consider high temporal and comprehensive spatial adaptivity.  ...  Acknowledgments This work is supported by NSF grant CCF-0048313 (CAREER), Intel, and IBM.  ... 
doi:10.1145/1353536.1346288 fatcat:jieodfr7urcpjitskiprxq6n7q

Applied inference

Benjamin C. Lee, David Brooks
2010 ACM Transactions on Architecture and Code Optimization (TACO)  
This approach greatly improves the computational efficiency of microarchitectural simulation and enables new capabilities in design space exploration.  ...  Specifically, this paradigm (1) defines a large, comprehensive design space, (2) samples points from the space for simulation, and (3) constructs regression models based on sparse simulations.  ...  UAR sampling is parallel, but adaptive sampling introduces a feedback loop that limits this parallelism.  ... 
doi:10.1145/1839667.1839670 fatcat:4rwuf5ehqjeitheo6n5e6ecbbm

Spatial Sampling and Regression Strategies

Benjamin C. Lee, David M. Brooks
2007 IEEE Micro  
We also detail the statistical techniques required to derive efficient and robust models, interleaving code segments from scripts performing these analyses.  ...  The predictive ability and computational efficiency of these regression models enable new capabilities in microarchitectural design space studies.  ...  Acknowledgements This work is supported by NSF grant CCF-0048313 (CAREER), Intel, and IBM.  ... 
doi:10.1109/mm.2007.61 fatcat:glw2ffoyuvf2jb7sf7nnzzojbq

Variability Expeditions: A Retrospective

Rajesh K. Gupta, Subhasish Mitra, Puneet Gupta
2019 IEEE design & test  
As we built circuits, microarchitecture, devised coding methods, and adaptive algorithms, the research accelerated the trends toward fault tolerance in programming languages from fringe efforts such as  ...  We envisioned an alternate universe where computing systems would sense their conditions and their environment and adapt to them.  ...  As we built circuits, microarchitecture, devised coding methods, and adaptive algorithms, the research accelerated the trends toward fault tolerance in programming languages from fringe efforts such as  ... 
doi:10.1109/mdat.2018.2889103 fatcat:4yskrdyganh6baxctvjaekccya

Accurate Machine-Learning-Based On-Chip Router Modeling

Kwangok Jeong, Andrew B. Kahng, Bill Lin, Kambiz Samadi
2010 IEEE Embedded Systems Letters  
Compared against existing models (e.g., ORION 2.0 and parametric models), our models reduce estimation error by up to 89% on average.  ...  With power now the first-order design constraint, early-stage estimation of NoC power, performance, and area has become crucially important.  ...  From Fig. 9 we can conclude that larger flit-width and smaller number of ports increase router energy efficiency.  ... 
doi:10.1109/les.2010.2051413 fatcat:s5iojh5ld5bllhrhizn64jrjny

System and architecture level characterization of big data applications on big and little core server architectures

Maria Malik, Setareh Rafatirah, Avesta Sasan, Houman Homayoun
2015 2015 IEEE International Conference on Big Data (Big Data)  
Furthermore, the microarchitecture-level analysis highlights where improvement is needed in big and little cores microarchitecture.  ...  Furthermore, physical design constraints, such as power and density, have become the dominant limiting factor for scaling out servers.  ...  This work is different from all above benchmarking and characterization work as it perform a comprehensive systemlevel (power, performance, ED X P, DPS and DPJ) and microarchitecture-level(cache miss,  ... 
doi:10.1109/bigdata.2015.7363745 dblp:conf/bigdataconf/MalikRSH15 fatcat:fjc32bdisjcpxahlbgkcnm4r24

Application Specific Instruction Set DSP Processors [chapter]

Dake Liu, Jian Wang
2013 Handbook of Signal Processing Systems  
During my work time in industry, I could not find any suitable and comprehensive reference book either, which led to my second motivation for writing such a book.  ...  Usually the biggest challenge for ASIP designers is the efficiency issue.  ...  Appendix 769 Index FIGURE P.2 Handling complexity of the design using ASIP IP and platform. that the design of ASIP must be both silicon-efficient and platform-oriented.  ... 
doi:10.1007/978-1-4614-6859-2_21 fatcat:osttotl7yrdr5binkjo44angky

A Survey of Coarse-Grained Reconfigurable Architecture and Design

Leibo Liu, Jianfeng Zhu, Zhaoshi Li, Yanan Lu, Yangdong Deng, Jie Han, Shouyi Yin, Shaojun Wei
2019 ACM Computing Surveys  
and industry, because they offer the performance and energy efficiency of hardware with the flexibility of software.  ...  However, CGRAs are not yet mature in terms of programmability, productivity, and adaptability.  ...  However, such parallelism should be adapted to different circumstances. Trend 3: Virtualization State-of-the-art Techniques.  ... 
doi:10.1145/3357375 fatcat:pqi4d33i6bg45a6llswhwd44qi

Design and test strategies for microarchitectural post-fabrication tuning

Xiaoyao Liang, Benjamin C. Lee, Gu-Yeon Wei, David Brooks
2009 2009 IEEE International Conference on Computer Design  
Tuning techniques are capable of adapting the microarchitecture to mitigate the impact of variations at post-fabrication testing time.  ...  Both systematic and random variations will affect the critical delay of fabricated chips, causing a wide frequency and power distribution.  ...  Phansalkar Techniques in statistical inference reveal performance and power trends from sparsely measured configuration samples, enabling performance and power analysis for much larger, comprehensive  ... 
doi:10.1109/iccd.2009.5413170 dblp:conf/iccd/LiangLWB09 fatcat:zmqfw7iflndzzbqu3x5s6fr4cm

The Role of Trabecular Bone Score and Hip Geometry in Thalassemia Major: A Neural Network Analysis

Marina Baldini, Enzo Grossi, Maria Domenica Cappellini, Carmelo Messina, Alessia Marcon, Elena Cassinerio, Lorena Airaghi, Giuseppe Guglielmi, Fabio Massimo Ulivieri
2017 British Journal of Research  
The Auto Contractive Map highlighted the key role of bone quantity, bone geometry, and microarchitecture in defining thalassemic bone condition.  ...  Classic statistics have limitations when applied to the study of such highly complex relationships.  ...  Acknowledgement We thank Dr Alberto Roghi and Patrizia Pedrotti, CMR Unit, Department of Cardiology and Cardiovascular Surgery, Niguarda Ca' Granda Hospital, Milan, for performing CMR T2*.  ... 
doi:10.21767/2394-3718.100025 fatcat:olkvjtmvp5dr3dtr7mewo3tdly

On-Chip Dynamic Resource Managemen

Antonio Miele, Anil Kanduri, Kasra Moazzemi, Dávid Juhász, Amir R. Rahmani, Nikil Dutt, Pasi Liljeberg, Axel Jantsch
2019 Foundations and Trends® in Electronic Design Automation  
Chapter 7 addresses the limitations of existing work and outlines recent trends in enabling adaptive resource management in the face of dynamically varying workloads, system properties, and unforeseen  ...  Observing current limitations and recent trends we assume that global and holistic approaches will make the most valuable contributions to this field in the years to come and therefore we expect that the  ... 
doi:10.1561/1000000055 fatcat:l6v5ffbntrgq3ki6rdv3dlahfy

A Postulate on the Brain's Basic Wiring Logic

Joe Z. Tsien
2015 Trends in Neurosciences  
I wish to put forth a 'power-of-two'-based wiring logic that provides the basic computational principle in organizing the microarchitecture of cell assemblies that would readily enable knowledge and adaptive  ...  adaptive behavior to emerge.  ... 
doi:10.1016/j.tins.2015.09.002 pmid:26482260 pmcid:PMC4920130 fatcat:hye5cernrzhgthvgyzzzdwebam
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