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Early Multi-node Performance Evaluation of a Knights Corner (KNC) Based NASA Supercomputer

Subhash Saini, Haoqiang Jin, Dennis Jespersen, Samson Cheung, Jahed Djomehri, Johnny Chang, Robert Hood
2015 2015 IEEE International Parallel and Distributed Processing Symposium Workshop  
The Xeon Phi, based on the Many Integrated Core (MIC) architecture, is of the Knights Corner (KNC) generation. We used several types of benchmarks for the study.  ...  We have conducted performance evaluation of a dual-rail Fourteen Data Rate (FDR) InfiniBand (IB) connected cluster, where each node has two Intel Xeon E5-2670 (Sandy Bridge) processors and two Intel Xeon  ...  Each Sandy Bridge node has two Intel Xeon Phi 5110p (Knights Corner -KNC) coprocessors.  ... 
doi:10.1109/ipdpsw.2015.140 dblp:conf/ipps/SainiJJCDCH15 fatcat:7ljb3lzjzzdfraevzxxethkku4

D5.1: Market and Technology Watch Report Year 1

Jean-Philippe Nominé
2016 Zenodo  
It is thus the continuation of a well-established effort, using assessment of the HPC market based on market surveys, supercomputing conferences, and exchanges with vendors and between experts involved  ...  This deliverable is the first one of PRACE-4IP Work Package 5 Task 1, it corresponds to a periodic annual update on technology and market trends.  ...  Knights Corner already using a very wide (512-bit) GDDR5 memory bus, Intel is in need of an even faster memory technology to replace GDDR5 for Knights Landing.  ... 
doi:10.5281/zenodo.6801690 fatcat:zpnjoenqkvb2te74rvci326vba

Unstructured Computations on Emerging Architectures

Mohammed Al Farhan
2019
We illustrate for a broad spectrum of emerging microprocessor architectures as representatives of the compute units in contemporary leading supercomputers, identifying and addressing performance challenges  ...  node-level.  ...  To further understand the performance of the Knights Corner implementation of PETSc-FUN3D, we have also used a finer mesh on a single node.  ... 
doi:10.25781/kaust-7912h fatcat:znemkptd7vcrddkl2trlygwg4u