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EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures
2016
2016 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)
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EXTRA covers the entire stack from architecture up to the application, focusing on the fundamental building blocks for run-time reconfigurable exascale HPC systems: new chip architectures with very low ...
In the EXTRA project, we create a new and flexible exploration platform for developing reconfigurable architectures, design tools and HPC applications with run-time reconfiguration built-in as a core fundamental ...
ACKNOWLEDGMENTS The EXTRA project runs from September 2015 till August 2018 and receives funding from the EU Horizon 2020 research and innovation programme under grant No 671653. ...
doi:10.1109/recosoc.2016.7533896
dblp:conf/recosoc/StroobandtVCKBC16
fatcat:3hjjgwqrdzf5notzalewyjdybm
EXTRA: Towards an Efficient Open Platform for Reconfigurable High Performance Computing
2015
2015 IEEE 18th International Conference on Computational Science and Engineering
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EXTRA covers the entire stack from architecture up to the application, focusing on the fundamental building blocks for run-time reconfigurable exascale HPC systems: new chip architectures with very low ...
In the EXTRA project, we create a new and flexible exploration platform for developing reconfigurable architectures, design tools and HPC applications with run-time reconfiguration built-in as a core fundamental ...
In the EXTRA (Exploiting eXascale Technology with Reconfigurable Architectures) project, we aim to develop an integrated environment for developing and programming reconfigurable architectures with built-in ...
doi:10.1109/cse.2015.54
dblp:conf/cse/CiobanuVPCNLSSK15
fatcat:h5seovvsxzdcbpahv72p67p6qy
The Italian research on HPC key technologies across EuroHPC
2021
Proceedings of the 18th ACM International Conference on Computing Frontiers
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High-Performance Computing (HPC) is one of the strategic priorities for research and innovation worldwide due to its relevance for industrial and scientific applications. ...
We envision HPC as composed Aldinucci et al. goals and provide an overview of the five funded projects, which become fully operational in March 2021, and cover a selection of key technologies provided ...
EUPEX will co-design a modular exascale-pilot system, integrating European hardware and software technologies to demonstrate the readiness and the scalability of these technologies towards exascale and ...
doi:10.1145/3457388.3458508
fatcat:nbnzfa2frvbpflj6tcbsk4bwcq
ANTAREX -- AutoTuning and Adaptivity appRoach for Energy Efficient eXascale HPC Systems
2015
2015 IEEE 18th International Conference on Computational Science and Engineering
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Computing (HPC) systems up to the Exascale level. ...
The main goal of the ANTAREX project is to express by a Domain Specific Language (DSL) the application self-adaptivity and to runtime manage and autotune applications for green and heterogeneous High Performance ...
the scalability of the proposed approach towards Exascale systems. ...
doi:10.1109/cse.2015.58
dblp:conf/cse/SilvanoABBBCCCM15
fatcat:relhamsj2zgjdns43rfl7fimby
European Technology Research Projects
2020
Zenodo
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the position of the European ecosystem in the international HPC landscape; Provide recommendations for shaping the future R&D HPC technology programme. ...
The impact of the work of the projects extends beyond the domain of technology onto applications and thus the work of the Centres of Excellence. ...
We are confident that these recommendations will improve the impact of the European research technology effort and strengthen European leadership in HPC. ...
doi:10.5281/zenodo.4106755
fatcat:ui6ae7n5b5addnskqdixpzqwsa
Challenges in Deeply Heterogeneous High Performance Systems
2019
2019 22nd Euromicro Conference on Digital System Design (DSD)
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For each of these areas, the paper describes the relevant state of the art as well as the specific actions that the project will take to effectively address the identified technological challenges. ...
RECIPE (REliable power and time-ConstraIntsaware Predictive management of heterogeneous Exascale systems) is a recently started project funded within the H2020 FETHPC programme, which is expressly targeted ...
For the timing analysis we will employ existing tools like Extrae [42] or VTune [43] (for Xeon architectures) to gather information on application behavior from the underlying hardware. ...
doi:10.1109/dsd.2019.00068
dblp:conf/dsd/AgostaFACCFHKMG19
fatcat:3zmdras2iraq3nmyw7gn2qaesu
Performance and energy footprint assessment of FPGAs and GPUs on HPC systems using Astrophysics application
[article]
2020
arXiv
pre-print
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The goal of this work is to give some insights about performance and energy footprint of contemporary architectures for a real astrophysical application in an HPC context. ...
Two of them represent the current HPC systems (Intel-based and equipped with NVIDIA GPUs), one is a micro-cluster based on ARM-MPSoC, and one is a "prototype towards Exascale" equipped with ARM-MPSoCs ...
We thank Piero Vicini and the INFN APE Roma Group for the support and for the use of INFN computational infrastructure. ...
arXiv:2003.03283v2
fatcat:cgsagyvimbhd3pu3cv37q2hfyu
Exascale Machines Require New Programming Paradigms and Runtimes
2015
Supercomputing Frontiers and Innovations
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This article is structured as follows: the next section describes the requirements from the programmability point of view for extra large-scale systems such as ultrascale systems. ...
At the international level, the goal of the International Exascale Software Project [74] is also to provide an international common vision for cooperation in order to reach ultrascale: "The guiding purpose ...
In future exascale architectures, one of the top challenges will be enabling a programmable environment for the next generation architectures. ...
doi:10.14529/jsfi150201
fatcat:ozj4czefxrd37j7djcxuukyuee
D7.9: Hardware developments V
2020
Zenodo
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and detailed feedback to the project software developers; - discussion of project software needs with hardware and software vendors, completion of survey of what is already available for particular hardware ...
Update on "Hardware Developments IV" (Deliverable 7.7: https://doi.org/10.5281/zenodo.3256137) which covers: - Report on hardware developments that will affect the scientific areas of interest to E-CAM ...
architectures relevant to exascale computing (Section A.1). • Exascale challenges in exploiting massive parallelism (Section A.2). ...
doi:10.5281/zenodo.3931510
fatcat:kelxr6ap5vfunpjisfpwiauwue
The Landscape of Exascale Research
2020
ACM Computing Surveys
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The next generation of supercomputers will break the exascale barrier. ...
Tremendous amounts of work have been invested into identifying and overcoming the challenges of the exascale era. ...
Technology Challenges [162] Shalf et al. 2010 80 Toward Exascale Resilience [32] Cappello et al. 2009 72 Evaluating the Viability of Process Replication Ferreira et al. 2011 59 Reliability for Exascale ...
doi:10.1145/3372390
fatcat:jhtwt7pxd5c5darhz75hiqgsnq
D9.2.1: First Report on Multi-Petascale to Exascale Software
2011
Zenodo
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Since the recent end of frequency scaling, we observe a rapid evolution of power-efficient computer architectures. ...
This report investigates the transition of applications from multi-petascale to exascale performance. ...
contribution towards an exascale system. 2.2 Promising Hardware Technologies for Exascale HPC 2.2.1 Intel SandyBridge Intel's SandyBridge architecture exemplifies of the evolution of mainstream multicore ...
doi:10.5281/zenodo.6552877
fatcat:2bluglv435ew5chaauw2ppdhl4
The RECIPE Approach to Challenges in Deeply Heterogeneous High Performance Systems
2020
Microprocessors and microsystems
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resource management of the heterogeneous architectural components of the system, driven by estimates of the application latency and hardware reliability obtained respectively through timing analysis and ...
RECIPE (REliable power and time-ConstraInts-aware Predictive management of heterogeneous Exascale systems) is a recently started project funded within the H2020 FETHPC programme, which is expressly targeted ...
power and time-ConstraIntsaware Predictive management of heterogeneous Exascale systems. ...
doi:10.1016/j.micpro.2020.103185
fatcat:kevagp2vdvf6hnus4qnxgxbnxq
CAOS: CAD as an Adaptive Open-Platform Service for High Performance Reconfigurable Systems
[chapter]
2019
SpringerBriefs in Applied Sciences and Technology
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The platform assists the designer from the high-level analysis of the code, towards the optimization and implementation of the functionalities to be accelerated on the reconfigurable nodes. ...
Despite the potential benefits of reconfigurable hardware, one of the main limiting factor to the widespread adoption of FPGAs is complexity in programmability, as well as the effort required to port software ...
The CAOS Platform The CAOS platform has been developed in the context of the Exploiting eXascale Technology with Reconfigurable Architectures (EXTRA) project and shares with it the same vision [19] . ...
doi:10.1007/978-3-030-32094-2_8
fatcat:zpang4mxhbarnacnihbujgjsya
Dark Silicon: From Embedded to HPC Systems (Dagstuhl Seminar 16052)
2016
Dagstuhl Reports
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While continuous technological scaling enables the high integration of 100s-1000s of cores and, thus, enormous processing capabilities, the resulting power consumption per area (the power density) increases ...
With this density, the problem of Dark Silicon will become prevalent in future technology nodes: It will be infeasible to operate all on-chip components at full performance at the same time due to the ...
In HPC, the machine architecture might be tailored towards the application areas. Centers are specialized for certain customers. 7. ...
doi:10.4230/dagrep.6.1.224
dblp:journals/dagstuhl-reports/GerndtGPR16
fatcat:fnfmxyiknfehxfnlomovzifrh4
Towards Exascale Lattice Boltzmann computing
2019
Computers & Fluids
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2020 pre-print arXiv:2005.05908v1 fatcat:so63pvs6v5bllcrul6i6nnx2ha
We discuss the state of art of Lattice Boltzmann (LB) computing, with special focus on prospective LB schemes capable of meeting the forthcoming Exascale challenge. ...
After reviewing the basic notions of LB computing, we discuss current techniques to improve the performance of LB codes on parallel machines and illustrate selected leading-edge applications in the Petascale ...
A unique case in the history of technology, such prediction, now going by the name of Moore's law, has proved correct for the last four decades, taking from CRAY's Megaflops of the early 80's to the current ...
doi:10.1016/j.compfluid.2019.01.005
fatcat:7pmhodov7rb3zaf4ehcekuq4ke
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