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Duality between Prefetching and Queued Writing with Parallel Disks
[chapter]
2001
Lecture Notes in Computer Science
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To combat this problem, we define a useful and natural duality between writing to parallel disks and the seemingly more difficult problem of prefetching. ...
We first explore this duality for applications involving read-once accesses using parallel disks. ...
Mitra, Nitin Rajput, Erhard Rahm, and Berthold Vöcking for valuable discussions. Anonymous referees have given detailed feedback that helped to improve the readability of the paper. ...
doi:10.1007/3-540-44676-1_5
fatcat:o674cwdv3jg4lgqkojs5snnq34
Duality Between Prefetching and Queued Writing with Parallel Disks
2005
SIAM journal on computing (Print)
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To combat this problem, we define a useful and natural duality between writing to parallel disks and the seemingly more difficult problem of prefetching. ...
We first explore this duality for applications involving read-once accesses using parallel disks. ...
Mitra, Nitin Rajput, Erhard Rahm, and Berthold Vöcking for valuable discussions. Anonymous referees have given detailed feedback that helped to improve the readability of the paper. ...
doi:10.1137/s0097539703431573
fatcat:tskw3fqffzauzbq5ym3fvq4u7y
The power of duality for prefetching and sorting with parallel disks
2001
Proceedings of the thirteenth annual ACM symposium on Parallel algorithms and architectures - SPAA '01
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In this paper we consider parallel disk input and output separately, in particular as the prefetch scheduling problem and the output scheduling problem, respectively. ...
The online queued writing or output scheduling problem takes as input a xed size pool of m empty memory bu ers for storing blocks, and the sequence hw0; w 1 ; : : : ; w L , 1 i of block write requests ...
Figure 1 : 1 Duality between the prefetching priority and the output step. The hashed blocks illustrate how the blocks of disk 2 might be distributed. ...
doi:10.1145/378580.378760
dblp:conf/spaa/HutchinsonSV01
fatcat:o2eh7rc6e5acdfvszgkcnqzrry
Page 1183 of IEEE Transactions on Computers Vol. 52, Issue 9
[page]
2003
IEEE Transactions on Computers
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Vitter, “Duality Prefetching and Queued Writing with Parallel Disks,” Proc European Symp. Algorithms (ESA), pp. 62-73, 2001.
F.J. MacWilliams and N.J.A. Sloane, Theory of Error-Correcting Codes. ...
‘ disks eS an
ompu-
topics, te the indant algo- with from
para-| scalar! ...
Page 554 of Mathematical Reviews Vol. , Issue 2003A
[page]
2003
Mathematical Reviews
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Hutchinson, Peter Sanders and Jeffrey Scott Vitter, Duality between prefetching and queued writing with parallel disks (62-73); Sven O. ...
approximate dis- tances in graphs—a survey (33-48); Alexander Gaysinsky, Alon Itai and Hadas Shachnai, Strongly competitive algorithms for caching with pipelined prefetching (49-61); David A. ...
Algorithms and Data Structures for External Memory
2006
Foundations and Trends® in Theoretical Computer Science
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The resulting input/output communication (or I/O) between fast internal memory and slower external memory (such as disks) can be a major performance bottleneck. ...
Algorithms and Data Structures for External Memory describes several useful paradigms for the design and implementation of efficient EM algorithms and data structures. ...
Duality between prefetch scheduling and output scheduling. The prefetch scheduling problem for sequence Σ proceeds from bottom to top. ...
doi:10.1561/0400000014
fatcat:bkfchugd4fbjvcu5zipnh23k6e
Asynchronous scheduling of redundant disk arrays
2003
IEEE transactions on computers
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The Internet Archive has digitized a microfilm copy of this work. It may be possible to borrow a copy for reading.
Vitter, “Duality Prefetching and Queued Writing with Parallel Disks,” Proc European Symp. Algorithms (ESA), pp. 62-73, 2001.
F.J. MacWilliams and N.J.A. Sloane, Theory of Error-Correcting Codes. ...
disk applications with bounded prefetching buffers, and the combination of both for mixed traffic. ...
doi:10.1109/tc.2003.1228512
fatcat:dsyxq2qlyfhltamz5djhuxhrma
Page 2124 of Mathematical Reviews Vol. , Issue Index
[page]
Mathematical Reviews
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., 2003a:68156
Hutchinson, David Alexander (with Sanders, Peter; Vitter, Jeffrey Scott) Duality between prefetching and queued writing with parallel disks. ...
, Jan) Fast concurrent access to parallel disks. ...
Page 2191 of Mathematical Reviews Vol. , Issue Index
[page]
Mathematical Reviews
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(see 2003¢:68004) 68M07
— (with Hutchinson, David Alexander; Sanders, Peter) Duality between prefetching and queued writing with parallel disks. ...
(electronic). 68P10 (68W40)
— (with Barve, Rakesh D.) A simple and efficient parallel disk mergesort. (English summary) ACM Symposium on Parallel Algorithms and Architectures (San-Malo, 1999). ...
The JAFARDD processor: a Java architecture based on a folding algorithm, with reservation stations, dynamic translation, and dual processing
2003
IEEE transactions on consumer electronics
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This phase runs in parallel with the main processing stream; (3) Queuing, folding, and dynam ic translation that folds and translates JBCs on the fly to a decoded RISC instruction format; and (4) Dynamic ...
The first enables JBC queuing {queueEnable), provides the count o f JBCs to be queued {fetchLength), and supplies the data to be queued {cacheBus). ...
doi:10.1109/tce.2003.1196432
fatcat:slvcmhn77nertm6ra3ucgsv4fa
Engineering Aggregation Operators for Relational In-Memory Database Systems
2016
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with constrained memory, and integration with modern database architectures. ...
In particular, we identify and address the following challenges: cache-efficiency, CPU-friendliness, parallelism within and across processors, robust handling of skewed data, adaptive processing, processing ...
Early Parallel Database Systems Database systems were one of the main users of parallel computers since the early days: In order to overcome the slow disks, more disks were used in parallel (along with ...
doi:10.5445/ir/1000055675
fatcat:5kwvukwpmjcp3pgl6kci3v4cvm
Deterministic systems analysis
2013
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caused by non-prefetch operations, number of front-side bus clocks that the bus is transmit ting data, number of all reads and writes, non-prefetch reads, write combining, and uncacheable memory transactions ...
Here we assume the hard disks with the serial write speeds of 130MB/s, and 1Gbps network interfaces. ...
doi:10.26053/0h-3dyc-e0g0
fatcat:qxfcv6uferfatirluhbu2khkhe
Concurrent programming for scalable web architectures
2016
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Multi-core processors, highly distributed backend architectures and new web technologies force us to reconsider approaches for concurrent programming in order to implement web applications and fulfil scalability ...
While focusing on different stages of scalable web architectures, we provide a survey of competing concurrency approaches and point to their adequate usages. ...
Some implementations also weaken the durability property by not guaranteeing to write directly to disk. ...
doi:10.18725/oparu-2423
fatcat:3wxhuun3rbe4joumvjruwgpgzq
SLA Calculus
2015
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(SLA) with conditions concerning interface, pricing and performance. ...
The SLA Calculus allows one to combine model descriptions for single systems and to derive bounds for reaction time and capacity of composed systems with analytic means. ...
Isotonicity of : If f ≤ g then f h ≤ g h and h f ≥ h g. Composition of : (f g) h = f (g ⊗ h).
Composition of and ⊗ : (f ⊗ g) g ≤ f ⊗ (g g). Duality between and ⊗ : f g ≤ h iff f ≤ g ⊗ h. ...
doi:10.17877/de290r-7135
fatcat:abrbo4vaujhibgq7p7hychtyxq
Dagstuhl Reports, Volume 5, Issue 10, October 2015, Complete Issue
[article]
2016
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in dynamic routing, experience different travel times between common origin and destination. ...
A comparison of travel times with simulation tools like MATSim and VISSIM demonstrates the applicability of our approach. ...
This reduces to a duality between sober spaces and spatial lattices. Convergence spaces, due to G. ...
doi:10.4230/dagrep.5.10
fatcat:u44u5pkszbayti24uerfh3wifu
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