Filters








9 Hits in 11.8 sec

D7.2.2 Exploitation of HPC Tools and Techniques

Michael Lysaght, Bjorn Lindi, Vit Vondrak, John Donners, Marc Tajchman
2014 Zenodo  
ensure that these applications can effectively exploit multi-petaflop systems.  ...  In this deliverable, we report on the exploitation of new HPC tools and algorithms on different codes that are of interest to the European scientific and engineering research community.  ...  Port EC-Earth3 to new hardware "accelerators" such as general-purpose Graphics Processing Units (GPUs) and the Intel Xeon Phi coprocessor. 3.  ... 
doi:10.5281/zenodo.6575525 fatcat:5y3cjsculrdejllndosbjpcgiq

D7.2.1 A Report on the Survey of HPC Tools and Techniques

Michael Lysaght, Bjorn Lindi, Vit Vondrak, John Donners, Marc Tajchman
2013 Zenodo  
applied to help other applications within WP7 effectively exploit multi-petaflop systems and so see how the various applications communities have progressed over the last few years within PRACE.  ...  ensure that these applications can effectively exploit multi-petaflop systems.  ...  It is similar to CUDA, [13] in that it is able to target graphics processing units (GPUs).  ... 
doi:10.5281/zenodo.6575492 fatcat:grwigpxd7naifbzo6w67w4glrm

D7.5: HPC Programming Techniques

Cevdet Aykanat, Antun Balaz, Iris Christadler, Ivan Girotto, Jose Gracia, Vladimir Slavnic, Andy Sunderland, Ata Türk
2012 Zenodo  
Task 7.5 covered a plethora of different approaches and codes. The following deliverable is a summary of all projects performed within Task 7.5.  ...  application communities (Task 7.2 "Applications Enabling with Communities").  ...  lattice QCD on Graphics Processing Units (GPUs) using NVIDIA's CUDA platform.  ... 
doi:10.5281/zenodo.6552939 fatcat:z2gdhmnojrh6bj2lordyl7lmnq

Hardware Developments Iii

Alan Ó Cais, Liang Liang, Jony Castagna
2018 Zenodo  
platforms; and, - detailed output from direct face-to-face session between the project endusers, developers and hardware vendors.  ...  Update on "Hardware Developments II" (Deliverable 7.3: https://doi.org/10.5281/zenodo.1207613) which covers: - Report on hardware developments that will affect the scientific areas of interest to E-CAM and  ...  OpenCL Open Computing Language (OpenCL) is a framework for writing programs that execute across heterogeneous platforms consisting of central processing units (CPUs), graphics processing units (GPUs),  ... 
doi:10.5281/zenodo.1304087 fatcat:itkihkoikvas5ajgxzqyswsez4

D6.5: Report on Porting and Optimisation of applications

Sebastian von Alfthan, Giorgos Goumas, Olli-Pekka Lehto, Pekka Manninen, Mohammad Jowkar, Harald Klimach
2009 Zenodo  
Optimisation techniques are techniques for improving the performance of applications on a node-level.  ...  In this deliverable, we present porting and optimisation reports for each application.  ...  XML large amount of memory eXtensible Markup Language FFT Fast Fourier Transform GPGPU General Purpose Graphic Processing Unit GUP Institute of Graphics and Parallel Processing, Johannes Kepler University  ... 
doi:10.5281/zenodo.6546114 fatcat:7qf7f6tnzvgjbdvyttbgtdroye

D7.7: Hardware developments IV

Alan Ó Cais, Jony Castagna, Godehard Sutmann
2019 Zenodo  
platforms; and, - detailed output from direct face-to-face session between the project endusers, developers and hardware vendors.  ...  Update on "Hardware Developments III" (Deliverable 7.5: https://doi.org/10.5281/zenodo.1304088) which covers: - Report on hardware developments that will affect the scientific areas of interest to E-CAM and  ...  OpenCL Open Computing Language (OpenCL) is a framework for writing programs that execute across heterogeneous platforms consisting of central processing units (CPUs), graphics processing units (GPUs),  ... 
doi:10.5281/zenodo.3256136 fatcat:hfpwvelb3zdxlk6fmkgddqgqoq

High-performance and hardware-aware computing: proceedings of the first International Workshop on New Frontiers in High-performance and Hardware-aware Computing (HipHaC'08) [article]

Rainer Buchty, Jan-Philipp [Hrsg.] Weiß
2008
Preface High-performance system architectures are increasingly exploiting heterogeneity: multi-and manycore-based systems are complemented by coprocessors, accelerators, and reconfigurable units providing  ...  Thanks to the many contributors submitting exciting and novel work, HipHaC'08 will reflect a broad range of issues on architecture design, algorithm implementation, and application optimization.  ...  ACKNOWLEDGMENTS The authors like to thank Hema Reddy from IBM, Austin, for her support and the IBM Systems and Technology Group, Poughkeepsie, New York for providing access to their Cell BE cluster and  ... 
doi:10.5445/ksp/1000009529 fatcat:zvpuywyjzfbabpcxl6o4klo7nu

Unstructured Computations on Emerging Architectures

Mohammed Al Farhan
2019
exploit contemporary multi- and many-core processing hardware.  ...  We therefore employ low- and high-level algorithmic- and architecture-specific code optimizations and tuning in light of thread- and data-level parallelism, with a focus on strong thread scaling at the  ...  However, KNC can work as a coprocessor through the "offload mode", similarly to other accelerators like Graphical Processing Units (GPUs).  ... 
doi:10.25781/kaust-7912h fatcat:znemkptd7vcrddkl2trlygwg4u

Investigation of hadron matter using lattice QCD and implementation of lattice QCD applications on heterogeneous multicore acceleration processors

Frank Winter
2012
Lattice QCD simulations tend to be extremely expensive, reaching the need for petaflop computing and beyond, a regime of computing power we just reach today.  ...  The strategy of deploying multiple types of processing elements within a single workflow, and allowing each to perform the tasks to which it is best suited is likely to be part of the roadmap to exascale  ...  The most prominent examples of heterogeneous efforts in HPC include the IBM PowerXCell 8i processor and the rapidly growing Graphic Processing Units (GPU) and GPGPU computing community supported by NVIDIA  ... 
doi:10.5283/epub.22098 fatcat:h5r4i45ggrc3limagysh7lmyse