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Modeling Loop Unrolling: Approaches and Open Issues [chapter]

João M. P. Cardoso, Pedro C. Diniz
<span title="">2004</span> <i title="Springer Berlin Heidelberg"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/2w3awgokqne6te4nvlofavy5a4" style="color: black;">Lecture Notes in Computer Science</a> </i> &nbsp;
Loop unrolling plays an important role in compilation for Reconfigurable Processing Units (RPUs) as it exposes operator parallelism and enables other transformations (e.g., scalar replacement).  ...  In order to cope with these vast spaces, researchers have explored the application of design estimation techniques.  ...  In Figure 1 we illustrate a generic compilation and synthesis flow for reconfigurable architectures.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/978-3-540-27776-7_24">doi:10.1007/978-3-540-27776-7_24</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/77yfxj7zxvcc7bophw3p47d74a">fatcat:77yfxj7zxvcc7bophw3p47d74a</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20060501213658/http://w3.ualg.pt:80/~jmcardo/MyPapers/samos04b.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/d8/c8/d8c83c0f469caa4d0a8b81e92ac719adf3002254.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/978-3-540-27776-7_24"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> springer.com </button> </a>

Coarse-Grained Reconfigurable Array: Architecture and Application Mapping

Kiyoung Choi
<span title="">2011</span> <i title="Information Processing Society of Japan"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/nrr476l26fbkboaavopttilsxe" style="color: black;">IPSJ Transactions on System LSI Design Methodology</a> </i> &nbsp;
Xplorer 27) is an interactive design space exploration (DSE) environment that assists the user in optimizing the architecture of KressArray for a given application domain, considering KressArray as an  ...  Figure 14 shows the DRESC (Dynamically Reconfigurable Embedded System Compiler) framework that has been suggested in Refs. 28) and 31) to explore the architecture design space and generate a good instance  ...  He is also interested in computer architecture and especially in configurable and reconfigurable computer architecture design.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.2197/ipsjtsldm.4.31">doi:10.2197/ipsjtsldm.4.31</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/46ph7de3wreexmn6wl3ealzzhy">fatcat:46ph7de3wreexmn6wl3ealzzhy</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20190503235644/https://www.jstage.jst.go.jp/article/ipsjtsldm/4/0/4_0_31/_pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/e2/e0/e2e017f56ed809d8b31c0b891d735b3b864f4cc4.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.2197/ipsjtsldm.4.31"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> Publisher / doi.org </button> </a>

A Framework for Compiler Driven Design Space Exploration for Embedded System Customization [chapter]

Krishna V. Palem, Lakshmi N. Chakrapani, Sudhakar Yalamanchili
<span title="">2004</span> <i title="Springer Berlin Heidelberg"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/2w3awgokqne6te4nvlofavy5a4" style="color: black;">Lecture Notes in Computer Science</a> </i> &nbsp;
This paper presents compiler directed design space exploration as a framework for articulating, formulating, and implementing global optimizations for embedded systems customization, where the design space  ...  is spanned by parametric representations of both candidate compiler optimizations and architecture parameters, and the navigation of the design space is driven by quantifiable, machine independent metrics  ...  As an example, consider a data layout optimization for large arrays of data.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/978-3-540-30502-6_29">doi:10.1007/978-3-540-30502-6_29</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/aeceqkskxngnjjlbp4n247mcyi">fatcat:aeceqkskxngnjjlbp4n247mcyi</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20060901200748/http://www.crest.gatech.edu/publications/palem-asian.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/63/e7/63e7d42ede2bef101767024c564757cbb0d2a563.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/978-3-540-30502-6_29"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> springer.com </button> </a>

Tuning Coarse-Grained Reconfigurable Architectures towards an Application Domain

Julio Filho, Thomas Schweizer, Tobias Oppold, Tommy Kuhn, Wolfgang Rosenstiel
<span title="">2006</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/ek7djgoan5ehpihkol2k4a7rm4" style="color: black;">2006 IEEE International Conference on Reconfigurable Computing and FPGA&#39;s (ReConFig 2006)</a> </i> &nbsp;
For that reason the design of such reconfigurable architectures is done considering a set of target applications.  ...  Design decisions, such as type and ratio of functional units, strongly determine the later flexibility of domainspecific FPGAs and coarse-grained dynamically reconfigurable arrays.  ...  The CRC is a general model for processor-like reconfigurable architectures and is depicted in Figure 1 .  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/reconf.2006.307755">doi:10.1109/reconf.2006.307755</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/reconfig/FilhoSOKR06.html">dblp:conf/reconfig/FilhoSOKR06</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/mdgmk4um6jfpzkbau53xnjehdq">fatcat:mdgmk4um6jfpzkbau53xnjehdq</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170810032308/http://www.ti.uni-tuebingen.de/uploads/tx_timitarbeiter/ReConfig2006_IEEEExplore_01.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/04/29/0429557439d863af790f3ad2d0d237eb6317dcc1.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/reconf.2006.307755"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Configurable processors for embedded computing

N. Dutt, Kiyoung Choi
<span title="">2003</span> <i title="Institute of Electrical and Electronics Engineers (IEEE)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/dsrvu6bllzai7oj3hktnc5yf4q" style="color: black;">Computer</a> </i> &nbsp;
An ADL supporting design space exploration for embedded SoCs and automatic generation of a retargetable compiler-simulator toolkit.  ...  A project, "Modern Embedded Systems: Compilers, Architecture, and Languages," to develop methodologies, tools, and algorithms for fully programmable platform-based designs in specific application domains  ...  ANALYZE THIS… CONFIGURE THAT Since configurability increases the design space, taking maximum advantage of this potential requires an efficient system for design space exploration.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/mc.2003.1160063">doi:10.1109/mc.2003.1160063</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/43uu5gnfq5fubdrjahvzrblz44">fatcat:43uu5gnfq5fubdrjahvzrblz44</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170830052941/http://www.ics.uci.edu/~dutt/pubs/j29-dutt-computerjan03.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/69/55/6955d9528b640ba75029f863a7285435dc7d1360.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/mc.2003.1160063"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Software defined architectures for data analytics

Vito Giovanni Castellana, Marco Minutoli, Antonino Tumeo, Marco Lattuada, Pietro Fezzardi, Fabrizio Ferrandi
<span title="">2019</span> <i title="ACM Press"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/fkjmyf3l45eo5ovjdnpeqpdjd4" style="color: black;">Proceedings of the 24th Asia and South Pacific Design Automation Conference on - ASPDAC &#39;19</a> </i> &nbsp;
In this position paper, we describe a possible toolchain for reconfigurable architectures targeted at data analytics.  ...  If, at one end, we may find even more heterogenous processors composed by a myriad of specialized processing elements, at the other end we may see novel reconfigurable architectures, composed of sets of  ...  Partial dynamic reconfiguration also needs to be considered a key dimension for the design space exploration process.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/3287624.3288754">doi:10.1145/3287624.3288754</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/aspdac/CastellanaMTLFF19.html">dblp:conf/aspdac/CastellanaMTLFF19</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/ip4n6z5ghzdubmzs7g6vsq3jmu">fatcat:ip4n6z5ghzdubmzs7g6vsq3jmu</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20190429171138/https://re.public.polimi.it/retrieve/handle/11311/1074488/337479/paper.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/13/e0/13e037f5a6bc29d951d4ff4812661a63d29819d4.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/3287624.3288754"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> acm.org </button> </a>

Design-Space Exploration of Low Power Coarse Grained Reconfigurable Datapath Array Architectures [chapter]

R. Hartenstein, Th. Hoffmann, U. Nageldinger
<span title="">2000</span> <i title="Springer Berlin Heidelberg"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/2w3awgokqne6te4nvlofavy5a4" style="color: black;">Lecture Notes in Computer Science</a> </i> &nbsp;
Based on the KressArray architecture family, a design-space exploration system is being implemented, which supports the designer in finding an appropriate architecture featuring an optimized performance  ...  By comparative analysis of the results of a number of different experimental application-to-array mappings, the explorer system derives architectural suggestions.  ...  General Approach to Design Space Exploration The design flow of design space exploration for a domain of several applications is illustrated by figure 3 .  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/3-540-45373-3_12">doi:10.1007/3-540-45373-3_12</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/fqupauzbcne5haq4dhqbfm7l5a">fatcat:fqupauzbcne5haq4dhqbfm7l5a</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170829165926/http://www.fpl.uni-kl.de/papers/paper109.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/7b/ab/7bab77de88a1ee3ac7daf131e94b51fcebb37389.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/3-540-45373-3_12"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> springer.com </button> </a>

Generation of Design Suggestions for Coarse-Grain Reconfigurable Architectures [chapter]

R. Hartenstein, M. Herz, Th. Hoffmann, U. Nageldinger
<span title="">2000</span> <i title="Springer Berlin Heidelberg"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/2w3awgokqne6te4nvlofavy5a4" style="color: black;">Lecture Notes in Computer Science</a> </i> &nbsp;
Based on the KressArray architecture family, a design-space exploration system is being implemented, which supports the designer in finding an appropriate architecture for a given application domain.  ...  Coarse-grain reconfigurable architectures have been a matter of intense research in the last few years.  ...  Conclusions An interactive approach for the design-space exploration of mesh-based reconfigurable architectures from the KressArray family has been presented.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/3-540-44614-1_42">doi:10.1007/3-540-44614-1_42</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/ks3tm2eb35eurkghtynfpbsnsi">fatcat:ks3tm2eb35eurkghtynfpbsnsi</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170808220947/http://www.fpl.uni-kl.de/papers/paper108.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/e7/26/e726cce3a5b987c18dc36cf76b07fcc5f60ec9f4.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/3-540-44614-1_42"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> springer.com </button> </a>

A framework for reconfigurable computing: task scheduling and context management

R. Maestre, F.J. Kurdahi, M. Fernandez, R. Hermida, N. Bagherzadeh, H. Singh
<span title="">2001</span> <i title="Institute of Electrical and Electronics Engineers (IEEE)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/uqbr2omxsbdgtaxslmblka2nnu" style="color: black;">IEEE Transactions on Very Large Scale Integration (vlsi) Systems</a> </i> &nbsp;
At the same time, an urgent necessity has arisen for support tool development to automate the design process and achieve optimal exploitation of the architectural features of the system.  ...  Dynamically reconfigurable architectures are emerging as a viable design alternative to implement a wide range of computationally intensive applications.  ...  We present a technique that explores the design space considering performance optimization.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/92.974899">doi:10.1109/92.974899</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/cqihujntmzda5khd4mt7svacu4">fatcat:cqihujntmzda5khd4mt7svacu4</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20100616075337/http://gram.eng.uci.edu/comp.arch/new_pubs/j49.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/95/67/956762799b161be0b271833956e9e39d185711ac.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/92.974899"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

HW/SW partitioning and code generation of embedded control applications on a reconfigurable architecture platform

Massimo Baleani, Frank Gennari, Yunjian Jiang, Yatish Patel, Robert K. Brayton, Alberto Sangiovanni-Vincentelli
<span title="">2002</span> <i title="ACM Press"> Proceedings of the tenth international symposium on Hardware/software codesign - CODES &#39;02 </i> &nbsp;
We study a particular architecture platform, which consists of a general purpose processor core, augmented with a reconfigurable function unit and data-path to improve run time performance.  ...  This paper studies the usage of a reconfigurable architecture platform for embedded control applications aimed at improving real time performance. The hw/sw codesign methodology from POLIS is used.  ...  We are grateful for the support of the SRC under contract 683.004 and the California Micro program and industrial sponsors, Fujitsu, Cadence, and Synplicity.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/774814.774820">doi:10.1145/774814.774820</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/o3jj557bxzhingtl3gjngdyyhi">fatcat:o3jj557bxzhingtl3gjngdyyhi</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170923004336/https://people.eecs.berkeley.edu/~brayton/publications/2002/codes02.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/5a/36/5a3634a70e6bc39f2604b84650989cd9a5af5b1c.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/774814.774820"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> acm.org </button> </a>

HW/SW partitioning and code generation of embedded control applications on a reconfigurable architecture platform

Massimo Baleani, Frank Gennari, Yunjian Jiang, Yatish Patel, Robert K. Brayton, Alberto Sangiovanni-Vincentelli
<span title="">2002</span> <i title="ACM Press"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/h4zelo33ojdfzbwajaf5qlthey" style="color: black;">Proceedings of the tenth international symposium on Hardware/software codesign - CODES &#39;02</a> </i> &nbsp;
We study a particular architecture platform, which consists of a general purpose processor core, augmented with a reconfigurable function unit and data-path to improve run time performance.  ...  This paper studies the usage of a reconfigurable architecture platform for embedded control applications aimed at improving real time performance. The hw/sw codesign methodology from POLIS is used.  ...  We are grateful for the support of the SRC under contract 683.004 and the California Micro program and industrial sponsors, Fujitsu, Cadence, and Synplicity.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/774789.774820">doi:10.1145/774789.774820</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/codes/BaleaniGJPBS02.html">dblp:conf/codes/BaleaniGJPBS02</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/c4hiw5nz5vhtvb6g4zagkrl4ua">fatcat:c4hiw5nz5vhtvb6g4zagkrl4ua</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170923004336/https://people.eecs.berkeley.edu/~brayton/publications/2002/codes02.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/5a/36/5a3634a70e6bc39f2604b84650989cd9a5af5b1c.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/774789.774820"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> acm.org </button> </a>

Using Rewriting Logic to Match Patterns of Instructions from a Compiler Intermediate Form to Coarse-Grained Processing Elements

Carlos Morra, Joao M. P. Cardoso, Jurgen Becker
<span title="">2007</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/t3x4vqewrncrfgn2wu7cafsbsq" style="color: black;">2007 IEEE International Parallel and Distributed Processing Symposium</a> </i> &nbsp;
This approach is able to identify sets of SSA instructions that can be mapped to different PE complexities available in coarsegrained reconfigurable computing architectures.  ...  The method uses a three-address code SSA (static single assignment) representation of the kernel being mapped and Rewriting Logic for template matching and algebraic optimizations.  ...  Acknowledgements This work has been possible due to the bilateral DAAD/CRUP cooperation project entitled "Architecture and Compilation Exploration for a Dynamically Reconfigurable System-on-Chip (ACER)  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/ipdps.2007.370369">doi:10.1109/ipdps.2007.370369</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/ipps/MorraCB07.html">dblp:conf/ipps/MorraCB07</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/l662fewuojfmposck2bjarp7v4">fatcat:l662fewuojfmposck2bjarp7v4</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170706131236/http://www.cecs.uci.edu/~papers/ipdps07/pdfs/RAW-70-paper-1.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/2c/2f/2c2fb0ae4c94aebf658229501073b2fa9eb76a8b.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/ipdps.2007.370369"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Hardware Cost Analysis for Weakly Programmable Processor Arrays

Dmitrij Kissler, Frank Hannig, Alexey Kupriyanov, Jurgen Teich
<span title="">2006</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/tpji4zllfrgvhci7agbxqfolze" style="color: black;">2006 International Symposium on System-on-Chip</a> </i> &nbsp;
In this paper technology-independent hardware cost analysis for a new class of highly parameterizable coarse-grained reconfigurable architectures called weakly programmable processor arrays is performed  ...  Coarse-grained reconfigurable architectures support a high degree of parallelism at multiple levels.  ...  This indicates that the comparison of different designs in a design space exploration is accurate enough to take the right calculations for searching cost-optimal architectures. VI.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/issoc.2006.321996">doi:10.1109/issoc.2006.321996</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/issoc/KisslerHKT06.html">dblp:conf/issoc/KisslerHKT06</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/ira6n7n3qfac7ib5j7vd7gszgm">fatcat:ira6n7n3qfac7ib5j7vd7gszgm</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20070824110102/http://www12.informatik.uni-erlangen.de/publications/pub2006/KHKT06b.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/16/9d/169dad5863876c3772f7d569f7fd86d1be40c99f.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/issoc.2006.321996"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

A flexible approach for compiling scilab to reconfigurable multi-core embedded systems

T. Stripf, O. Oey, T. Bruckschloegl, R. Koenig, M. Huebner, J. Becker, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Gerard Rauwerda, Daniel Menard, Olivier Sentieys (+7 others)
<span title="">2012</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/lvvjhbqmhjfwnht2tzxtiddybe" style="color: black;">7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC)</a> </i> &nbsp;
Enabling them to nonexperts requires a simplified programming process that hides the complexity of the underlying hardware -introduced by software parallelism of multiple cores and the flexibility of reconfigurable  ...  The mapping process of high performance embedded applications to today's reconfigurable multiprocessor System-on-Chip devices suffers from a complex toolchain and programming process.  ...  Multi-Core Architecture Simulator The ALMA multi-core simulator plays an important role for realizing a exploration of the available configuration space for a reconfiguration architecture.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/recosoc.2012.6322879">doi:10.1109/recosoc.2012.6322879</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/recosoc/StripfOBKHBRSKDMKMGAVDMSGP12.html">dblp:conf/recosoc/StripfOBKHBRSKDMKMGAVDMSGP12</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/ztmty66zq5d3hol7j5fenoxcxa">fatcat:ztmty66zq5d3hol7j5fenoxcxa</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170829034923/http://people.rennes.inria.fr/Olivier.Sentieys/publications/2012/Alma12Recosoc.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/0b/38/0b3828316c4f5d0aacc98338f1e79eb32a424d12.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/recosoc.2012.6322879"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Software-Oriented Approach to Hardware-Software Co-Simulation for FPGA-Based Risc Extensible Processor

K.s. Tham, D.L. Maskell
<span title="">2006</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/plojvu5mhreuxnue5ey7fivkbi" style="color: black;">2006 International Conference on Field Programmable Logic and Applications</a> </i> &nbsp;
It enables a convenient platform for exploring the reconfigurable characteristics of the microarchitecture and at the same time the software generation requirements can also be examined.  ...  Such reconfigurable systems present a difficult problem for current modeling platforms as a tightly-coupled co-design/simulation effort for both hardware and software must be integrated in the framework  ...  the hardware and software aspects of a FPGA-based reconfigurable co-processor. ii) To facilitate design space exploration of various hardware and software models in a reconfigurable microarchitecture  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/fpl.2006.311230">doi:10.1109/fpl.2006.311230</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/fpl/ThamM06.html">dblp:conf/fpl/ThamM06</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/jyvrwl33uzcytolxwgywctvmwm">fatcat:jyvrwl33uzcytolxwgywctvmwm</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20200508011012/https://dr.ntu.edu.sg//bitstream/10356/35739/2/ThamKwangSheun07.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/a7/71/a77136c213903ee697ba234ba2057f31d77907e0.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/fpl.2006.311230"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>
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