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Real-time cortical simulations: energy and interconnect scaling on distributed systems [article]

Francesco Simula, Elena Pastorelli, Pier Stanislao Paolucci, Michele Martinelli, Alessandro Lonardo, Andrea Biagioni, Cristiano Capone, Fabrizio Capuani, Paolo Cretaro, Giulia De Bonis, Francesca Lo Cicero, Luca Pontisso, Piero Vicini (+1 others)
2019 arXiv   pre-print
Reaching efficient real-time on large scale cortical simulations is of increasing relevance for both future bio-inspired artificial intelligence applications and for understanding the cognitive functions  ...  We demonstrate the importance of the design of low-latency interconnect for speed and energy consumption.  ...  The aim of this work is to identify the obstacles that impede reaching the real-time target for large neural networks.  ... 
arXiv:1812.04974v3 fatcat:bsb2o6jrvzgb7d4xbqa3xbqiu4

Real-Time Cortical Simulations: Energy and Interconnect Scaling on Distributed Systems

Francesco Simula, Elena Pastorelli, Pier Stanislao Paolucci, Michele Martinelli, Alessandro Lonardo, Andrea Biagioni, Cristiano Capone, Fabrizio Capuani, Paolo Cretaro, Giulia De Bonis, Francesca Lo Cicero, Luca Pontisso (+2 others)
2019 2019 27th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP)  
Reaching efficient real-time on large scale cortical simulations is of increasing relevance for both future bio-inspired artificial intelligence applications and for understanding the cognitive functions  ...  We demonstrate the importance of the design of low-latency interconnect for speed and energy consumption.  ...  The aim of this work is to identify the obstacles that impede reaching the real-time target for large neural networks.  ... 
doi:10.1109/empdp.2019.8671627 dblp:conf/pdp/SimulaPPMLBCCCB19 fatcat:i3xrixafdne6leffjvaery4ydu

Bluehive - A Field-Programable Custom Computing Machine for Extreme-Scale Real-Time Neural Network Simulation

Simon W. Moore, Paul J. Fox, Steven J.T. Marsh, A. Theodore Markettos, Alan Mujumdar
2012 2012 IEEE 20th International Symposium on Field-Programmable Custom Computing Machines  
Our design allows 64k neurons with 64M synapses per FPGA and is scalable to a large number of FPGAs.  ...  This contrasts with many FPGA-based neural systems which are very focused on parallel computation, resulting in inefficient use of FPGA resources.  ...  Secondly, a characterisation of large-scale real-time neural network simulation and an analysis of why FPGAs are much better than current GPGPUs and commodity CPUs for this problem space due to the low-latency  ... 
doi:10.1109/fccm.2012.32 dblp:conf/fccm/MooreFMMM12 fatcat:k7pa5iycwzcbvcfj47vbybgtqu

Wide area signal based optimal neurocontroller for a UPFC

Swakshar Ray, Ganesh K. Venayagamoorthy
2008 2008 IEEE Power and Energy Society General Meeting - Conversion and Delivery of Electrical Energy in the 21st Century  
The power system is simulated on a real-time digital simulator. The performance of this neurocontroller is compared with a conventional linear damping controller.  ...  Real-time implementation of the optimal UPFC neurocontroller for a multimachine power system is carried out successfully on a digital signal processor.  ...  The difficulty of modeling large nonlinear time varying networks has been the most challenging task for designing these conventional control methods.  ... 
doi:10.1109/pes.2008.4596095 fatcat:lwb3l2gupjdorgoygotzbyukuu

Wide-Area Signal-Based OptimalNeurocontroller for a UPFC

S. Ray, G.K. Venayagamoorthy
2008 IEEE Transactions on Power Delivery  
The power system is simulated on a real-time digital simulator. The performance of this neurocontroller is compared with a conventional linear damping controller.  ...  Real-time implementation of the optimal UPFC neurocontroller for a multimachine power system is carried out successfully on a digital signal processor.  ...  The difficulty of modeling large nonlinear time varying networks has been the most challenging task for designing these conventional control methods.  ... 
doi:10.1109/tpwrd.2007.916111 fatcat:vpmxtnaqqjeopkqwsrq7zy7ywu

Primer on silicon neuromorphic photonic processors: architecture and compiler

Thomas Ferreira de Lima, Alexander N. Tait, Armin Mehrabian, Mitchell A. Nahmias, Chaoran Huang, Hsuan-Tung Peng, Bicky A. Marquez, Mario Miscuglio, Tarek El-Ghazawi, Volker J. Sorger, Bhavin J. Shastri, Paul R. Prucnal
2020 Nanophotonics  
Neuromorphic photonics aims to map physical models of optoelectronic systems to abstract models of neural networks.  ...  It represents a new opportunity for machine information processing on sub-nanosecond timescales, with application to mathematical programming, intelligent radio frequency signal processing, and real-time  ...  (2) silicon photonic integration provides an unprecedented platform to produce large-scale and low-cost photonic systems.  ... 
doi:10.1515/nanoph-2020-0172 fatcat:m45ztrraojalxbygq33tat7fjq

Neural networks in new product development [chapter]

J. Bode, S. Ren, S. Luo, Z. Shi, Z. Zhou, H. Hu, T. Jiang, B. Liu
1995 IFIP Advances in Information and Communication Technology  
Typical requirements of neural networks to be used in new product development are derived.  ...  Presents the results of the application of back propagation three layer perceptrons to cost estimation problems in design.  ...  of neural networks to practical design problems.  ... 
doi:10.1007/978-0-387-34879-7_68 fatcat:edx4rvjaiffhdch3zdzeu6snwi

Designing Efficient NoC-Based Neural Network Architectures for Identification of Epileptic Seizure

Ayut Ghosh, Arka Prava Roy, Ramapati Patra, Hemanta Kumar Mondal
2021 SN Computer Science  
Several ANN architectures help in the analysis of EEG signals for the identification of epileptic seizures. However, real-time performance needs to be accurate and very quick.  ...  In this paper, we develop NoC-based feed-forward neural network and convolutional neural network models for the identification of epileptic seizure by analysis of continuously monitored EEG signal.  ...  Our work can be considered as an important step towards designing low-cost, reliable and efficient NoC-based neural network accelerators for health-care domain.  ... 
doi:10.1007/s42979-021-00756-9 fatcat:w355wtatizfj5pyp7odxmsqbhe

SpiNNaker: A multi-core System-on-Chip for massively-parallel neural net simulation

Eustace Painkras, Luis A. Plana, Jim Garside, Steve Temple, Simon Davidson, Jeffrey Pepper, David Clark, Cameron Patterson, Steve Furber
2012 Proceedings of the IEEE 2012 Custom Integrated Circuits Conference  
SpiNNaker is a massively-parallel computer system designed to model up to a billion spiking neurons in real time.  ...  The modelling of large systems of spiking neurons is computationally very demanding in terms of processing power and communication.  ...  The die photo in Fig. 4(b) is courtesy of Unisem Europe Ltd.  ... 
doi:10.1109/cicc.2012.6330636 dblp:conf/cicc/PainkrasPGTDPCPF12 fatcat:cm5i4u3wa5ghffa52nxeqrynwa

Scalable communications for a million-core neural processing architecture

Cameron Patterson, Jim Garside, Eustace Painkras, Steve Temple, Luis A. Plana, Javier Navaridas, Thomas Sharp, Steve Furber
2012 Journal of Parallel and Distributed Computing  
The design of a new high-performance computing platform to model biological neural networks requires scalable, layered communications in both hardware and software.  ...  The architecture scales from a single 18-processor chip to over 1 million processors and to simulations of billion-neuron, trillion-synapse models, with tens of trillions of neural spike-event packets  ...  Introduction SpiNNaker (Fig. 1) is a novel application-specific architecture designed for simulation of massively-parallel Spiking Neural Networks in real-time.  ... 
doi:10.1016/j.jpdc.2012.01.016 fatcat:szz343lkvvb4rcpvfek4oof2fa

FPGA Implementation of Simplified Spiking Neural Network [article]

Shikhar Gupta, Arpan Vyas, Gaurav Trivedi
2020 arXiv   pre-print
Spiking Neural Networks (SNN) are third-generation Artificial Neural Networks (ANN) which are close to the biological neural system.  ...  The proposed model is validated on a Xilinx Virtex 6 FPGA and analyzes a fully connected network which consists of 800 neurons and 12,544 synapses in real-time.  ...  large scale simulations rather than for low power embedded applications.  ... 
arXiv:2010.01200v1 fatcat:ou2bvu3q75gphiemrioemjgvhy

Neural Feedback Scheduling of Real-Time Control Tasks [article]

Feng Xia, Yu-Chu Tian, Youxian Sun, Jinxiang Dong
2008 arXiv   pre-print
Many embedded real-time control systems suffer from resource constraints and dynamic workload variations.  ...  Using the optimal solutions obtained offline by mathematical optimization methods, a back-propagation (BP) neural network is designed to adapt online the sampling periods of concurrent control tasks with  ...  Therefore, the neural feedback scheduler establishes a mapping from temporal parameters (for real-time scheduling) to controller parameters (for real-time control).  ... 
arXiv:0805.3062v1 fatcat:sg5kenpmxfcdncrbbe7vkho3zm

Using Wavelets for Solving SMB Separation Process Models

Hongmei Yao, Yu-Chu Tian, Moses O. Tadé
2008 Industrial & Engineering Chemistry Research  
Many embedded real-time control systems suffer from resource constraints and dynamic workload variations.  ...  Using the optimal solutions obtained offline by mathematical optimization methods, a back-propagation (BP) neural network is designed to adapt online the sampling periods of concurrent control tasks with  ...  Therefore, the neural feedback scheduler establishes a mapping from temporal parameters (for real-time scheduling) to controller parameters (for real-time control).  ... 
doi:10.1021/ie071246g fatcat:rgnrienbfrgevhqg34du4rjuci

A Survey on ANN Based Task Scheduling Strategies in Heterogeneous Distributed Computing Systems

Altaf Hussain, Faisal Azam, Muhammad Sharif, Mussarat Yasmin, Sajjad Mohsin
2016 Nepal Journal of Science and Technology  
<p>Heterogeneous Distributed Computing Systems (HeDCS) efficiently utilize the heterogeneity of diverse computational resources which are interlinked through high speed networks for executing a group of  ...  The flexible and powerful nature of ANN for identifying the data patterns, underlying time and other constraints and learning capabilities have shown to be a promising candidate among other heuristics.  ...  Design of a scheduling paradigm is based on three primary performance factors: • Low complexity • Minimum parallel execution time • Maximum system efficiency Conflict may arise in fulfilling all the  ... 
doi:10.3126/njst.v16i1.14359 fatcat:k2xhnkdszzf6teb545czxvdtuq

Design and evaluation of neural networks for coin recognition by using GA and SA

Y. Mitsukura, M. Fukumi, N. Akamatsu
2000 Proceedings of the IEEE-INNS-ENNS International Joint Conference on Neural Networks. IJCNN 2000. Neural Computing: New Challenges and Perspectives for the New Millennium  
In this paper, we propose a method to design a neural network(NN) by using a genetic algorithm(GA) and simulated annealing(SA).  ...  In general, as a problem becomes complex and large-scale, the number of operations increases and hardware implementation to real systems (coin recognition machines) using NNs becomes difficult.  ...  It is a low cost system. 3. When it is applied to a real system, it doesn't consume recognition time. In this paper, the above three points are taken into the consideration for lower cost.  ... 
doi:10.1109/ijcnn.2000.861454 dblp:conf/ijcnn/MitsukuraFA00 fatcat:avawprjygvcftbrxszk3matc7e
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