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The Design of a Genetic Muller C-Element

Nam-Phuong D. Nguyen, Hiroyuki Kuwahara, Chris J. Myers, James P. Keener
2007 Advanced Research in Asynchronous Circuits and Systems (ASYNC) Proceedings of the International Symposium on  
The design of a genetic Muller C-element enables the construction of virtually any asynchronous circuit from genetic material.  ...  Synthetic biology uses engineering principles to design circuits out of genetic materials that are inserted into bacteria to perform various tasks.  ...  The design of a genetic Muller C-element enables the construction of virtually any asynchronous circuit from genetic material.  ... 
doi:10.1109/async.2007.27 dblp:conf/async/NguyenKMK07 fatcat:cdcm5ycrarcc5lhrsmu7shnz2q

Design of dual threshold voltages asynchronous circuits

Behnam Ghavami, Hossein Pedram
2008 Proceeding of the thirteenth international symposium on Low power electronics and design - ISLPED '08  
asynchronous circuits.  ...  This paper introduces a framework for the minimization of leakage power consumption of asynchronous circuits via using dual threshold voltages technique.  ...  To model the dual-threshold design of asynchronous circuits as an optimization problem, a suitable circuit and performance model of asynchronous circuit is required.  ... 
doi:10.1145/1393921.1393970 dblp:conf/islped/GhavamiP08 fatcat:eqphgcoffbajzkyq6ko23eqedm

Review and comparison of RSFQ asynchronous methodologies

L C Müller, H R Gerber, C J Fourie
2008 Journal of Physics, Conference Series  
The various design limitations imposed on RSFQ circuits through synchronous clocking schemes, make the use of asynchronous clocking attractive.  ...  Circuits are optimized using a Genetic Algorithm optimizer and are then compared in terms of yield, critical margins and latency.  ...  Introduction A large number of asynchronous design methodologies have been proposed in published literature in the 15 odd years since RSFQ started gaining popularity.  ... 
doi:10.1088/1742-6596/97/1/012109 fatcat:likqzztyn5gkfgnmxe5ck7v5ke

High Level Current Modeling for Shaping Electromagnetic Emissions in Micropipeline Circuits

Sophie Germain, Sylvain Engels, Laurent Fesquet
2019 Journal of Low Power Electronics and Applications  
The design flow exploits this current estimation for shaping the electromagnetic emissions by setting the controller delays of the micropipeline circuits.  ...  In order to fit circuit electromagnetic emissions within a spectral mask, a design flow based on high level current modeling for micropipeline circuits is proposed.  ...  Contrarily, the asynchronous designs, also known as clockless circuits, show a spread electromagnetic spectrum.  ... 
doi:10.3390/jlpea9010006 fatcat:5js265ilsngfrcjq24qqwvlmzu

Power Optimization of Asynchronous Circuits through Simultaneous Vdd and Vth Assignment and Template Sizing

Behnam Ghavami, Mehrshad Khosraviani, Hossein Pedram
2008 2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools  
From the experimental results, we show that the combination of asynchronous design and three low power techniques is an effective way to achieve low power and high performance circuits.  ...  Minimizing power consumption is one of the most important objectives in VLSI design.  ...  Asynchronous Circuits Design Flow Asynchronous circuits rely on exchanging local requests and acknowledge signaling for the purpose of synchronization.  ... 
doi:10.1109/dsd.2008.89 dblp:conf/dsd/GhavamiKP08 fatcat:tp6wmllfznbdjaq4j3yrclrusa

Low power asynchronous circuit back-end design flow

Behnam Ghavami, Hossein Pedram
2011 Microelectronics Journal  
This paper introduces a framework for the synthesis of low leakage power asynchronous circuits while maintaining performance requirements.  ...  The proposed flow has the advantage of exploiting a new performance metric and presents an efficient methodology for static estimation of average performance of asynchronous circuits with choices at the  ...  for design of dual-Vth asynchronous circuits.  ... 
doi:10.1016/j.mejo.2010.12.001 fatcat:qazzugoncjff5pbpmfurn5egqa

Fuzzy delay model based fault simulator for crosstalk delay fault test generation in asynchronous sequential circuits

S JAYANTHY, M C BHUVANESWARI
2015 Sadhana (Bangalore)  
faults in asynchronous sequential circuits.  ...  The fault simulator based on fuzzy delay detects unstable states, oscillations and non-confluence of settling states in asynchronous sequential circuits.  ...  A serial fault simulator for testing gate delay faults and transition faults in asynchronous circuits was designed by Sur-Kolay et al (2000) .  ... 
doi:10.1007/s12046-014-0302-1 fatcat:idtckssvpfhijc2ykujxwccgmu

Design of Mixed-Signal Systems With Asynchronous Control

Vladimir Dubikhin, Danil Sokolov, Alex Yakovlev, Chris J. Myers
2016 IEEE design & test  
The proposed workflow aims to combine state-of-the-art tools for asynchronous circuit design and formal verification of analogue systems in a unified environment.  ...  This paper presents a novel workflow for the design of mixed-signal systems.  ...  ACKNOWLEDGEMENTS This material is based upon work supported by EPSRC research grant 'A4A: Asynchronous design for Analogue electronics' (EP/L025507/1) and National Science Foundation Grant No.  ... 
doi:10.1109/mdat.2016.2555916 fatcat:n566g5kcujcsvexk34cqkdp75q

Optimized Asynchronous Circuit Design based on Evolutionary Algorithm

Masoud Shiroie, Karim Mohammadi
2012 International Journal of Computer Applications  
Remarkable advantages of asynchronous circuits in comparison with their synchronous counterparts results in vast effort in designing such circuits.  ...  Outcomes of proposed method in designing fundamental mode asynchronous circuit in comparison with previous methodologies reveal its notable advantages like, multi level circuit design with lower number  ...  Unlike salient progress in synchronous circuit design method and CAD tools, asynchronous circuit design methods are not developed noticeably because of difficultly in hazard-free circuit design.  ... 
doi:10.5120/5029-7177 fatcat:jxeeivramjg2vhijw5d5nbpji4

An Island-Based GA Implementation for VLSI Standard-Cell Placement [chapter]

Guangfa Lu, Shawki Areibi
2004 Lecture Notes in Computer Science  
However, for the placement of medium or large standard-cell circuits, the time required for convergence is extremely long, which makes the above migration schemes non practical.  ...  We also implemented an asynchronous model that can achieve super-linear speedup.  ...  Introduction Physical design of VLSI circuits is a process of determining the location and connection of devices inside a chip.  ... 
doi:10.1007/978-3-540-24855-2_123 fatcat:62ws7fg32zhrbekjf7ntklhapu

Chemical reaction network designs for asynchronous logic circuits

Luca Cardelli, Marta Kwiatkowska, Max Whitby
2017 Natural Computing  
While CRN designs for synchronous sequential logic circuits have been proposed and their implementation in DNA demonstrated, a physical realisation of these devices is difficult because of their reliance  ...  This paper provides novel CRN designs for the construction of asynchronous logic, arithmetic and control flow elements based on a bi-molecular reaction motif with uniform reaction rates.  ...  aware of any other nanoscale designs for asynchronous circuits.  ... 
doi:10.1007/s11047-017-9665-7 pmid:29576757 pmcid:PMC5856889 fatcat:myy4enyho5chnd3jix2crptqr4

Chemical Reaction Network Designs for Asynchronous Logic Circuits [chapter]

Luca Cardelli, Marta Kwiatkowska, Max Whitby
2016 Lecture Notes in Computer Science  
While CRN designs for synchronous sequential logic circuits have been proposed and their implementation in DNA demonstrated, a physical realisation of these devices is difficult because of their reliance  ...  This paper provides novel CRN designs for the construction of asynchronous logic, arithmetic and control flow elements based on a bi-molecular reaction motif with uniform reaction rates.  ...  aware of any other nanoscale designs for asynchronous circuits.  ... 
doi:10.1007/978-3-319-43994-5_5 fatcat:rw62t7rfajbvlelokrmx6qsvam

Pulse Detecting Genetic Circuit – A New Design Approach

Nasimul Noman, Mara Inniss, Hitoshi Iba, Jeffrey C. Way, Szabolcs Semsey
2016 PLoS ONE  
As biological events do not follow precise timing, use of such a pulse detector would enable the design of robust asynchronous counters which can count the completion of events.  ...  The design of the counter circuit. The two components of the design are the falling edge pulse detector circuit shown in Fig 1 and the lambda memory switch.  ...  A pulse detector circuit that triggers only at the falling edge of a pulse would facilitate the design of an asynchronous counter and can be used in designing many other genetic circuits.  ... 
doi:10.1371/journal.pone.0167162 pmid:27907045 pmcid:PMC5131961 fatcat:5yzw6gcexbhlrc2h4dnwwzlu74

Table of Contents

2019 Proceedings of the IEEE  
release mechanisms, the MC environment, as well as the reception mechanism, and how each of these has an impact on the information transfer performance.  ...  |INVITED PAPER| This article proposes a mathematical framework to define the main functional blocks of molecular communication theory, supported by general models from chemical kinetics and statistical  ...  Design of Asynchronous Genetic Circuits The Effect of Loads in Molecular Communications C. McBride, R. Shah, and D. D.  ... 
doi:10.1109/jproc.2019.2919212 fatcat:67msgve5crd4banldurj3h65bu

THE EFFECTS OF HF/PdCl2 ACTIVATION ON ELECTROLESS COPPER FILM PROPERTIES

W. L. GOH, K. T. TAN, M. S. TSE, K. Y. LIU
2002 International Journal of Modern Physics B  
genetic algorithms.  ...  .; and Yan, G.Q. "10Gb/s linear full-rate CMOS phase detector for Research interests include low power asynchronous circuit design, analog and digital Class-D amplifiers, digital signal processing and  ...  • Mixed signal RF Circuit Design.  ... 
doi:10.1142/s0217979202009640 fatcat:rmqvomg5cvbl7m4qbu4ajelmhi
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