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A dynamic binary instrumentation engine for the ARM architecture

Kim Hazelwood, Artur Klauser
2006 Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems - CASES '06  
In this paper, we describe the design, implementation, and applications of the ARM version of Pin, a dynamic instrumentation system from Intel.  ...  Dynamic binary instrumentation (DBI) is a powerful technique for analyzing the runtime behavior of software.  ...  Acknowledgments The Pin project is a collaborative effort supported by Intel Corporation and developed over several years by a large team of researchers, including Geoff Lowney, Robert Cohn, Robert Muth  ... 
doi:10.1145/1176760.1176793 dblp:conf/cases/HazelwoodK06 fatcat:ujr2utro4ze2bplv3bu6tijjmi

Make it work, make it right, make it fast: building a platform-neutral whole-system dynamic binary analysis platform

Andrew Henderson, Aravind Prakash, Lok Kwong Yan, Xunchao Hu, Xujiewen Wang, Rundong Zhou, Heng Yin
2014 Proceedings of the 2014 International Symposium on Software Testing and Analysis - ISSTA 2014  
We present DECAF, a virtual machine based, multi-target, whole-system dynamic binary analysis framework built on top of QEMU.  ...  While several dynamic binary analysis tools and frameworks have been proposed, all suffer from one or more of: prohibitive performance degradation, semantic gap between the analysis code and the program  ...  Compared to process-level program instrumentation and analysis, whole-system dynamic binary analysis has its unique advantages.  ... 
doi:10.1145/2610384.2610407 dblp:conf/issta/HendersonPYHWZY14 fatcat:sufhzzcyabbt7mvkz2fla7uaka

The design and implementation of FIT

Bruno De Bus, Dominique Chanet, Bjorn De Sutter, Ludo Van Put, Koen De Bosschere
2004 Proceedings of the ACM-SIGPLAN-SIGSOFT workshop on Program analysis for software tools and engineering - PASTE '04  
This paper focuses on some of the problems that needed to be addressed for providing this degree of portability. It also discusses the trade-off between instrumentation precision and low overhead.  ...  Unlike existing tools, FIT is truly portable, with existing backends for the Alpha, x86 and ARM architectures and the Tru64Unix, Linux and ARM Firmware execution environments.  ...  Support for the IA64 and MIPS32 architectures is under construction. • Extensibility FIT's user interface is implemented as a collection of wrappers on top of the open-source executable code editing framework  ... 
doi:10.1145/996821.996833 dblp:conf/paste/BusCSPB04 fatcat:isvnxyfuergipid7vf2ijyvqfe

An integrated ARM and multi-core DSP simulator

Sharad Singhai, MingYung Ko, Sanjay Jinturkar, Mayan Moudgill, John Glossner
2007 Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems - CASES '07  
In this paper we describe the design and implementation of a flexible, and extensible, just-in-time ARM simulator designed to run co-operatively with a multi-core DSP simulator on x86 hosts.  ...  We provide performance results and highlight the impact of design choices on our overall performance and design objectives.  ...  INTRODUCTION In this paper we describe the design and implementation of a flexible, and extensible, just-in-time ARM simulator designed to run co-operatively with a multi-core DSP simulator on x86 hosts  ... 
doi:10.1145/1289881.1289889 dblp:conf/cases/SinghaiKJMG07 fatcat:632r6b7tczdc5mrrcgiw6jf7j4

Cross-Platform Embedded-System Dynamic Information Acquisition Method

YISEN WANG, JING JING, JIANJING SHEN, WEIYU DONG
2017 DEStech Transactions on Computer Science and Engineering  
As being wellknown, the hardware architecture of the embedded devices is heterogeneous, and the software stacks on them are customizable and flexible as well.  ...  plugins from underlying hardware and OS; (2) a set of instrumentation interfaces which may be implemented by plugins to extract runtime state of various code granularity; (3) ability of system semantic  ...  system code and user code of another architecture.  ... 
doi:10.12783/dtcse/cii2017/17266 fatcat:mjt54hy5qzejpkdlov2xw6cerm

The Potential of Dynamic Binary Modification and CPU-FPGA SoCs for Simulation

John Mawer, Oscar Palomar, Cosmin Gorgovan, Andy Nisbet, Will Toms, Mikel Lujan
2017 2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)  
The key features of our infrastructure are the ability to instrument at instruction level granularity, to code exclusively at the user level, and to dynamically discover and use available hardware models  ...  We present a comparison between our system and GEM5, the industry standard ARM architecture simulator, to demonstrate accuracy and relative performance; even though our system is implemented on an Xilinx  ...  MAMBO Instrumentation MAMBO [10] is an efficient dynamic binary modification tool for ARM architectures that transparently modifies the machine code of 32 bit and 16 bit instructions during execution  ... 
doi:10.1109/fccm.2017.36 dblp:conf/fccm/MawerPGNTL17 fatcat:g6szidh3qzaohcwnf7e7c7qnk4

Pin

Chi-Keung Luk, Robert Cohn, Robert Muth, Harish Patil, Artur Klauser, Geoff Lowney, Steven Wallace, Vijay Janapa Reddi, Kim Hazelwood
2005 Proceedings of the 2005 ACM SIGPLAN conference on Programming language design and implementation - PLDI '05  
Pin is publicly available for Linux platforms on four architectures: IA32 (32-bit x86), EM64T (64-bit x86), Itanium R , and ARM.  ...  The API is designed to be architecture independent whenever possible, making Pintools source compatible across different architectures.  ...  Ramesh Peri implemented part of the Pin 2/Itanium instrumentation.  ... 
doi:10.1145/1065010.1065034 dblp:conf/pldi/LukCMPKLWRH05 fatcat:3kyim67h6raphbw5co2sbmou4a

SimpleScalar: an infrastructure for computer system modeling

T. Austin, E. Larson, D. Ernst
2002 Computer  
Developed to provide an infrastructure for simulation and architectural modeling, the SimpleScalar toolset offers an open source distribution especially suited to the needs of researchers and instructors  ...  EIA-9975286, and DARPA Award No. F33615-00-C-1678. Eric Larson is supported under a National Science Foundation Graduate Fellowship.  ...  During simulation, model instrumentation measures the dynamic characteristics of the hardware model and the performance of the software running on it.  ... 
doi:10.1109/2.982917 fatcat:uxa35e57rjdavjqz5drqbu5ona

Pin

Chi-Keung Luk, Robert Cohn, Robert Muth, Harish Patil, Artur Klauser, Geoff Lowney, Steven Wallace, Vijay Janapa Reddi, Kim Hazelwood
2005 SIGPLAN notices  
Pin is publicly available for Linux platforms on four architectures: IA32 (32-bit x86), EM64T (64-bit x86), Itanium R , and ARM.  ...  The API is designed to be architecture independent whenever possible, making Pintools source compatible across different architectures.  ...  Ramesh Peri implemented part of the Pin 2/Itanium instrumentation.  ... 
doi:10.1145/1064978.1065034 fatcat:eshiugjbzrglfilezpfoexhde4

Retargetable Program Profiling Using High Level Processor Models [chapter]

Rajiv Ravindran, Rajat Moona
2001 Lecture Notes in Computer Science  
We have implemented a retargetable simulation driven code profiler from a high-level processor description language, Sim-nML.  ...  Program profiling helps in characterizing program behavior for a target architecture.  ...  Secondly, through a programming interface, we have provided a mechanism for implementing customized profilers.  ... 
doi:10.1007/3-540-45307-5_20 fatcat:r2baowzak5fmnc5kxbooaee7aq

HyperMAMBO-X64

Amanieu d'Antras, Cosmin Gorgovan, Jim Garside, John Goodacre, Mikel Luján
2017 Proceedings of the 13th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments - VEE '17  
Dynamic binary translation can be used for this purpose and generally comes in one of two forms: application-level translators that translate a single user mode process on top of a native operating system  ...  Current computer architectures -ARM, MIPS, PowerPC, SPARC, x86 -have evolved from a 32-bit architecture to a 64-bit one.  ...  Acknowledgments This work was supported by UK EPSRC grants DOME EP/J016330/1 and PAMELA EP/K008730/1. Luján is supported by a Royal Society University Research Fellowship.  ... 
doi:10.1145/3050748.3050756 dblp:conf/vee/DAntrasGGGL17 fatcat:x4ori7wpondfbl36sm3ojqt75y

DECAF: A Platform-Neutral Whole-System Dynamic Binary Analysis Platform

Andrew Henderson, Lok Kwong Yan, Xunchao Hu, Aravind Prakash, Heng Yin, Stephen McCamant
2017 IEEE Transactions on Software Engineering  
being analyzed, architecture/OS specificity, being user-mode only, and lacking APIs.  ...  We present DECAF, a virtual machine based, multi-target, whole-system dynamic binary analysis framework built on top of QEMU.  ...  His research interests include hardware security, dynamic binary code analysis, and malware detection and analysis. He is a senior member of the IEEE.  ... 
doi:10.1109/tse.2016.2589242 fatcat:n7mqdtkdjzeldnlu7b2itenvbi

Manticore: A User-Friendly Symbolic Execution Framework for Binaries and Smart Contracts [article]

Mark Mossberg, Felipe Manzano, Eric Hennenfent, Alex Groce, Gustavo Grieco, Josselin Feist, Trent Brunson, Artem Dinaburg
2019 arXiv   pre-print
We introduce an open-source dynamic symbolic execution framework called Manticore for analyzing binaries and Ethereum smart contracts.  ...  Manticore's flexible architecture allows it to support both traditional and exotic execution environments, and its API allows users to customize their analysis.  ...  ARCHITECTURE Manticore's design is highly flexible and supports both traditional computing environments (x86/64, ARM) and exotic ones, such as the Ethereum platform.  ... 
arXiv:1907.03890v3 fatcat:jac7d4akzvhq3nl7d4qyylrqqy

Architecture-Independent Dynamic Information Flow Tracking [chapter]

Ryan Whelan, Tim Leek, David Kaeli
2013 Lecture Notes in Computer Science  
This places a heavy burden on developers of these systems since significant domain knowledge is required to support each ISA, and the ability to amortize the effort expended on one ISA implementation cannot  ...  To support advanced instructions that are typically implemented in C code in binary translators, we also present a combined static/dynamic analysis that allows us to accurately and automatically support  ...  Information flow tracking has been implemented in a variety of ways, including at the hardware level [26, 28] , in software through the use of source-level instrumentation [12, 15, 31] , binary instrumentation  ... 
doi:10.1007/978-3-642-37051-9_8 fatcat:g7bavrn6e5fdnbh6eq4uqlrhma

A small and adaptive coprocessor for information flow tracking in ARM SoCs [article]

Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah, Guillaume Hiet, Arnab Kumar Biswas, Vianney Lapôtre, Guy Gogniat
2018 arXiv   pre-print
The area overhead of this work is lower than 1% and power overhead is 16.2% on a middle-class Xilinx Zynq SoC.  ...  These goals are accomplished by taking advantage of a notable feature of ARM CoreSight components (context ID) combined with a custom DIFT coprocessor and RFBlare.  ...  Figure 1 : 1 Overall system design with a DIFT coprocessor Figure 2 2 illustrates the high-level architecture of the DIFT coprocessor.  ... 
arXiv:1812.01541v1 fatcat:re7vqhee7zc7vh5u3mziw5f67a
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